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AM275 FreeRTOS SDK
11.01.00
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48 #ifndef AASRC_CLOCKING_H_
49 #define AASRC_CLOCKING_H_
67 #define AASRC_RXSYNC_PIN_COUNT (4U)
69 #define AASRC_TXSYNC_PIN_COUNT (4U)
79 #define AASRC_RXSYNC0_IDX (0U)
80 #define AASRC_RXSYNC1_IDX (1U)
81 #define AASRC_RXSYNC2_IDX (2U)
82 #define AASRC_RXSYNC3_IDX (3U)
93 #define AASRC_TXSYNC0_IDX (0U)
94 #define AASRC_TXSYNC1_IDX (1U)
95 #define AASRC_TXSYNC2_IDX (2U)
96 #define AASRC_TXSYNC3_IDX (3U)
100 #define AASRC_INPUT_CLOCK_ZONE_COUNT (4U)
101 #define AASRC_OUTPUT_CLOCK_ZONE_COUNT (4U)
111 #define AASRC_INPUT_CLOCK_ZONE0_IDX (0U)
112 #define AASRC_INPUT_CLOCK_ZONE1_IDX (1U)
113 #define AASRC_INPUT_CLOCK_ZONE2_IDX (2U)
114 #define AASRC_INPUT_CLOCK_ZONE3_IDX (3U)
125 #define AASRC_OUTPUT_CLOCK_ZONE0_IDX (0U)
126 #define AASRC_OUTPUT_CLOCK_ZONE1_IDX (1U)
127 #define AASRC_OUTPUT_CLOCK_ZONE2_IDX (2U)
128 #define AASRC_OUTPUT_CLOCK_ZONE3_IDX (3U)
132 #define AASRC_INTERNAL_CLOCK_DIVISOR_MAX_VAL (1U << 14U)
135 #define AASRC_AUDIO_CLK_FREQUENCY_MAX (216U) // number is in KHz
138 #define AASRC_CLK_RATIO_MAX (16U)
141 #define AASRC_CLK_SRC_MAX_FOR_DIVIDER (96U) // number is in MHz
144 #define AASRC_CLOCKZONE_CONTROL_REG_OFFSET (0x00000080U)
146 #define AASRC_INPUT_CLOCKZONE_CONTROL(x) ((uint32_t) CSL_AASRC_CFG_INPUT_CLOCKZONE_CONTROL_0 + \
147 (uint32_t) ((uint32_t) AASRC_CLOCKZONE_CONTROL_REG_OFFSET * \
150 #define AASRC_OUTPUT_CLOCKZONE_CONTROL(x) ((uint32_t) CSL_AASRC_CFG_OUTPUT_CLOCKZONE_CONTROL_0 + \
151 (uint32_t) ((uint32_t) AASRC_CLOCKZONE_CONTROL_REG_OFFSET * \
155 #define AASRC_CLOCK_RECOVERY_LOOP_RATE_REG_OFFSET (0x00000080U)
157 #define AASRC_INPUT_CLOCK_RECOVERY_LOOP_RATE_LO(x) ((uint32_t) CSL_AASRC_CFG_INPUT_CLOCK_RECOVERY_LOOP_RATE_LO_0 + \
158 (uint32_t) ((uint32_t) AASRC_CLOCK_RECOVERY_LOOP_RATE_REG_OFFSET * \
161 #define AASRC_INPUT_CLOCK_RECOVERY_LOOP_RATE_HI(x) ((uint32_t) CSL_AASRC_CFG_INPUT_CLOCK_RECOVERY_LOOP_RATE_HI_0 + \
162 (uint32_t) ((uint32_t) AASRC_CLOCK_RECOVERY_LOOP_RATE_REG_OFFSET * \
165 #define AASRC_OUTPUT_CLOCK_RECOVERY_LOOP_RATE_LO(x) ((uint32_t) CSL_AASRC_CFG_OUTPUT_CLOCK_RECOVERY_LOOP_RATE_LO_0 + \
166 (uint32_t) ((uint32_t) AASRC_CLOCK_RECOVERY_LOOP_RATE_REG_OFFSET * \
169 #define AASRC_OUTPUT_CLOCK_RECOVERY_LOOP_RATE_HI(x) ((uint32_t) CSL_AASRC_CFG_OUTPUT_CLOCK_RECOVERY_LOOP_RATE_HI_0 + \
170 (uint32_t) ((uint32_t) AASRC_CLOCK_RECOVERY_LOOP_RATE_REG_OFFSET * \
void * AASRC_ChHandle
AASRC channel handle which points to AASRC channnel status and configs.
Definition: aasrc_types.h:71
int32_t AASRC_IsClockZoneRxSettled(AASRC_ChHandle chHandle, bool *isClkSettled)
Check if the queried AASRC input clock zone is settled.
int32_t AASRC_GetClkZoneTxFrequency(AASRC_ChHandle chHandle, float *clkFrequency)
Reads AASRC output clock frequency for a given clock zone.
AASRC Driver API/interface file.
int32_t AASRC_ClkZoneRxConfig(uint8_t clockZoneIdx, AASRC_Handle drvHandle)
AASRC input clock zone configuration.
int32_t AASRC_GetClkZoneRxFrequency(AASRC_ChHandle chHandle, float *clkFrequency)
Reads AASRC input clock frequency for a given clock zone.
void * AASRC_Handle
A handle that is returned from a AASRC_open() call.
Definition: aasrc_types.h:65
int32_t AASRC_ClkZoneTxConfig(uint8_t clockZoneIdx, AASRC_Handle drvHandle)
AASRC output clock zone configuration.
int32_t AASRC_IsClockZoneTxSettled(AASRC_ChHandle chHandle, bool *isClkSettled)
Check if the queried AASRC output clock zone is settled.