Detailed Description

Complex IO all (logical) lanes interrupts.

This represents both status and configuration (enable/disable) structures. The description of the fields is in terms of status. For configuration they should be interpreted as "true if you want to enable the detection of this condition, false otherwise". For status, the interrupts can be cleared by issuing CSIRX_complexioClearAllIntr API

Data Fields
bool	isAllLanesEnterULPM
	true if all lanes transitioned to ULPM (Ultra Low Power Mode) More...

bool	isAllLanesExitULPM
	true if at least one of the active lanes has exit ULPM (Ultra Low Power Mode) More...

CSIRX_ComplexioLaneIntr	dataLane [CSIRX_DATA_LANES_MAX]
	data lanes interrupt configuration More...

CSIRX_ComplexioLaneIntr	clockLane
	clock lane interrupt configuration More...

Field Documentation

◆ isAllLanesEnterULPM

bool CSIRX_ComplexioLanesIntr::isAllLanesEnterULPM

true if all lanes transitioned to ULPM (Ultra Low Power Mode)

◆ isAllLanesExitULPM

bool CSIRX_ComplexioLanesIntr::isAllLanesExitULPM

true if at least one of the active lanes has exit ULPM (Ultra Low Power Mode)

◆ dataLane

CSIRX_ComplexioLaneIntr CSIRX_ComplexioLanesIntr::dataLane[CSIRX_DATA_LANES_MAX]

data lanes interrupt configuration

◆ clockLane

CSIRX_ComplexioLaneIntr CSIRX_ComplexioLanesIntr::clockLane