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AM273x MCU+ SDK
09.02.00
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AM273x MCU+ SDK
09.02.00
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Go to the source code of this file.
Data Structures | |
| struct | SDL_esmRegs |
| #define SDL_ESM_ESMIEPSR1 (0x00000000U) |
| #define SDL_ESM_ESMIEPCR1 (0x00000004U) |
| #define SDL_ESM_ESMIESR1 (0x00000008U) |
| #define SDL_ESM_ESMIECR1 (0x0000000CU) |
| #define SDL_ESM_ESMILSR1 (0x00000010U) |
| #define SDL_ESM_ESMILCR1 (0x00000014U) |
| #define SDL_ESM_ESMSR1 (0x00000018U) |
| #define SDL_ESM_ESMSR2 (0x0000001CU) |
| #define SDL_ESM_ESMSR3 (0x00000020U) |
| #define SDL_ESM_ESMEPSR (0x00000024U) |
| #define SDL_ESM_ESMIOFFHR (0x00000028U) |
| #define SDL_ESM_ESMIOFFLR (0x0000002CU) |
| #define SDL_ESM_ESMLTCR (0x00000030U) |
| #define SDL_ESM_ESMLTCPR (0x00000034U) |
| #define SDL_ESM_ESMEKR (0x00000038U) |
| #define SDL_ESM_ESMSSR2 (0x0000003CU) |
| #define SDL_ESM_ESMIEPSR4 (0x00000040U) |
| #define SDL_ESM_ESMIEPCR4 (0x00000044U) |
| #define SDL_ESM_ESMIESR4 (0x00000048U) |
| #define SDL_ESM_ESMIECR4 (0x0000004CU) |
| #define SDL_ESM_ESMILSR4 (0x00000050U) |
| #define SDL_ESM_ESMILCR4 (0x00000054U) |
| #define SDL_ESM_ESMSR4 (0x00000058U) |
| #define SDL_ESM_ESMIEPSR7 (0x00000080U) |
| #define SDL_ESM_ESMIEPCR7 (0x00000084U) |
| #define SDL_ESM_ESMIESR7 (0x00000088U) |
| #define SDL_ESM_ESMIECR7 (0x0000008CU) |
| #define SDL_ESM_ESMILSR7 (0x00000090U) |
| #define SDL_ESM_ESMILCR7 (0x00000094U) |
| #define SDL_ESM_ESMSR7 (0x00000098U) |
| #define SDL_ESM_ESMIEPSR10 (0x000000C0U) |
| #define SDL_ESM_ESMIEPCR10 (0x000000C4U) |
| #define SDL_ESM_ESMIESR10 (0x000000C8U) |
| #define SDL_ESM_ESMIECR10 (0x000000CCU) |
| #define SDL_ESM_ESMILSR10 (0x000000D0U) |
| #define SDL_ESM_ESMILCR10 (0x000000D4U) |
| #define SDL_ESM_ESMSR10 (0x000000D8U) |
| #define SDL_ESM_ESMIEPSR1_IEPSET_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPSR1_IEPSET_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIEPSR1_IEPSET_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPSR1_IEPSET_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPSR1_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPCR1_IEPCLR_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPCR1_IEPCLR_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIEPCR1_IEPCLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPCR1_IEPCLR_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPCR1_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIESR1_INTENSET_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIESR1_INTENSET_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIESR1_INTENSET_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIESR1_INTENSET_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIESR1_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIECR1_INTENCLR_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIECR1_INTENCLR_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIECR1_INTENCLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIECR1_INTENCLR_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIECR1_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILSR1_INTLVLSET_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILSR1_INTLVLSET_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMILSR1_INTLVLSET_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILSR1_INTLVLSET_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILSR1_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILCR1_INTLVLCLR_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILCR1_INTLVLCLR_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMILCR1_INTLVLCLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILCR1_INTLVLCLR_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILCR1_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSR1_ESF_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSR1_ESF_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMSR1_ESF_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSR1_ESF_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSR1_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSR2_ESF_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSR2_ESF_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMSR2_ESF_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSR2_ESF_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSR2_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSR3_ESF_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSR3_ESF_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMSR3_ESF_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSR3_ESF_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSR3_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMEPSR_EPSF_MASK (0x00000001U) |
| #define SDL_ESM_ESMEPSR_EPSF_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMEPSR_EPSF_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMEPSR_EPSF_MAX (0x00000001U) |
| #define SDL_ESM_ESMEPSR_RESERVED_MASK (0xFFFFFFFEU) |
| #define SDL_ESM_ESMEPSR_RESERVED_SHIFT (0x00000001U) |
| #define SDL_ESM_ESMEPSR_RESERVED_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMEPSR_RESERVED_MAX (0x7FFFFFFFU) |
| #define SDL_ESM_ESMEPSR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIOFFHR_INTOFFH_MASK (0x000001FFU) |
| #define SDL_ESM_ESMIOFFHR_INTOFFH_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIOFFHR_INTOFFH_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIOFFHR_INTOFFH_MAX (0x000001FFU) |
| #define SDL_ESM_ESMIOFFHR_RESERVED_MASK (0xFFFFFE00U) |
| #define SDL_ESM_ESMIOFFHR_RESERVED_SHIFT (0x00000009U) |
| #define SDL_ESM_ESMIOFFHR_RESERVED_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIOFFHR_RESERVED_MAX (0x007FFFFFU) |
| #define SDL_ESM_ESMIOFFHR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIOFFLR_INTOFFL_MASK (0x000000FFU) |
| #define SDL_ESM_ESMIOFFLR_INTOFFL_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIOFFLR_INTOFFL_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIOFFLR_INTOFFL_MAX (0x000000FFU) |
| #define SDL_ESM_ESMIOFFLR_RESERVED_MASK (0xFFFFFF00U) |
| #define SDL_ESM_ESMIOFFLR_RESERVED_SHIFT (0x00000008U) |
| #define SDL_ESM_ESMIOFFLR_RESERVED_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIOFFLR_RESERVED_MAX (0x00FFFFFFU) |
| #define SDL_ESM_ESMIOFFLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMLTCR_LTCP_MASK (0x0000FFFFU) |
| #define SDL_ESM_ESMLTCR_LTCP_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMLTCR_LTCP_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMLTCR_LTCP_MAX (0x0000FFFFU) |
| #define SDL_ESM_ESMLTCR_RESERVED_MASK (0xFFFF0000U) |
| #define SDL_ESM_ESMLTCR_RESERVED_SHIFT (0x00000010U) |
| #define SDL_ESM_ESMLTCR_RESERVED_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMLTCR_RESERVED_MAX (0x0000FFFFU) |
| #define SDL_ESM_ESMLTCR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMLTCPR_LTCP_MASK (0x0000FFFFU) |
| #define SDL_ESM_ESMLTCPR_LTCP_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMLTCPR_LTCP_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMLTCPR_LTCP_MAX (0x0000FFFFU) |
| #define SDL_ESM_ESMLTCPR_RESERVED_MASK (0xFFFF0000U) |
| #define SDL_ESM_ESMLTCPR_RESERVED_SHIFT (0x00000010U) |
| #define SDL_ESM_ESMLTCPR_RESERVED_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMLTCPR_RESERVED_MAX (0x0000FFFFU) |
| #define SDL_ESM_ESMLTCPR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMEKR_EKEY_MASK (0x0000000FU) |
| #define SDL_ESM_ESMEKR_EKEY_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMEKR_EKEY_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMEKR_EKEY_MAX (0x0000000FU) |
| #define SDL_ESM_ESMEKR_RESERVED_MASK (0xFFFFFFF0U) |
| #define SDL_ESM_ESMEKR_RESERVED_SHIFT (0x00000004U) |
| #define SDL_ESM_ESMEKR_RESERVED_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMEKR_RESERVED_MAX (0x0FFFFFFFU) |
| #define SDL_ESM_ESMEKR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSSR2_ESF_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSSR2_ESF_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMSSR2_ESF_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSSR2_ESF_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSSR2_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPSR4_IEPSET_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPSR4_IEPSET_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIEPSR4_IEPSET_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPSR4_IEPSET_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPSR4_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPCR4_IEPCLR_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPCR4_IEPCLR_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIEPCR4_IEPCLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPCR4_IEPCLR_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPCR4_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIESR4_INTENSET_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIESR4_INTENSET_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIESR4_INTENSET_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIESR4_INTENSET_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIESR4_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIECR4_INTENCLR_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIECR4_INTENCLR_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIECR4_INTENCLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIECR4_INTENCLR_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIECR4_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILSR4_INTLVLSET_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILSR4_INTLVLSET_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMILSR4_INTLVLSET_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILSR4_INTLVLSET_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILSR4_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILCR4_INTLVLCLR_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILCR4_INTLVLCLR_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMILCR4_INTLVLCLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILCR4_INTLVLCLR_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILCR4_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSR4_ESF_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSR4_ESF_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMSR4_ESF_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSR4_ESF_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSR4_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPSR7_IEPSET_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPSR7_IEPSET_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIEPSR7_IEPSET_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPSR7_IEPSET_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPSR7_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPCR7_IEPCLR_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPCR7_IEPCLR_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIEPCR7_IEPCLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPCR7_IEPCLR_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPCR7_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIESR7_INTENSET_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIESR7_INTENSET_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIESR7_INTENSET_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIESR7_INTENSET_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIESR7_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIECR7_INTENCLR_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIECR7_INTENCLR_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIECR7_INTENCLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIECR7_INTENCLR_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIECR7_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILSR7_INTLVLSET_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILSR7_INTLVLSET_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMILSR7_INTLVLSET_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILSR7_INTLVLSET_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILSR7_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILCR7_INTLVLCLR_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILCR7_INTLVLCLR_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMILCR7_INTLVLCLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILCR7_INTLVLCLR_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILCR7_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSR7_ESF_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSR7_ESF_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMSR7_ESF_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSR7_ESF_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSR7_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPSR10_IEPSET_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPSR10_IEPSET_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIEPSR10_IEPSET_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPSR10_IEPSET_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPSR10_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPCR10_IEPCLR_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPCR10_IEPCLR_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIEPCR10_IEPCLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIEPCR10_IEPCLR_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIEPCR10_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIESR10_INTENSET_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIESR10_INTENSET_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIESR10_INTENSET_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIESR10_INTENSET_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIESR10_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIECR10_INTENCLR_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIECR10_INTENCLR_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMIECR10_INTENCLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMIECR10_INTENCLR_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMIECR10_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILSR10_INTLVLSET_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILSR10_INTLVLSET_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMILSR10_INTLVLSET_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILSR10_INTLVLSET_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILSR10_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILCR10_INTLVLCLR_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILCR10_INTLVLCLR_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMILCR10_INTLVLCLR_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMILCR10_INTLVLCLR_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMILCR10_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSR10_ESF_MASK (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSR10_ESF_SHIFT (0x00000000U) |
| #define SDL_ESM_ESMSR10_ESF_RESETVAL (0x00000000U) |
| #define SDL_ESM_ESMSR10_ESF_MAX (0xFFFFFFFFU) |
| #define SDL_ESM_ESMSR10_RESETVAL (0x00000000U) |
| #define ESM_ESMIEPSR1 SDL_ESM_ESMIEPSR1 |
| #define ESM_ESMIEPCR1 SDL_ESM_ESMIEPCR1 |
| #define ESM_ESMIESR1 SDL_ESM_ESMIESR1 |
| #define ESM_ESMIECR1 SDL_ESM_ESMIECR1 |
| #define ESM_ESMILSR1 SDL_ESM_ESMILSR1 |
| #define ESM_ESMILCR1 SDL_ESM_ESMILCR1 |
| #define ESM_ESMSR1 SDL_ESM_ESMSR1 |
| #define ESM_ESMSR2 SDL_ESM_ESMSR2 |
| #define ESM_ESMSR3 SDL_ESM_ESMSR3 |
| #define ESM_ESMEPSR SDL_ESM_ESMEPSR |
| #define ESM_ESMIOFFHR SDL_ESM_ESMIOFFHR |
| #define ESM_ESMIOFFLR SDL_ESM_ESMIOFFLR |
| #define ESM_ESMLTCR SDL_ESM_ESMLTCR |
| #define ESM_ESMLTCPR SDL_ESM_ESMLTCPR |
| #define ESM_ESMEKR SDL_ESM_ESMEKR |
| #define ESM_ESMSSR2 SDL_ESM_ESMSSR2 |
| #define ESM_ESMEPSR_EPSF_MASK SDL_ESM_ESMEPSR_EPSF_MASK |
| #define ESM_ESMEPSR_EPSF_SHIFT SDL_ESM_ESMEPSR_EPSF_SHIFT |
| #define ESM_ESMIOFFHR_INTOFFH_MASK SDL_ESM_ESMIOFFHR_INTOFFH_MASK |
| #define ESM_ESMIOFFHR_INTOFFH_SHIFT SDL_ESM_ESMIOFFHR_INTOFFH_SHIFT |
| #define ESM_ESMIOFFLR_INTOFFL_MASK SDL_ESM_ESMIOFFLR_INTOFFL_MASK |
| #define ESM_ESMIOFFLR_INTOFFL_SHIFT SDL_ESM_ESMIOFFLR_INTOFFL_SHIFT |
| #define ESM_ESMLTCR_LTC_MASK SDL_ESM_ESMLTCR_LTCP_MASK |
| #define ESM_ESMLTCR_LTC_SHIFT SDL_ESM_ESMLTCR_LTCP_SHIFT |
| #define ESM_ESMLTCPR_LTCPR_MASK SDL_ESM_ESMLTCPR_LTCP_MASK |
| #define ESM_ESMLTCPR_LTCPR_SHIFT SDL_ESM_ESMLTCPR_LTCP_SHIFT |
| #define ESM_ESMEKR_EKEY_MASK SDL_ESM_ESMEKR_EKEY_MASK |
| #define ESM_ESMEKR_EKEY_SHIFT SDL_ESM_ESMEKR_EKEY_SHIFT |
| #define ESM_ESMLTCPR_LTCPR_MAX SDL_ESM_ESMLTCPR_LTCP_MAX |
| #define ESM_ESMEKR_EKEY_NORMAL_MODE (0x0U) |
| #define ESM_ESMEKR_EKEY_ERROR_PIN_RESET (0x5U) |
| #define ESM_ESMEKR_EKEY_ERROR_FORCE_MODE (0xAU) |
1.8.20