For more details and example usage, see SOC
◆ SOC_DOMAIN_ID_MSS_TOP_RCM
| #define SOC_DOMAIN_ID_MSS_TOP_RCM (0U) |
◆ SOC_DOMAIN_ID_MSS_RCM
| #define SOC_DOMAIN_ID_MSS_RCM (1U) |
◆ SOC_DOMAIN_ID_DSS_RCM
| #define SOC_DOMAIN_ID_DSS_RCM (2U) |
◆ SOC_DOMAIN_ID_RCSS_RCM
| #define SOC_DOMAIN_ID_RCSS_RCM (3U) |
◆ SOC_DOMAIN_ID_MSS_CTRL
| #define SOC_DOMAIN_ID_MSS_CTRL (4U) |
◆ SOC_DOMAIN_ID_DSS_CTRL
| #define SOC_DOMAIN_ID_DSS_CTRL (5U) |
◆ SOC_DOMAIN_ID_RCSS_CTRL
| #define SOC_DOMAIN_ID_RCSS_CTRL (6U) |
◆ SOC_DOMAIN_ID_MSS_IOMUX
| #define SOC_DOMAIN_ID_MSS_IOMUX (7U) |
◆ IS_QSPI_BASE_ADDR_VALID
| #define IS_QSPI_BASE_ADDR_VALID |
( |
|
baseAddr | ) |
(baseAddr == CSL_MSS_QSPI_U_BASE) |
Macro to check if the QSPI base address is valid.
◆ IS_QSPI_MEMORY_MAP_ADDR_VALID
| #define IS_QSPI_MEMORY_MAP_ADDR_VALID |
( |
|
baseAddr | ) |
(baseAddr == CSL_EXT_FLASH_U_BASE) |
Macro to check if the QSPI Memory Mapped address is valid.
◆ IS_I2C_BASE_ADDR_VALID
| #define IS_I2C_BASE_ADDR_VALID |
( |
|
baseAddr | ) |
|
Value: ((baseAddr == CSL_MSS_I2C_U_BASE) || \
(baseAddr == CSL_RCSS_I2CA_U_BASE) || \
(baseAddr == CSL_RCSS_I2CB_U_BASE))
Macro to check if the I2C base address is valid.
◆ SOC_moduleClockEnable()
| int32_t SOC_moduleClockEnable |
( |
uint32_t |
moduleId, |
|
|
uint32_t |
enable |
|
) |
| |
Enable clock to specified module.
- Parameters
-
| moduleId | [in] module ID's |
| enable | [in] 1: enable clock to the module, 0: disable clock to the module |
- Returns
- SystemP_SUCCESS Module clock is enabled
-
SystemP_FAILURE Module clock could not be enabled
◆ SOC_moduleSetClockFrequency()
| int32_t SOC_moduleSetClockFrequency |
( |
uint32_t |
moduleId, |
|
|
uint32_t |
clkId, |
|
|
uint64_t |
clkRate |
|
) |
| |
Set module clock to specified frequency.
- Parameters
-
| moduleId | [in] module ID's |
| clkId | [in] clocks associated with the specified module ID |
| clkRate | [in] Frequency to set in Hz |
- Returns
- SystemP_SUCCESS Module clock is enabled
-
SystemP_FAILURE Module clock could not be enabled
◆ SOC_getCoreName()
| const char* SOC_getCoreName |
( |
uint16_t |
coreId | ) |
|
Convert a core ID to a user readable name.
- Parameters
-
- Returns
- name as a string
◆ SOC_getSelfCpuClk()
| uint64_t SOC_getSelfCpuClk |
( |
void |
| ) |
|
Get the clock frequency in Hz of the CPU on which the driver is running.
- Returns
- Clock frequency in Hz
◆ SOC_controlModuleLockMMR()
| void SOC_controlModuleLockMMR |
( |
uint32_t |
domainId, |
|
|
uint32_t |
partition |
|
) |
| |
Lock control module partition to prevent writes into control MMRs.
- Parameters
-
| domainId | [in] See SOC_DomainId_t |
| partition | [in] Partition number to unlock |
◆ SOC_controlModuleUnlockMMR()
| void SOC_controlModuleUnlockMMR |
( |
uint32_t |
domainId, |
|
|
uint32_t |
partition |
|
) |
| |
Unlock control module partition to allow writes into control MMRs.
- Parameters
-
| domainId | [in] See SOC_DomainId_t |
| partition | [in] Partition number to unlock |
◆ SOC_setEpwmTbClk()
| void SOC_setEpwmTbClk |
( |
uint32_t |
epwmInstance, |
|
|
uint32_t |
enable |
|
) |
| |
Enable or disable ePWM time base clock from Control MMR.
- Parameters
-
| epwmInstance | [in] ePWM instance number [0 - (CSL_EPWM_PER_CNT-1)] |
| enable | [in] TRUE to enable and FALSE to disable |
◆ SOC_virtToPhy()
| uint64_t SOC_virtToPhy |
( |
void * |
virtAddr | ) |
|
SOC Virtual (CPU) to Physical address translation function.
- Parameters
-
| virtAddr | [IN] Virtual/CPU address |
- Returns
- Corresponding SOC physical address
◆ SOC_phyToVirt()
| void* SOC_phyToVirt |
( |
uint64_t |
phyAddr | ) |
|
Physical to Virtual (CPU) address translation function.
- Parameters
-
| phyAddr | [IN] Physical address |
- Returns
- Corresponding virtual/CPU address
◆ SOC_logAllClockHz()
| void SOC_logAllClockHz |
( |
void |
| ) |
|
Print's module clock info to the console.
◆ SOC_getFlashDataBaseAddr()
| uint32_t SOC_getFlashDataBaseAddr |
( |
void |
| ) |
|
This function gets the SOC mapped data base address of the flash.
- Returns
- Data BaseAddress of the flash
1.8.20