Macros that define values for the various reset modes in pre-processing block, appied to DCESTRESET and INTERFSUMRESET.
◆ HWA_DCEST_INTERFSUM_RESET_MODE_NOUPDATE
#define HWA_DCEST_INTERFSUM_RESET_MODE_NOUPDATE ((uint8_t)0U) /** Hold the internal accumulators without updating */ |
◆ HWA_DCEST_INTERFSUM_RESET_MODE_SOFTWARERESET
#define HWA_DCEST_INTERFSUM_RESET_MODE_SOFTWARERESET ((uint8_t)1U) /** free-running without automatic reset, software can reset the accumulators by writing to either DC_EST_RESET_SW register for DC accumulator, or INTF_STATUS_RESET_SW for interference statistics */ |
◆ HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET
#define HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET ((uint8_t)2U) /** Reset the internal accumulators at the start of parameter set (i.e per chirp accumulation) */ |
◆ HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET_ZEROLPCONT
#define HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET_ZEROLPCONT ((uint8_t)3U) /** Reset the internal accumulators at the start of parameter set only if loop counter is 0 (i.e per frame accumulation) */ |