#define SDL_ECC_BUS_SAFETY_DSS_DSP_MDMA 0U |
#define SDL_ECC_BUS_SAFETY_DSS_L3_BANKA 1U |
#define SDL_ECC_BUS_SAFETY_DSS_L3_BANKB 2U |
#define SDL_ECC_BUS_SAFETY_DSS_L3_BANKC 3U |
#define SDL_ECC_BUS_SAFETY_DSS_L3_BANKD 4U |
#define SDL_ECC_BUS_SAFETY_DSS_DSP_SDMA 5U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_A0_RD 6U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_A1_RD 7U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_B0_RD 8U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_B1_RD 9U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_C0_RD 10U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_C1_RD 11U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_C2_RD 12U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_C3_RD 13U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_C4_RD 14U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_C5_RD 15U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_A0_WR 16U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_A1_WR 17U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_B0_WR 18U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_B1_WR 19U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_C0_WR 20U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_C1_WR 21U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_C2_WR 22U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_C3_WR 23U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_C4_WR 24U |
#define SDL_ECC_BUS_SAFETY_DSS_TPTC_C5_WR 25U |
#define SDL_ECC_BUS_SAFETY_DSS_CBUFF_FIFO 26U |
#define SDL_ECC_BUS_SAFETY_DSS_MCRC 27U |
#define SDL_ECC_BUS_SAFETY_DSS_PCR 28U |
#define SDL_ECC_BUS_SAFETY_DSS_HWA_DMA0 29U |
#define SDL_ECC_BUS_SAFETY_DSS_HWA_DMA1 30U |
#define SDL_ECC_BUS_SAFETY_DSS_MBOX 31U |
#define SDL_ECC_BUS_SAFETY_RSS_TPTCA0_RD 32U |
#define SDL_ECC_BUS_SAFETY_RSS_TPTCA0_WR 33U |
#define SDL_ECC_BUS_SAFETY_RSS_CSI2A_MDMA 34U |
#define SDL_ECC_BUS_SAFETY_RSS_PCR 35U |
#define SDL_ECC_BUS_SAFETY_RSS_CQ_MEM_RD 36U |
#define SDL_ECC_BUS_SAFETY_RSS_CQ_MEM_WR 37U |
#define SDL_ECC_BUS_SAFETY_RSS_STATIC_MEM 38U |
#define SDL_ECC_BUS_SAFETY_RSS_BSS_MST 39U |
#define SDL_ECC_BUS_SAFETY_RSS_BSS_SLV 40U |
#define SDL_ECC_BUS_SAFETY_DSS_MDO_FIFO 41U |
#define SDL_ECC_BUS_SAFETY_RSS_MBOX 41U |
#define SDL_ECC_BUS_SAFETY_RSS_ADCBUF_RD 42U |
#define SDL_ECC_BUS_SAFETY_RSS_ADCBUF_WR 43U |
#define SDL_ECC_BUS_SAFETY_MSS_TPTC_A0_RD 0U |
#define SDL_ECC_BUS_SAFETY_MSS_TPTC_A1_RD 1U |
#define SDL_ECC_BUS_SAFETY_MSS_TPTC_B0_RD 2U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5A_AXI_RD 3U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5B_AXI_RD 4U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5C_AXI_RD 5U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5D_AXI_RD 6U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5A_AXI_S 7U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5B_AXI_S 8U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5C_AXI_S 9U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5D_AXI_S 10U |
#define SDL_ECC_BUS_SAFETY_MSS_TPTC_A0_WR 11U |
#define SDL_ECC_BUS_SAFETY_MSS_TPTC_A1_WR 12U |
#define SDL_ECC_BUS_SAFETY_MSS_TPTC_B0_WR 13U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5A_AHB 14U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5B_AHB 15U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5C_AHB 16U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5D_AHB 17U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5A_AXI_WR 18U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5B_AXI_WR 19U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5C_AXI_WR 20U |
#define SDL_ECC_BUS_SAFETY_MSS_CR5D_AXI_WR 21U |
#define SDL_ECC_BUS_SAFETY_MSS_MBOX 22U |
#define SDL_ECC_BUS_SAFETY_MSS_BUS_CFG (uint32_t)SDL_MSS_CTRL_U_BASE |
#define SDL_ECC_BUS_SAFETY_DSS_BUS_CFG (uint32_t)SDL_DSS_CTRL_U_BASE |
#define SDL_DSS_CMC_COMP_U_END (SDL_DSS_CMC_COMP_U_BASE + 0X3FFCU) |
#define SDL_DSS_MCRC_U_END (SDL_DSS_MCRC_U_BASE + 0x144U) |
#define SDL_DSS_CBUFF_FIFO_U_END (SDL_DSS_CBUFF_FIFO_U_BASE + 0X3FFCU) |
#define SDL_DSS_CM4_MBOX_U_END (SDL_DSS_CM4_MBOX_U_BASE + 0XFFCU) |
#define SDL_DSS_MDO_FIFO_U_END (SDL_DSS_MDO_FIFO_U_BASE + SDL_DSS_MDO_FIFO_U_SIZE) |
#define SDL_DSS_L3_BANKA_ADDRESS SDL_DSS_L3_U_BASE |
#define SDL_DSS_L3_BANK_SIZE (0x100000U) |
#define SDL_DSS_L3_BANKB_ADDRESS SDL_DSS_L3_BANKA_ADDRESS+SDL_DSS_L3_BANK_SIZE |
#define SDL_DSS_L3_BANKC_ADDRESS SDL_DSS_L3_BANKB_ADDRESS+SDL_DSS_L3_BANK_SIZE |
#define SDL_DSS_L3_BANKD_ADDRESS SDL_DSS_L3_BANKC_ADDRESS+SDL_DSS_L3_BANK_SIZE |
#define SDL_DSS_L3_END_ADDRESS (SDL_DSS_L3_U_BASE+SDL_DSS_L3_U_SIZE) |
#define SDL_DSS_HWA_DMA0_U_BASE_END (SDL_DSS_HWA_DMA0_U_BASE+SDL_DSS_HWA_DMA0_U_SIZE) |
#define SDL_DSS_HWA_DMA1_U_BASE_END (SDL_DSS_HWA_DMA1_U_BASE+SDL_DSS_HWA_DMA1_U_SIZE) |
#define SDL_DSS_MAILBOX_U_BASE_END (SDL_DSS_MAILBOX_U_BASE+SDL_DSS_MAILBOX_U_SIZE) |
#define SDL_MSS_MBOX_U_BASE_END (SDL_MSS_MBOX_U_BASE+SDL_MSS_MAILBOX_U_SIZE) |
#define SDL_DSS_L2_U_BASE_END (SDL_DSS_L2_U_BASE+SDL_DSS_L2_U_SIZE) |
#define SDL_MSS_CTRL_R5SS0_CORE0_AHB_BASE (SDL_MSS_CTRL_R5A_AHB_BASE ) |
#define SDL_MSS_CTRL_R5SS1_CORE0_AHB_BASE (SDL_MSS_CTRL_R5B_AHB_BASE ) |
#define SDL_MSS_CTRL_R5SS0_CORE0_AHB_END (SDL_MSS_CTRL_R5A_AHB_BASE + SDL_MSS_CTRL_R5A_AHB_SIZE) |
#define SDL_MSS_CTRL_R5SS1_CORE0_AHB_END (SDL_MSS_CTRL_R5B_AHB_BASE + SDL_MSS_CTRL_R5B_AHB_SIZE) |
#define SDL_MSS_CR5A_TCM_U_BASE (SDL_MSS_TCMA_CR5A_U_BASE) |
#define SDL_MSS_CR5B_TCM_U_BASE (SDL_MSS_TCMA_CR5B_U_BASE) |
#define SDL_MSS_CR5A_TCM_U_END (SDL_MSS_TCMA_CR5A_U_BASE + SDL_MSS_TCMA_CR5A_U_SIZE) |
#define SDL_MSS_CR5B_TCM_U_END (SDL_MSS_TCMA_CR5B_U_BASE + SDL_MSS_TCMA_CR5B_U_SIZE) |