AM273x MCU+ SDK  08.02.00
CBUFF_LVDSCfg Struct Reference

Detailed Description

CBUFF LVDS Initialization configuration.

The structure describes the configuration which is required to configure the LVDS

Data Fields

uint8_t crcEnable
 Enable/Disable CRC on LVDS. More...
 
uint8_t lvdsLaneEnable
 LVDS Lane configuration: The bit mask here is used to indicate the active LVDS lanes i.e. Bit 0 implies Lane-0, Bit 1 implies Lanel-1 etc. More...
 
uint8_t msbFirst
 Set the flag to 1 to indicate that the MSB is sent first or LSB. More...
 
uint8_t ddrClockMode
 Set the flag to 1 for DDR Clock Mode and 0 for SDR. More...
 
uint8_t ddrClockModeMux
 Set the flag to 1 for DDR Mode Clock Mux and 0 for SDR Mode Clock Mux. More...
 
CBUFF_LVDSLaneFmtMap laneFormat
 LVDS Lane Format: More...
 

Field Documentation

◆ crcEnable

uint8_t CBUFF_LVDSCfg::crcEnable

Enable/Disable CRC on LVDS.

◆ lvdsLaneEnable

uint8_t CBUFF_LVDSCfg::lvdsLaneEnable

LVDS Lane configuration: The bit mask here is used to indicate the active LVDS lanes i.e. Bit 0 implies Lane-0, Bit 1 implies Lanel-1 etc.

The number of LVDS lanes is platform specific and is defined in the CBUFF platform file.

◆ msbFirst

uint8_t CBUFF_LVDSCfg::msbFirst

Set the flag to 1 to indicate that the MSB is sent first or LSB.

◆ ddrClockMode

uint8_t CBUFF_LVDSCfg::ddrClockMode

Set the flag to 1 for DDR Clock Mode and 0 for SDR.

◆ ddrClockModeMux

uint8_t CBUFF_LVDSCfg::ddrClockModeMux

Set the flag to 1 for DDR Mode Clock Mux and 0 for SDR Mode Clock Mux.

◆ laneFormat

CBUFF_LVDSLaneFmtMap CBUFF_LVDSCfg::laneFormat

LVDS Lane Format: