AM273x MCU+ SDK  08.02.00
CBUFF_EDMAInfo Struct Reference

Detailed Description

CBUFF EDMA Information block.

The structure describes the EDMA informational block which is passed to the application. The information here requires to be used by the application before performing an EDMA channel allocation.

Data Fields

EDMA_Handle edmaHandle
 EDMA Instance handle: This is the configuration which was passed by the application. Ensure that the EDMA channels are allocated from the the specified EDMA instance. More...
 
bool isFirstEDMAChannel
 Flag which if set indicates that this is the first EDMA channel which is being allocated. The first EDMA channel allocation is a special case explained below. More...
 
uint32_t dmaNum
 DMA Number: There are multiple DMA in the CBUFF driver. There exists a mapping between the CBUFF DMA number and the corresponding hardwired EDMA channel. More...
 

Field Documentation

◆ edmaHandle

EDMA_Handle CBUFF_EDMAInfo::edmaHandle

EDMA Instance handle: This is the configuration which was passed by the application. Ensure that the EDMA channels are allocated from the the specified EDMA instance.

◆ isFirstEDMAChannel

bool CBUFF_EDMAInfo::isFirstEDMAChannel

Flag which if set indicates that this is the first EDMA channel which is being allocated. The first EDMA channel allocation is a special case explained below.

◆ dmaNum

uint32_t CBUFF_EDMAInfo::dmaNum

DMA Number: There are multiple DMA in the CBUFF driver. There exists a mapping between the CBUFF DMA number and the corresponding hardwired EDMA channel.

Please be aware that the CBUFF EDMA transfers are kicked in automatically by the hardware. The AWR294x has a special CBUFF EDMA Physical channel which has been allocated for this purpose and which should not be used for any other reason. Each DMA Number is associated with a corresponding EDMA channel.

DMA Number EDMA Physical Channel(s)
18 EDMA_DSS_TPCC_A_EVT_CBUFF_DMA_REQ0, EDMA_DSS_TPCC_B_EVT_CBUFF_DMA_REQ0, EDMA_DSS_TPCC_C_EVT_CBUFF_DMA_REQ0
19 EDMA_DSS_TPCC_A_EVT_CBUFF_DMA_REQ1, EDMA_DSS_TPCC_B_EVT_CBUFF_DMA_REQ1, EDMA_DSS_TPCC_C_EVT_CBUFF_DMA_REQ1
20 EDMA_DSS_TPCC_A_EVT_CBUFF_DMA_REQ2, EDMA_DSS_TPCC_B_EVT_CBUFF_DMA_REQ2, EDMA_DSS_TPCC_C_EVT_CBUFF_DMA_REQ2
21 EDMA_DSS_TPCC_A_EVT_CBUFF_DMA_REQ3, EDMA_DSS_TPCC_B_EVT_CBUFF_DMA_REQ3, EDMA_DSS_TPCC_C_EVT_CBUFF_DMA_REQ3
22 EDMA_DSS_TPCC_A_EVT_CBUFF_DMA_REQ4, EDMA_DSS_TPCC_B_EVT_CBUFF_DMA_REQ4, EDMA_DSS_TPCC_C_EVT_CBUFF_DMA_REQ4
23 EDMA_DSS_TPCC_A_EVT_CBUFF_DMA_REQ5, EDMA_DSS_TPCC_B_EVT_CBUFF_DMA_REQ5, EDMA_DSS_TPCC_C_EVT_CBUFF_DMA_REQ5
24 EDMA_DSS_TPCC_A_EVT_CBUFF_DMA_REQ6, EDMA_DSS_TPCC_B_EVT_CBUFF_DMA_REQ6, EDMA_DSS_TPCC_C_EVT_CBUFF_DMA_REQ6

Please ensure that the first EDMA channel for the specified DMA number has to be from the table above. There is no restriction on subsequent EDMA channel allocations. This table needs to be enforced if the 'isFirstEDMAChannel' is set to true.

NOTE: The CBUFF driver will fail the session creation if the above table is not enforced.