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AM273x MCU+ SDK
08.02.00
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AM273x MCU+ SDK
08.02.00
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Go to the source code of this file.
Macros | |
SOC Domain ID | |
| #define | SOC_DOMAIN_ID_MSS_TOP_RCM (0U) |
| #define | SOC_DOMAIN_ID_MSS_RCM (1U) |
| #define | SOC_DOMAIN_ID_DSS_RCM (2U) |
| #define | SOC_DOMAIN_ID_RCSS_RCM (3U) |
| #define | SOC_DOMAIN_ID_MSS_CTRL (4U) |
| #define | SOC_DOMAIN_ID_DSS_CTRL (5U) |
| #define | SOC_DOMAIN_ID_RCSS_CTRL (6U) |
| #define | SOC_DOMAIN_ID_MSS_IOMUX (7U) |
Functions | |
| int32_t | SOC_moduleClockEnable (uint32_t moduleId, uint32_t enable) |
| Enable clock to specified module. More... | |
| int32_t | SOC_moduleSetClockFrequency (uint32_t moduleId, uint32_t clkId, uint64_t clkRate) |
| Set module clock to specified frequency. More... | |
| const char * | SOC_getCoreName (uint16_t coreId) |
| Convert a core ID to a user readable name. More... | |
| uint64_t | SOC_getSelfCpuClk (void) |
| Get the clock frequency in Hz of the CPU on which the driver is running. More... | |
| void | SOC_controlModuleLockMMR (uint32_t domainId, uint32_t partition) |
| Lock control module partition to prevent writes into control MMRs. More... | |
| void | SOC_controlModuleUnlockMMR (uint32_t domainId, uint32_t partition) |
| Unlock control module partition to allow writes into control MMRs. More... | |
| void | SOC_setEpwmTbClk (uint32_t epwmInstance, uint32_t enable) |
| Enable or disable ePWM time base clock from Control MMR. More... | |
| uint64_t | SOC_virtToPhy (void *virtAddr) |
| SOC Virtual (CPU) to Physical address translation function. More... | |
| void * | SOC_phyToVirt (uint64_t phyAddr) |
| Physical to Virtual (CPU) address translation function. More... | |
| void | SOC_logAllClockHz () |
| Print's module clock info to the console. More... | |
1.8.20