Macros | |
#define | STC_MSS_INTERVAL_NUM (uint32_t)(1U) |
#define | STC_MSS_LP_SCAN_MODE (uint32_t)(0U) |
#define | STC_MSS_CODEC_SPREAD_MODE (uint32_t)(1U) |
#define | STC_MSS_CAP_IDLE_CYCLE (uint32_t)(3U) |
#define | STC_MSS_SCANEN_HIGH_CAP_IDLE_CYCLE (uint32_t)(3U) |
#define | STC_MSS_MAX_RUN_TIME (uint32_t)(0xFFFFFFFFU) |
#define | STC_MSS_CLK_DIV (uint32_t)(1U) |
#define | STC_ROM_START_ADDRESS (uint32_t)(0U) |
#define | STC_ROM_START_ADDRESS (uint32_t)(0U) |
#define | STC_pROM_START_ADDRESS (uint32_t)(1U) |
#define | STC_pROM_START_ADDRESS (uint32_t)(1U) |
#define | STC_DSS_INTERVAL_NUM (uint32_t)(1U) |
#define | STC_DSS_LP_SCAN_MODE (uint32_t)(0U) |
#define | STC_DSS_CODEC_SPREAD_MODE (uint32_t)(1U) |
#define | STC_DSS_CAP_IDLE_CYCLE (uint32_t)(3U) |
#define | STC_DSS_SCANEN_HIGH_CAP_IDLE_CYCLE (uint32_t)(3U) |
#define | STC_DSS_MAX_RUN_TIME (uint32_t)(0xFFFFFFFFU) |
#define | STC_DSS_CLK_DIV (uint32_t)(1U) |
#define STC_MSS_INTERVAL_NUM (uint32_t)(1U) |
#define STC_MSS_LP_SCAN_MODE (uint32_t)(0U) |
#define STC_MSS_CODEC_SPREAD_MODE (uint32_t)(1U) |
#define STC_MSS_CAP_IDLE_CYCLE (uint32_t)(3U) |
#define STC_MSS_SCANEN_HIGH_CAP_IDLE_CYCLE (uint32_t)(3U) |
#define STC_MSS_MAX_RUN_TIME (uint32_t)(0xFFFFFFFFU) |
#define STC_MSS_CLK_DIV (uint32_t)(1U) |
#define STC_ROM_START_ADDRESS (uint32_t)(0U) |
#define STC_ROM_START_ADDRESS (uint32_t)(0U) |
#define STC_pROM_START_ADDRESS (uint32_t)(1U) |
#define STC_pROM_START_ADDRESS (uint32_t)(1U) |
#define STC_DSS_INTERVAL_NUM (uint32_t)(1U) |
#define STC_DSS_LP_SCAN_MODE (uint32_t)(0U) |
#define STC_DSS_CODEC_SPREAD_MODE (uint32_t)(1U) |
#define STC_DSS_CAP_IDLE_CYCLE (uint32_t)(3U) |
#define STC_DSS_SCANEN_HIGH_CAP_IDLE_CYCLE (uint32_t)(3U) |
#define STC_DSS_MAX_RUN_TIME (uint32_t)(0xFFFFFFFFU) |
#define STC_DSS_CLK_DIV (uint32_t)(1U) |