Sub Modules | |
CPSW Management Data Input/Output (MDIO) | |
Data Structures | |
struct | EnetMdio_C22ReadInArgs |
Input args for ENET_MDIO_IOCTL_C22_READ command. More... | |
struct | EnetMdio_C45ReadInArgs |
Input args for ENET_MDIO_IOCTL_C45_READ command. More... | |
struct | EnetMdio_C22WriteInArgs |
Input args for ENET_MDIO_IOCTL_C22_WRITE command. More... | |
struct | EnetMdio_C45WriteInArgs |
Input args for ENET_MDIO_IOCTL_C45_WRITE command. More... | |
Macros | |
#define | ENET_MDIO_FEAT_CLAUSE45 (ENET_BIT(0U)) |
MDIO feature mask for Clause-45 support. More... | |
#define | ENET_MDIO_FEAT_PHY_MONITOR (ENET_BIT(1U)) |
MDIO feature mask for PHY state change monitoring. More... | |
#define | ENET_MDIO_PUBLIC_IOCTL(x) |
Helper macro to create IOCTL commands for MDIO module. More... | |
#define | ENET_MDIO_PRIVATE_IOCTL(x) |
Helper macro to create private IOCTL commands for MDIO module. More... | |
#define | ENET_MDIO_PHY_ADDR_MASK(addr) (ENET_BIT(addr)) |
Create a MDIO PHY mask from a PHY address. More... | |
#define | ENET_MDIO_IS_PHY_ADDR_SET(mask, addr) (((mask) & ENET_BIT(addr)) != 0U) |
Check if the corresponding PHY address mask is set. More... | |
#define | ENET_MDIO_PHY_ADDR_MASK_NONE (0x00000000U) |
MDIO PHY address mask for no PHYs present. More... | |
#define | ENET_MDIO_PHY_ADDR_MASK_ALL (0xFFFFFFFFU) |
MDIO PHY address mask for all PHYs present. More... | |
#define | ENET_MDIO_PHY_CNT_MAX (31U) |
Maximum number of PHYs supported on the MDIO bus. More... | |
#define ENET_MDIO_FEAT_CLAUSE45 (ENET_BIT(0U)) |
MDIO feature mask for Clause-45 support.
#define ENET_MDIO_FEAT_PHY_MONITOR (ENET_BIT(1U)) |
MDIO feature mask for PHY state change monitoring.
#define ENET_MDIO_PUBLIC_IOCTL | ( | x | ) |
Helper macro to create IOCTL commands for MDIO module.
#define ENET_MDIO_PRIVATE_IOCTL | ( | x | ) |
Helper macro to create private IOCTL commands for MDIO module.
#define ENET_MDIO_PHY_ADDR_MASK | ( | addr | ) | (ENET_BIT(addr)) |
Create a MDIO PHY mask from a PHY address.
#define ENET_MDIO_IS_PHY_ADDR_SET | ( | mask, | |
addr | |||
) | (((mask) & ENET_BIT(addr)) != 0U) |
Check if the corresponding PHY address mask is set.
#define ENET_MDIO_PHY_ADDR_MASK_NONE (0x00000000U) |
MDIO PHY address mask for no PHYs present.
#define ENET_MDIO_PHY_ADDR_MASK_ALL (0xFFFFFFFFU) |
MDIO PHY address mask for all PHYs present.
#define ENET_MDIO_PHY_CNT_MAX (31U) |
Maximum number of PHYs supported on the MDIO bus.
enum EnetMdio_Ioctl |
MDIO IOCTL commands.
Enumerator | |
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ENET_MDIO_IOCTL_GET_VERSION | Get the hardware version of the MDIO module. IOCTL parameters:
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ENET_MDIO_IOCTL_PRINT_REGS | Print MDIO registers. IOCTL parameters:
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ENET_MDIO_IOCTL_IS_ALIVE | Get PHY alive status. IOCTL parameters:
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ENET_MDIO_IOCTL_IS_LINKED | Get PHY link status. IOCTL parameters:
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ENET_MDIO_IOCTL_IS_POLL_ENABLED | Get link state change poll enable status. Checks if PHY state change is being monitored for the given PHY address regardless of the underlying monitoring mechanism or mode. IOCTL parameters:
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ENET_MDIO_IOCTL_C22_READ | Read a PHY register using clause-22 frame. IOCTL parameters:
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ENET_MDIO_IOCTL_C22_WRITE | Write a PHY register using clause-22 frame. IOCTL parameters:
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ENET_MDIO_IOCTL_C45_READ | Read a PHY register using clause-45 frame. IOCTL parameters:
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ENET_MDIO_IOCTL_C45_WRITE | Write a PHY register using clause-45 frame. IOCTL parameters:
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ENET_MDIO_IOCTL_C22_ASYNC_READ_TRIGGER | Trigger Asynchronous read to PHY register. IOCTL parameters:
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ENET_MDIO_IOCTL_C22_ASYNC_READ_COMPLETE | Checks for async read completion to PHY register. IOCTL parameters:
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ENET_MDIO_IOCTL_C22_ASYNC_WRITE_TRIGGER | Trigger Asynchronous Write to PHY register. IOCTL parameters:
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ENET_MDIO_IOCTL_C22_ASYNC_WRITE_COMPLETE | Checks for async Write completion to PHY register. IOCTL parameters:
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ENET_MDIO_IOCTL_C45_ASYNC_READ_TRIGGER | Trigger Asynchronous Read to PHY register using clause-45 frame. IOCTL parameters:
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ENET_MDIO_IOCTL_C45_ASYNC_READ_COMPLETE | Checks for async Read completion to PHY register using clause-45 frame. IOCTL parameters:
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ENET_MDIO_IOCTL_C45_ASYNC_WRITE_TRIGGER | Trigger Asynchronous Write to PHY register using clause-45 frame. IOCTL parameters:
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ENET_MDIO_IOCTL_C45_ASYNC_WRITE_COMPLETE | Checks for async Write completion to PHY register using clause-45 frame. IOCTL parameters:
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ENET_MDIO_IOCTL_ENABLE_STATE_MACHINE | Enable MDIO state machine. Use. If Mdio_Cfg.disableStateMachineOnInit is set, this IOCTL allows enabling Mdio state machine via IOCTL. This is used for sequencing external PHY management operation with MDIO state machine so that any link interrupts are not missed and MDIO state machine is enabled only after PHY initialization is complete IOCTL parameters:
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enum EnetMdio_Group |
enum EnetMdio_FrameFmt |
enum EnetMdio_C45Mmd |