cmpss/v0/cmpss.h

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/********************************************************************
 * Copyright (C) 2021 Texas Instruments Incorporated.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef CMPSS_V0_H_
#define CMPSS_V0_H_
 
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
 
//*****************************************************************************
//
//
//*****************************************************************************
 
#include <stdbool.h>
#include <stdint.h>
#include <drivers/hw_include/cslr_cmpss.h>
#include <drivers/hw_include/cslr_soc.h>
#include <drivers/hw_include/hw_types.h>
#include <kernel/dpl/DebugP.h>
 
//*****************************************************************************
//
// Useful defines used within the driver functions. Not intended for use by
// application code.
//
//*****************************************************************************
#define CMPSS_HICMP_CTL_M   (CSL_CMPSSA_COMPCTL_COMPHSOURCE_MASK | \
                             CSL_CMPSSA_COMPCTL_COMPHINV_MASK |    \
                             CSL_CMPSSA_COMPCTL_ASYNCHEN_MASK)
 
#define CMPSS_LOCMP_CTL_M   (CSL_CMPSSA_COMPCTL_COMPLSOURCE_MASK | \
                             CSL_CMPSSA_COMPCTL_COMPLINV_MASK |    \
                             CSL_CMPSSA_COMPCTL_ASYNCLEN_MASK)
 
//*****************************************************************************
//
// Values that can be passed to CMPSS_configLowComparator() and
// CMPSS_configHighComparator() as the config parameter.
//
//*****************************************************************************
//
// Comparator negative input source
//
#define CMPSS_INSRC_DAC    (0x0000U)
#define CMPSS_INSRC_PIN    (0x0001U)
 
//
// Extra options
//
#define CMPSS_INV_INVERTED    (0x0002U)
#define CMPSS_OR_ASYNC_OUT_W_FILT    (0x0040U)
 
//*****************************************************************************
//
// Values that can be passed to CMPSS_configOutputsLow() and
// CMPSS_configOutputsHigh() as the config parameter.
//
//*****************************************************************************
//
// Signal driving CTRIPOUT
//
#define CMPSS_TRIPOUT_ASYNC_COMP    (0x0000U)
#define CMPSS_TRIPOUT_SYNC_COMP    (0x0010U)
#define CMPSS_TRIPOUT_FILTER    (0x0020U)
#define CMPSS_TRIPOUT_LATCH    (0x0030U)
 
//
// Signal driving CTRIP
//
#define CMPSS_TRIP_ASYNC_COMP    (0x0000U)
#define CMPSS_TRIP_SYNC_COMP    (0x0004U)
#define CMPSS_TRIP_FILTER    (0x0008U)
#define CMPSS_TRIP_LATCH    (0x000CU)
 
//*****************************************************************************
//
// Values that can be returned by CMPSS_getStatus().
//
//*****************************************************************************
#define CMPSS_STS_HI_FILTOUT    (0x0001U)
#define CMPSS_STS_HI_LATCHFILTOUT    (0x0002U)
#define CMPSS_STS_LO_FILTOUT    (0x0100U)
#define CMPSS_STS_LO_LATCHFILTOUT    (0x0200U)
 
//*****************************************************************************
//
// Values that can be passed to CMPSS_configDAC() the config parameter.
//
//*****************************************************************************
//
// When is DAC value loaded from shadow register
//
#define CMPSS_DACVAL_SYSCLK    (0x0000U)
#define CMPSS_DACVAL_PWMSYNC    (0x0080U)
 
//
// DAC reference voltage
//
#define CMPSS_DACREF_VDDA    (0x0000U)
#define CMPSS_DACREF_VDAC    (0x0020U)
 
//
// DAC value source
//
#define CMPSS_DACSRC_SHDW    (0x0000U)
#define CMPSS_DACSRC_RAMP    (0x0001U)
 
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_enableModule(uint32_t base)
{
    //
    // Set the bit that enables the CMPSS module.
    //
    HW_WR_REG16((base + CSL_CMPSSA_COMPCTL),
        HW_RD_REG16(base + CSL_CMPSSA_COMPCTL) |
        CSL_CMPSSA_COMPCTL_COMPDACE_MASK);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_disableModule(uint32_t base)
{
    //
    // Clear the bit that enables the CMPSS module.
    //
    HW_WR_REG16((base + CSL_CMPSSA_COMPCTL),
        HW_RD_REG16(base + CSL_CMPSSA_COMPCTL) &
        ~CSL_CMPSSA_COMPCTL_COMPDACE_MASK);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_configHighComparator(uint32_t base, uint16_t config)
{
    //
    // Write the high comparator configuration to the appropriate register.
    //
    HW_WR_REG16((base + CSL_CMPSSA_COMPCTL),
        (HW_RD_REG16(base + CSL_CMPSSA_COMPCTL) & ~CMPSS_HICMP_CTL_M) | config);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_configLowComparator(uint32_t base, uint16_t config)
{
    //
    // Write the low comparator configuration to the appropriate register.
    //
    HW_WR_REG16((base + CSL_CMPSSA_COMPCTL),
        (HW_RD_REG16(base + CSL_CMPSSA_COMPCTL) & ~CMPSS_LOCMP_CTL_M) |
        (config << 8U));
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_configOutputsHigh(uint32_t base, uint16_t config)
{
    //
    // Write the high comparator output settings to the appropriate register.
    //
    HW_WR_REG16((base + CSL_CMPSSA_COMPCTL),
        (HW_RD_REG16(base + CSL_CMPSSA_COMPCTL) &
        ~(CSL_CMPSSA_COMPCTL_CTRIPOUTHSEL_MASK |
        CSL_CMPSSA_COMPCTL_CTRIPHSEL_MASK)) | config);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_configOutputsLow(uint32_t base, uint16_t config)
{
    //
    // Write the low comparator output settings to the appropriate register.
    //
    HW_WR_REG16((base + CSL_CMPSSA_COMPCTL),
        (HW_RD_REG16(base + CSL_CMPSSA_COMPCTL) &
        ~(CSL_CMPSSA_COMPCTL_CTRIPOUTLSEL_MASK |
        CSL_CMPSSA_COMPCTL_CTRIPLSEL_MASK)) | (config << 8U));
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline uint16_t
CMPSS_getStatus(uint32_t base)
{
    //
    // Return contents of the status register.
    //
    return(HW_RD_REG16(base + CSL_CMPSSA_COMPSTS));
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_configDAC(uint32_t base, uint16_t config)
{
    //
    // Write the DAC configuration to the appropriate register.
    //
    HW_WR_REG16((base + CSL_CMPSSA_COMPDACCTL),
        (HW_RD_REG16(base + CSL_CMPSSA_COMPDACCTL) &
        ~(CSL_CMPSSA_COMPDACCTL_SWLOADSEL_MASK |
        CSL_CMPSSA_COMPDACCTL_SELREF_MASK |
        CSL_CMPSSA_COMPDACCTL_DACSOURCE_MASK)) | config);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_setDACValueHigh(uint32_t base, uint16_t value)
{
    DebugP_assert(value < 4096U);
 
    //
    // Write the DAC value to the DAC value shadow register.
    //
    HW_WR_REG16((base + CSL_CMPSSA_DACHVALS), value);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_setDACValueLow(uint32_t base, uint16_t value)
{
    DebugP_assert(value < 4096U);
 
    //
    // Write the DAC value to the DAC value shadow register.
    //
    HW_WR_REG16((base + CSL_CMPSSA_DACLVALS), value);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_initFilterHigh(uint32_t base)
{
    //
    // Set the high comparator filter initialization bit.
    //
    HW_WR_REG16((base + CSL_CMPSSA_CTRIPHFILCTL),
        HW_RD_REG16(base + CSL_CMPSSA_CTRIPHFILCTL) |
        CSL_CMPSSA_CTRIPHFILCTL_FILINIT_MASK);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_initFilterLow(uint32_t base)
{
    //
    // Set the low comparator filter initialization bit.
    //
    HW_WR_REG16((base + CSL_CMPSSA_CTRIPLFILCTL),
        HW_RD_REG16(base + CSL_CMPSSA_CTRIPLFILCTL) |
        CSL_CMPSSA_CTRIPLFILCTL_FILINIT_MASK);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline uint16_t
CMPSS_getDACValueHigh(uint32_t base)
{
    //
    // Write the DAC value to the DAC value shadow register.
    //
    return(HW_RD_REG16(base + CSL_CMPSSA_DACHVALA));
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline uint16_t
CMPSS_getDACValueLow(uint32_t base)
{
    //
    // Write the DAC value to the DAC value shadow register.
    //
    return(HW_RD_REG16(base + CSL_CMPSSA_DACLVALA));
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_clearFilterLatchHigh(uint32_t base)
{
    //
    // Set the bit that generates a reset pulse to the digital filter latch.
    //
    HW_WR_REG16((base + CSL_CMPSSA_COMPSTSCLR),
        HW_RD_REG16(base + CSL_CMPSSA_COMPSTSCLR) |
        CSL_CMPSSA_COMPSTSCLR_HLATCHCLR_MASK);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_clearFilterLatchLow(uint32_t base)
{
    //
    // Set the bit that generates a reset pulse to the digital filter latch.
    //
    HW_WR_REG16((base + CSL_CMPSSA_COMPSTSCLR),
        HW_RD_REG16(base + CSL_CMPSSA_COMPSTSCLR) |
        CSL_CMPSSA_COMPSTSCLR_LLATCHCLR_MASK);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_setMaxRampValue(uint32_t base,  uint16_t value)
{
    //
    // Write the maximum ramp value to the shadow register.
    //
    HW_WR_REG16((base + CSL_CMPSSA_RAMPMAXREFS), value);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline uint16_t
CMPSS_getMaxRampValue(uint32_t base)
{
    //
    // Read the maximum ramp value from the register.
    //
    return(HW_RD_REG16(base + CSL_CMPSSA_RAMPMAXREFA));
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_setRampDecValue(uint32_t base, uint16_t value)
{
    //
    // Write the ramp decrement value to the shadow register.
    //
    HW_WR_REG16((base + CSL_CMPSSA_RAMPDECVALS), value);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline uint16_t
CMPSS_getRampDecValue(uint32_t base)
{
    //
    // Read the ramp decrement value from the register.
    //
    return(HW_RD_REG16(base + CSL_CMPSSA_RAMPDECVALA));
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_setRampDelayValue(uint32_t base, uint16_t value)
{
    DebugP_assert(value < 8192U);
 
    //
    // Write the ramp delay value to the shadow register.
    //
    HW_WR_REG16((base + CSL_CMPSSA_RAMPDLYS), value);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline uint16_t
CMPSS_getRampDelayValue(uint32_t base)
{
    //
    // Read the ramp delay value from the register.
    //
    return(HW_RD_REG16(base + CSL_CMPSSA_RAMPDLYA));
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_configBlanking(uint32_t base, uint16_t pwmBlankSrc)
{
    DebugP_assert((pwmBlankSrc >= 1U) && (pwmBlankSrc <= 32U));
 
    //
    // Write the blank source number to the appropriate register.
    //
 
    //Program COMPDACCTL and COMPDACCTL2
    HW_WR_REG16((base + CSL_CMPSSA_COMPDACCTL),
        (HW_RD_REG16(base + CSL_CMPSSA_COMPDACCTL) &
        ~CSL_CMPSSA_COMPDACCTL_BLANKSOURCE_MASK) | (((pwmBlankSrc - 1U)&0xF) <<
        CSL_CMPSSA_COMPDACCTL_BLANKSOURCE_SHIFT));
 
 
    HW_WR_REG16((base + CSL_CMPSSA_COMPDACCTL2),
        (HW_RD_REG16(base + CSL_CMPSSA_COMPDACCTL2) &
        ~CSL_CMPSSA_COMPDACCTL2_BLANKSOURCEUSEL_MASK) | ((((pwmBlankSrc-1)>>4) <<
        CSL_CMPSSA_COMPDACCTL2_BLANKSOURCEUSEL_SHIFT) &
        CSL_CMPSSA_COMPDACCTL2_BLANKSOURCEUSEL_MASK));
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_enableBlanking(uint32_t base)
{
    //
    // Set the bit that enables the PWMBLANK signal.
    //
    HW_WR_REG16((base + CSL_CMPSSA_COMPDACCTL),
        HW_RD_REG16(base + CSL_CMPSSA_COMPDACCTL) |
        CSL_CMPSSA_COMPDACCTL_BLANKEN_MASK);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_disableBlanking(uint32_t base)
{
    //
    // Clear the bit that enables the PWMBLANK signal.
    //
    HW_WR_REG16((base + CSL_CMPSSA_COMPDACCTL),
        HW_RD_REG16(base + CSL_CMPSSA_COMPDACCTL) &
        ~CSL_CMPSSA_COMPDACCTL_BLANKEN_MASK);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_enableDEmode(uint32_t base)
{
    HW_WR_REG16((base + CSL_CMPSSA_COMPDACCTL2),
        HW_RD_REG16(base + CSL_CMPSSA_COMPDACCTL2) |
        (0x1<<CSL_CMPSSA_COMPDACCTL2_DEENABLE_SHIFT) &
        CSL_CMPSSA_COMPDACCTL2_DEENABLE_MASK);
 
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_disableDEmode(uint32_t base)
{
    HW_WR_REG16((base + CSL_CMPSSA_COMPDACCTL2),
        HW_RD_REG16(base + CSL_CMPSSA_COMPDACCTL2) &
        ~((0x1<<CSL_CMPSSA_COMPDACCTL2_DEENABLE_SHIFT) &
        CSL_CMPSSA_COMPDACCTL2_DEENABLE_MASK));
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_selectDEACTIVESource(uint32_t base, uint8_t deactivesel)
{
    HW_WR_REG16((base + CSL_CMPSSA_COMPDACCTL2),
        (HW_RD_REG16(base + CSL_CMPSSA_COMPDACCTL2) &
        ~CSL_CMPSSA_COMPDACCTL2_DEACTIVESEL_MASK) |
        ((deactivesel << CSL_CMPSSA_COMPDACCTL2_DEACTIVESEL_SHIFT) &
        CSL_CMPSSA_COMPDACCTL2_DEACTIVESEL_MASK));
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_configHighDACShadowValue2(uint32_t base, uint16_t dacval)
{
    HW_WR_REG16((base + CSL_CMPSSA_DACHVALS2),
       dacval & CSL_CMPSSA_DACHVALS2_DACVAL_MASK);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_configLowDACShadowValue2(uint32_t base, uint16_t dacval)
{
    HW_WR_REG16((base + CSL_CMPSSA_DACLVALS2),
        dacval & CSL_CMPSSA_DACLVALS2_DACVAL_MASK);
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_setComparatorHighHysteresis(uint32_t base, uint16_t value)
{
    HW_WR_REG16((base + CSL_CMPSSA_CONFIG1),
        CSL_CMPSSA_CONFIG1_COMPHHYS_MASK &
        (value << CSL_CMPSSA_CONFIG1_COMPHHYS_SHIFT));
}
 
//*****************************************************************************
//
//
//*****************************************************************************
static inline void
CMPSS_setComparatorLowHysteresis(uint32_t base, uint16_t value)
{
    HW_WR_REG16((base + CSL_CMPSSA_CONFIG1),
        CSL_CMPSSA_CONFIG1_COMPLHYS_MASK &
        (value << CSL_CMPSSA_CONFIG1_COMPLHYS_SHIFT));
}
 
 
//*****************************************************************************
//
//
//*****************************************************************************
extern void
CMPSS_configFilterHigh(uint32_t base, uint16_t samplePrescale,
                       uint16_t sampleWindow, uint16_t threshold);
 
//*****************************************************************************
//
//
//*****************************************************************************
extern void
CMPSS_configFilterLow(uint32_t base, uint16_t samplePrescale,
                      uint16_t sampleWindow, uint16_t threshold);
 
//*****************************************************************************
//
//
//*****************************************************************************
extern void
CMPSS_configLatchOnPWMSYNC(uint32_t base, bool highEnable, bool lowEnable);
 
//*****************************************************************************
//
//
//*****************************************************************************
extern void
CMPSS_configRamp(uint32_t base, uint16_t maxRampVal, uint16_t decrementVal,
                 uint16_t delayVal, uint16_t pwmSyncSrc, bool useRampValShdw);
 
//*****************************************************************************
//
// Close the Doxygen group.
//
//*****************************************************************************
 
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
 
#endif // CMPSS_V0_H_