Data Fields
volatile uint32_t	TSENSE_CFG

volatile uint32_t	TSENSE_STATUS

volatile uint32_t	TSENSE_STATUS_RAW

volatile uint32_t	RSVD0 [4]

volatile uint32_t	TSENSE0_TSHUT

volatile uint32_t	TSENSE0_ALERT

volatile uint32_t	TSENSE0_CNTL

volatile uint32_t	TSENSE0_RESULT

volatile uint32_t	TSENSE0_DATA0

volatile uint32_t	TSENSE0_DATA1

volatile uint32_t	TSENSE0_DATA2

volatile uint32_t	TSENSE0_DATA3

volatile uint32_t	TSENSE0_ACCU

volatile uint32_t	RSVD1 [12]

volatile uint32_t	TSENSE1_TSHUT

volatile uint32_t	TSENSE1_ALERT

volatile uint32_t	TSENSE1_CNTL

volatile uint32_t	TSENSE1_RESULT

volatile uint32_t	TSENSE1_DATA0

volatile uint32_t	TSENSE1_DATA1

volatile uint32_t	TSENSE1_DATA2

volatile uint32_t	TSENSE1_DATA3

volatile uint32_t	TSENSE1_ACCU

volatile uint32_t	RSVD3 [24]

volatile uint32_t	TSENSE2_RESULT

volatile uint32_t	RSVD4 [44]

volatile uint32_t	TSENSE3_RESULT

Field Documentation

◆ TSENSE_CFG

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE_CFG

◆ TSENSE_STATUS

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE_STATUS

◆ TSENSE_STATUS_RAW

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE_STATUS_RAW

◆ RSVD0

volatile uint32_t SDL_VTM_cfg1Regs::RSVD0[4]

◆ TSENSE0_TSHUT

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE0_TSHUT

◆ TSENSE0_ALERT

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE0_ALERT

◆ TSENSE0_CNTL

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE0_CNTL

◆ TSENSE0_RESULT

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE0_RESULT

◆ TSENSE0_DATA0

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE0_DATA0

◆ TSENSE0_DATA1

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE0_DATA1

◆ TSENSE0_DATA2

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE0_DATA2

◆ TSENSE0_DATA3

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE0_DATA3

◆ TSENSE0_ACCU

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE0_ACCU

◆ RSVD1

volatile uint32_t SDL_VTM_cfg1Regs::RSVD1[12]

◆ TSENSE1_TSHUT

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE1_TSHUT

◆ TSENSE1_ALERT

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE1_ALERT

◆ TSENSE1_CNTL

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE1_CNTL

◆ TSENSE1_RESULT

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE1_RESULT

◆ TSENSE1_DATA0

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE1_DATA0

◆ TSENSE1_DATA1

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE1_DATA1

◆ TSENSE1_DATA2

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE1_DATA2

◆ TSENSE1_DATA3

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE1_DATA3

◆ TSENSE1_ACCU

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE1_ACCU

◆ RSVD3

volatile uint32_t SDL_VTM_cfg1Regs::RSVD3[24]

◆ TSENSE2_RESULT

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE2_RESULT

◆ RSVD4

volatile uint32_t SDL_VTM_cfg1Regs::RSVD4[44]

◆ TSENSE3_RESULT

volatile uint32_t SDL_VTM_cfg1Regs::TSENSE3_RESULT

Data Fields