AM263Px MCU+ SDK  10.01.00

Introduction

This module contains APIs to program and use the RTI module.

Files

file  rti/v0/rti.h
 RTI Driver API/interface file.
 

Functions

int32_t RTIG_setStallMode (uint32_t baseAddr, uint32_t stallMode)
 Set the stall mode in RTI Global Control. More...
 
int32_t RTI_counterEnable (uint32_t baseAddr, uint32_t cntIndex)
 Start the timer. More...
 
int32_t RTI_counterDisable (uint32_t baseAddr, uint32_t cntIndex)
 Stop the timer. More...
 
int32_t RTI_counterClear (uint32_t baseAddr, uint32_t cntIndex)
 Clear Timer Counter block. More...
 
int32_t RTI_compareClear (uint32_t baseAddr, uint32_t cmpIndex)
 Clear Timer Compare block. More...
 
int32_t RTI_counterGet (uint32_t baseAddr, uint32_t cntIndex, uint32_t *counterLow, uint32_t *counterHigh)
 Get/Read the counter value from the counter registers. More...
 
int32_t RTI_captureConfig (uint32_t baseAddr, uint32_t cntIndex, uint32_t cntrCapSrc)
 Configure Capture operation. More...
 
int32_t RTI_captureCounterGet (uint32_t baseAddr, uint32_t cntIndex, uint32_t *counterLow, uint32_t *counterHigh)
 Get/Read the counter value from the capture registers. More...
 
int32_t RTI_compareEventConfig (uint32_t baseAddr, uint32_t cmpIndex, uint32_t cntBlkIndex, uint32_t cmpVal, uint32_t period)
 Confiure Compare operation. More...
 
int32_t RTI_counterConfigure (uint32_t baseAddr, uint32_t cntBlkIndex, uint32_t clkSrc, uint32_t ntu, uint32_t prescaler)
 Confiure Compare operation. More...
 
uint32_t RTI_compareGet (uint32_t baseAddr, uint32_t cmpIndex)
 Get the compare match register contents. More...
 
int32_t RTI_compareClearConfig (uint32_t baseAddr, uint32_t cmpIndex, uint32_t cmpClearVal)
 Confiure Compare Clear operation. More...
 
uint32_t RTI_intStatusGet (uint32_t baseAddr)
 Read the status of INTFLAG register. More...
 
int32_t RTI_intStatusClear (uint32_t baseAddr, uint32_t intFlags)
 Clear the status of interrupt events. More...
 
int32_t RTI_intEnable (uint32_t baseAddr, uint32_t intFlags)
 Enable the Timer interrupts. More...
 
int32_t RTI_intDisable (uint32_t baseAddr, uint32_t intFlags)
 Disable the Timer interrupts. More...
 
int32_t RTI_intAutoClearEnable (uint32_t baseAddr, uint32_t cmpIndex)
 Enable the Compare interrupt auto clear. More...
 
int32_t RTI_intAutoClearDisable (uint32_t baseAddr, uint32_t cmpIndex)
 Disable the Compare interrupt auto clear. More...
 

RTI Global Control Stall Modes

Macro to select the stall mode in RTI Global Control.

The counters can be either stopped or running while in debug halting mode.

#define RTI_GC_STALL_MODE_ON   (CSL_RTI_RTIGCTRL_COS_STOPPED)
 The counters will be stopped while in debug halting mode. More...
 
#define RTI_GC_STALL_MODE_OFF   (CSL_RTI_RTIGCTRL_COS_RUNNING)
 The counters will be running while in debug halting mode. More...
 

RTI Timer Counter Block Indexes

RTI Timer contains two counter blocks

#define RTI_TMR_CNT_BLK_INDEX_0   (0U)
 RTI Timer counter block 0. More...
 
#define RTI_TMR_CNT_BLK_INDEX_1   (1U)
 RTI Timer counter block 1. More...
 
#define RTI_TMR_CNT_BLK_INDEX_MAX   (RTI_TMR_CNT_BLK_INDEX_1)
 RTI Timer counter block maximum. More...
 

RTI Timer Compare Block Indexes

RTI Timer contains four compare blocks

#define RTI_TMR_CMP_BLK_INDEX_0   (0U)
 RTI Timer compare block 0. More...
 
#define RTI_TMR_CMP_BLK_INDEX_1   (1U)
 RTI Timer compare block 1. More...
 
#define RTI_TMR_CMP_BLK_INDEX_2   (2U)
 RTI Timer compare block 2. More...
 
#define RTI_TMR_CMP_BLK_INDEX_3   (3U)
 RTI Timer compare block 3. More...
 
#define RTI_TMR_CMP_BLK_INDEX_MAX   (RTI_TMR_CMP_BLK_INDEX_3)
 RTI Timer compare block maximum. More...
 

RTI Timer Prescaler Value Ranges

#define RTI_TMR_MIN_PRESCALER_VAL   (1U)
 Minimum possible prescaler value for RTI Timer UP counter. More...
 
#define RTI_TMR_MAX_PRESACLER_VAL   (0xFFFFFFFFU)
 Maximum possible prescaler value for RTI Timer UP counter(2^32). More...
 

RTI Timer Interrupt Set/Indication Flags

#define RTI_TMR_INT_INT0_FLAG   (CSL_RTI_RTISETINT_SETINT0_MASK)
 Comapre 0 match interrupt. More...
 
#define RTI_TMR_INT_INT1_FLAG   (CSL_RTI_RTISETINT_SETINT1_MASK)
 Comapre 1 match interrupt. More...
 
#define RTI_TMR_INT_INT2_FLAG   (CSL_RTI_RTISETINT_SETINT2_MASK)
 Comapre 2 match interrupt. More...
 
#define RTI_TMR_INT_INT3_FLAG   (CSL_RTI_RTISETINT_SETINT3_MASK)
 Comapre 3 match interrupt. More...
 
#define RTI_TMR_INT_DMA0_FLAG   (CSL_RTI_RTISETINT_SETDMA0_MASK)
 Comapre 0 match DMA request. More...
 
#define RTI_TMR_INT_DMA1_FLAG   (CSL_RTI_RTISETINT_SETDMA1_MASK)
 Comapre 1 match DMA request. More...
 
#define RTI_TMR_INT_DMA2_FLAG   (CSL_RTI_RTISETINT_SETDMA2_MASK)
 Comapre 2 match DMA request. More...
 
#define RTI_TMR_INT_DMA3_FLAG   (CSL_RTI_RTISETINT_SETDMA3_MASK)
 Comapre 3 match DMA request. More...
 
#define RTI_TMR_INT_TB_FLAG   (CSL_RTI_RTISETINT_SETTBINT_MASK)
 Timebase interrupt: detection of a missing external clock edge. More...
 
#define RTI_TMR_INT_OVL0_FLAG   (CSL_RTI_RTISETINT_SETOVL0INT_MASK)
 Free running counter 0 overflow. More...
 
#define RTI_TMR_INT_OVL1_FLAG   (CSL_RTI_RTISETINT_SETOVL1INT_MASK)
 Free running counter 1 overflow. More...
 
#define RTI_TMR_INT_STATUS_ALL
 All interrupt status mask. More...
 
#define RTI_TMR_INT_REQ_ALL
 All interrupt request mask. More...
 

RTI Timer Interrupt Auto Clear Enable/Disable Flags

#define RTI_TMR_INT_AUTO_CLR_ENABLE_FLAG   (0x0000000FU)
 Compare interrupt Auto Clear Enable. More...
 
#define RTI_TMR_INT_AUTO_CLR_DISABLE_FLAG   (0x00000005U)
 Compare interrupt Auto Clear Disable. More...
 

RTI Timer NTU IDs

RTI Timer Network Time (NTU) IDs

#define RTI_TMR_NTU_0   (0x0U)
 RTI Timer NTU 0. More...
 
#define RTI_TMR_NTU_1   (0x5U)
 RTI Timer NTU 1. More...
 
#define RTI_TMR_NTU_2   (0xAU)
 RTI Timer NTU 2. More...
 
#define RTI_TMR_NTU_3   (0xFU)
 RTI Timer NTU 3. More...
 

RTI Timer Capture Event Indexes

RTI Timer Capture Event source numbers

#define RTI_TMR_CAPTURE_EVT_0   (0U)
 RTI Timer Capture Event source 0. More...
 
#define RTI_TMR_CAPTURE_EVT_1   (1U)
 RTI Timer Capture Event source 1. More...
 
#define RTI_TMR_CAPTURE_EVT_MAX   (RTI_TMR_CAPTURE_EVT_1)
 RTI Timer Capture Event source maximum. More...
 

RTI Timer Clock Source

RTI Timer clock source of conter block 0

#define RTI_TMR_CLK_SRC_COUNTER   (0U)
 Use counter block 0 up counter as clock source of the free runnung counter. More...
 
#define RTI_TMR_CLK_SRC_NTU   (1U)
 Use one of NTU as clock source of the free runnung counter. More...
 

Macro Definition Documentation

◆ RTI_GC_STALL_MODE_ON

#define RTI_GC_STALL_MODE_ON   (CSL_RTI_RTIGCTRL_COS_STOPPED)

The counters will be stopped while in debug halting mode.

◆ RTI_GC_STALL_MODE_OFF

#define RTI_GC_STALL_MODE_OFF   (CSL_RTI_RTIGCTRL_COS_RUNNING)

The counters will be running while in debug halting mode.

◆ RTI_TMR_CNT_BLK_INDEX_0

#define RTI_TMR_CNT_BLK_INDEX_0   (0U)

RTI Timer counter block 0.

◆ RTI_TMR_CNT_BLK_INDEX_1

#define RTI_TMR_CNT_BLK_INDEX_1   (1U)

RTI Timer counter block 1.

◆ RTI_TMR_CNT_BLK_INDEX_MAX

#define RTI_TMR_CNT_BLK_INDEX_MAX   (RTI_TMR_CNT_BLK_INDEX_1)

RTI Timer counter block maximum.

◆ RTI_TMR_CMP_BLK_INDEX_0

#define RTI_TMR_CMP_BLK_INDEX_0   (0U)

RTI Timer compare block 0.

◆ RTI_TMR_CMP_BLK_INDEX_1

#define RTI_TMR_CMP_BLK_INDEX_1   (1U)

RTI Timer compare block 1.

◆ RTI_TMR_CMP_BLK_INDEX_2

#define RTI_TMR_CMP_BLK_INDEX_2   (2U)

RTI Timer compare block 2.

◆ RTI_TMR_CMP_BLK_INDEX_3

#define RTI_TMR_CMP_BLK_INDEX_3   (3U)

RTI Timer compare block 3.

◆ RTI_TMR_CMP_BLK_INDEX_MAX

#define RTI_TMR_CMP_BLK_INDEX_MAX   (RTI_TMR_CMP_BLK_INDEX_3)

RTI Timer compare block maximum.

◆ RTI_TMR_MIN_PRESCALER_VAL

#define RTI_TMR_MIN_PRESCALER_VAL   (1U)

Minimum possible prescaler value for RTI Timer UP counter.

◆ RTI_TMR_MAX_PRESACLER_VAL

#define RTI_TMR_MAX_PRESACLER_VAL   (0xFFFFFFFFU)

Maximum possible prescaler value for RTI Timer UP counter(2^32).

◆ RTI_TMR_INT_INT0_FLAG

#define RTI_TMR_INT_INT0_FLAG   (CSL_RTI_RTISETINT_SETINT0_MASK)

Comapre 0 match interrupt.

◆ RTI_TMR_INT_INT1_FLAG

#define RTI_TMR_INT_INT1_FLAG   (CSL_RTI_RTISETINT_SETINT1_MASK)

Comapre 1 match interrupt.

◆ RTI_TMR_INT_INT2_FLAG

#define RTI_TMR_INT_INT2_FLAG   (CSL_RTI_RTISETINT_SETINT2_MASK)

Comapre 2 match interrupt.

◆ RTI_TMR_INT_INT3_FLAG

#define RTI_TMR_INT_INT3_FLAG   (CSL_RTI_RTISETINT_SETINT3_MASK)

Comapre 3 match interrupt.

◆ RTI_TMR_INT_DMA0_FLAG

#define RTI_TMR_INT_DMA0_FLAG   (CSL_RTI_RTISETINT_SETDMA0_MASK)

Comapre 0 match DMA request.

◆ RTI_TMR_INT_DMA1_FLAG

#define RTI_TMR_INT_DMA1_FLAG   (CSL_RTI_RTISETINT_SETDMA1_MASK)

Comapre 1 match DMA request.

◆ RTI_TMR_INT_DMA2_FLAG

#define RTI_TMR_INT_DMA2_FLAG   (CSL_RTI_RTISETINT_SETDMA2_MASK)

Comapre 2 match DMA request.

◆ RTI_TMR_INT_DMA3_FLAG

#define RTI_TMR_INT_DMA3_FLAG   (CSL_RTI_RTISETINT_SETDMA3_MASK)

Comapre 3 match DMA request.

◆ RTI_TMR_INT_TB_FLAG

#define RTI_TMR_INT_TB_FLAG   (CSL_RTI_RTISETINT_SETTBINT_MASK)

Timebase interrupt: detection of a missing external clock edge.

◆ RTI_TMR_INT_OVL0_FLAG

#define RTI_TMR_INT_OVL0_FLAG   (CSL_RTI_RTISETINT_SETOVL0INT_MASK)

Free running counter 0 overflow.

◆ RTI_TMR_INT_OVL1_FLAG

#define RTI_TMR_INT_OVL1_FLAG   (CSL_RTI_RTISETINT_SETOVL1INT_MASK)

Free running counter 1 overflow.

◆ RTI_TMR_INT_STATUS_ALL

#define RTI_TMR_INT_STATUS_ALL
Value:
RTI_TMR_INT_INT1_FLAG | \
RTI_TMR_INT_INT2_FLAG | \
RTI_TMR_INT_INT3_FLAG | \
RTI_TMR_INT_TB_FLAG | \
RTI_TMR_INT_OVL0_FLAG | \
RTI_TMR_INT_OVL1_FLAG)

All interrupt status mask.

◆ RTI_TMR_INT_REQ_ALL

#define RTI_TMR_INT_REQ_ALL
Value:
RTI_TMR_INT_INT1_FLAG | \
RTI_TMR_INT_INT2_FLAG | \
RTI_TMR_INT_INT3_FLAG | \
RTI_TMR_INT_DMA0_FLAG | \
RTI_TMR_INT_DMA1_FLAG | \
RTI_TMR_INT_DMA2_FLAG | \
RTI_TMR_INT_DMA3_FLAG | \
RTI_TMR_INT_TB_FLAG | \
RTI_TMR_INT_OVL0_FLAG | \
RTI_TMR_INT_OVL1_FLAG)

All interrupt request mask.

◆ RTI_TMR_INT_AUTO_CLR_ENABLE_FLAG

#define RTI_TMR_INT_AUTO_CLR_ENABLE_FLAG   (0x0000000FU)

Compare interrupt Auto Clear Enable.

◆ RTI_TMR_INT_AUTO_CLR_DISABLE_FLAG

#define RTI_TMR_INT_AUTO_CLR_DISABLE_FLAG   (0x00000005U)

Compare interrupt Auto Clear Disable.

◆ RTI_TMR_NTU_0

#define RTI_TMR_NTU_0   (0x0U)

RTI Timer NTU 0.

◆ RTI_TMR_NTU_1

#define RTI_TMR_NTU_1   (0x5U)

RTI Timer NTU 1.

◆ RTI_TMR_NTU_2

#define RTI_TMR_NTU_2   (0xAU)

RTI Timer NTU 2.

◆ RTI_TMR_NTU_3

#define RTI_TMR_NTU_3   (0xFU)

RTI Timer NTU 3.

◆ RTI_TMR_CAPTURE_EVT_0

#define RTI_TMR_CAPTURE_EVT_0   (0U)

RTI Timer Capture Event source 0.

◆ RTI_TMR_CAPTURE_EVT_1

#define RTI_TMR_CAPTURE_EVT_1   (1U)

RTI Timer Capture Event source 1.

◆ RTI_TMR_CAPTURE_EVT_MAX

#define RTI_TMR_CAPTURE_EVT_MAX   (RTI_TMR_CAPTURE_EVT_1)

RTI Timer Capture Event source maximum.

◆ RTI_TMR_CLK_SRC_COUNTER

#define RTI_TMR_CLK_SRC_COUNTER   (0U)

Use counter block 0 up counter as clock source of the free runnung counter.

◆ RTI_TMR_CLK_SRC_NTU

#define RTI_TMR_CLK_SRC_NTU   (1U)

Use one of NTU as clock source of the free runnung counter.

Function Documentation

◆ RTIG_setStallMode()

int32_t RTIG_setStallMode ( uint32_t  baseAddr,
uint32_t  stallMode 
)

Set the stall mode in RTI Global Control.

Parameters
baseAddrBase Address of the RTI instance.
stallModeStall mode in RTI global control 'stallMode' can take any of RTI_StallModes
Returns
status Success of the stall mode configuration
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE

◆ RTI_counterEnable()

int32_t RTI_counterEnable ( uint32_t  baseAddr,
uint32_t  cntIndex 
)

Start the timer.

Parameters
baseAddrBase Address of the RTI instance.
cntIndexConter Block index
Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE
Note
The timer must be configured before it is started/enabled.

◆ RTI_counterDisable()

int32_t RTI_counterDisable ( uint32_t  baseAddr,
uint32_t  cntIndex 
)

Stop the timer.

Parameters
baseAddrBase Address of the RTI instance.
cntIndexConter Block index
Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE

◆ RTI_counterClear()

int32_t RTI_counterClear ( uint32_t  baseAddr,
uint32_t  cntIndex 
)

Clear Timer Counter block.

Parameters
baseAddrBase Address of the RTI instance.
cntIndexConter Block index
Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE
Note
The timer counter will be stopped and then cleared. The function may be invoked at device initialization prior to configuration

◆ RTI_compareClear()

int32_t RTI_compareClear ( uint32_t  baseAddr,
uint32_t  cmpIndex 
)

Clear Timer Compare block.

Parameters
baseAddrBase Address of the RTI instance.
cmpIndexComapre Block index
Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE

◆ RTI_counterGet()

int32_t RTI_counterGet ( uint32_t  baseAddr,
uint32_t  cntIndex,
uint32_t *  counterLow,
uint32_t *  counterHigh 
)

Get/Read the counter value from the counter registers.

Parameters
baseAddrBase Address of the RTI instance.
cntIndexConter Block index
counterLowPointer to the vaue of the UP counter
counterHighPointer to the vaue of the Free running counter
Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE
Note
: Value can be read from the counter register when the counter is stopped or when it is running.

◆ RTI_captureConfig()

int32_t RTI_captureConfig ( uint32_t  baseAddr,
uint32_t  cntIndex,
uint32_t  cntrCapSrc 
)

Configure Capture operation.

Parameters
baseAddrBase Address of the RTI instance.
cntIndexConter Block index
cntrCapSrcCapture source
Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE

◆ RTI_captureCounterGet()

int32_t RTI_captureCounterGet ( uint32_t  baseAddr,
uint32_t  cntIndex,
uint32_t *  counterLow,
uint32_t *  counterHigh 
)

Get/Read the counter value from the capture registers.

Parameters
baseAddrBase Address of the RTI instance.
cntIndexConter Block index
counterLowPointer to the vaue of the capture UP counter
counterHighPointer to the vaue of the capture Free running counter
Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE

◆ RTI_compareEventConfig()

int32_t RTI_compareEventConfig ( uint32_t  baseAddr,
uint32_t  cmpIndex,
uint32_t  cntBlkIndex,
uint32_t  cmpVal,
uint32_t  period 
)

Confiure Compare operation.

Parameters
baseAddrBase Address of the RTI instance.
cmpIndexComapre Block index
cntBlkIndexIndex of source counter block
cmpValInitial compare value
periodPeriod of the free running counter in terms of counts
Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE

◆ RTI_counterConfigure()

int32_t RTI_counterConfigure ( uint32_t  baseAddr,
uint32_t  cntBlkIndex,
uint32_t  clkSrc,
uint32_t  ntu,
uint32_t  prescaler 
)

Confiure Compare operation.

Parameters
baseAddrBase Address of the RTI instance.
cntBlkIndexCounter Block index
clkSrcSelect clock source of the free running counter of Counter Block 0
ntuSelect the NTU clock
prescalerCompare value of the up counter
Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE

◆ RTI_compareGet()

uint32_t RTI_compareGet ( uint32_t  baseAddr,
uint32_t  cmpIndex 
)

Get the compare match register contents.

Parameters
baseAddrBase Address of the RTI instance.
cmpIndexComapre Block index
Returns
This API returns the match register contents.

◆ RTI_compareClearConfig()

int32_t RTI_compareClearConfig ( uint32_t  baseAddr,
uint32_t  cmpIndex,
uint32_t  cmpClearVal 
)

Confiure Compare Clear operation.

Parameters
baseAddrBase Address of the RTI instance.
cmpIndexCompare Block index
cmpClearValCompare Clear value
Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE

◆ RTI_intStatusGet()

uint32_t RTI_intStatusGet ( uint32_t  baseAddr)

Read the status of INTFLAG register.

Parameters
baseAddrBase Address of the RTI instance.
Returns
This API returns the status of INTFLAG register.

◆ RTI_intStatusClear()

int32_t RTI_intStatusClear ( uint32_t  baseAddr,
uint32_t  intFlags 
)

Clear the status of interrupt events.

Parameters
baseAddrBase Address of the RTI instance.
intFlagsVariable used to clear the events.

'intFlags' can take any of RTI_TmrIntFlags

Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE

◆ RTI_intEnable()

int32_t RTI_intEnable ( uint32_t  baseAddr,
uint32_t  intFlags 
)

Enable the Timer interrupts.

Parameters
baseAddrBase Address of the RTI instance.
intFlagsVariable used to enable the interrupts.

'intFlags' can take RTI_TmrIntFlags

Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE

◆ RTI_intDisable()

int32_t RTI_intDisable ( uint32_t  baseAddr,
uint32_t  intFlags 
)

Disable the Timer interrupts.

Parameters
baseAddrBase Address of the RTI instance.
intFlagsVariable used to disable the interrupts.

'intFlags' can take RTI_TmrIntFlags

Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE

◆ RTI_intAutoClearEnable()

int32_t RTI_intAutoClearEnable ( uint32_t  baseAddr,
uint32_t  cmpIndex 
)

Enable the Compare interrupt auto clear.

Parameters
baseAddrBase Address of the RTI instance.
cmpIndexComapre Block index
Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE

◆ RTI_intAutoClearDisable()

int32_t RTI_intAutoClearDisable ( uint32_t  baseAddr,
uint32_t  cmpIndex 
)

Disable the Compare interrupt auto clear.

Parameters
baseAddrBase Address of the RTI instance.
cmpIndexComapre Block index
Returns
status Success of the operation
  • Success: SystemP_SUCCESS
  • Fail : SystemP_FAILURE
RTI_TMR_INT_INT0_FLAG
#define RTI_TMR_INT_INT0_FLAG
Comapre 0 match interrupt.
Definition: rti/v0/rti.h:137