Introduction
This example demonstrates the usage of the R5 PMU Driver. The PMU supports three event counters in additional to the cycle counter. So in total we could profile a block of code / or a function for four metrics. The cycle counter is a dedicated counter, but the other three are configurable for various PMU events. In this example, we configure the counters to count these events:
- ICache Miss
- DCache Miss
- DCache Access
Supported Combinations
Steps to Run the Example
See Also
UART
Sample Output
Shown below is a sample output when the application is run, Please note that application prints in both CCS and UART console.
UART Console:
[PMU Multievent] Starting...
CRC Value: 37090
Profile Point: Fxn2
Cycle Count: 831268
ICache Miss Count: 35
DCache Access Count: 63002
DCache Miss Count: 831280
Profile Point: Fxn1
Cycle Count: 3702
ICache Miss Count: 3
DCache Access Count: 1044
DCache Miss Count: 3717
Profile Point: Fxn2
Cycle Count: 831268
ICache Miss Count: 35
DCache Access Count: 63002
DCache Miss Count: 831280
Profile Point: Fxn3
Cycle Count: 9671
ICache Miss Count: 4
DCache Access Count: 2324
DCache Miss Count: 9654
[PMU Multievent] Done...
All tests have passed