This Structure defines the ATU region parameters.
These parameters are used for configuring inbound or outbound ATU(Address translation unit) region
Data Fields | |
Pcie_AtuRegionDir | regionDir |
Pcie_TlpType | tlpType |
uint32_t | enableRegion |
Pcie_AtuRegionMatchMode | matchMode |
uint32_t | barNumber |
uint32_t | lowerBaseAddr |
uint32_t | upperBaseAddr |
uint64_t | regionWindowSize |
uint32_t | lowerTargetAddr |
uint32_t | upperTargetAddr |
Pcie_AtuRegionDir Pcie_AtuRegionParams::regionDir |
Region direction Inbound or Outbound Values given by enum Pcie_AtuRegionDir
Pcie_TlpType Pcie_AtuRegionParams::tlpType |
TLP(transaction layer packet) type Values given by enum Pcie_TlpType
uint32_t Pcie_AtuRegionParams::enableRegion |
Region enable or disable
Pcie_AtuRegionMatchMode Pcie_AtuRegionParams::matchMode |
Region match mode Address match or BAR match (not supported) Values given by enum Pcie_AtuRegionMatchMode
uint32_t Pcie_AtuRegionParams::barNumber |
BAR number with which the region is associated Possible values for EP : 0 to 5 Possible values for RC : 0 to 1 for 32bit and 0 for 64bit
uint32_t Pcie_AtuRegionParams::lowerBaseAddr |
Lower base address: must be aligned to regionWindowSize For outbound configuration this contains outbound region offset For inbound configuration this contains inbound PCIe start address
uint32_t Pcie_AtuRegionParams::upperBaseAddr |
Upper base address Higher 32 bits in case of 64 bit addressing Configured to 0 for 32 bit addressing
uint64_t Pcie_AtuRegionParams::regionWindowSize |
Region window size: must be a power of two For outbound configuration this contains outbound window size For inbound configuration this contains PCIe inbound window size
uint32_t Pcie_AtuRegionParams::lowerTargetAddr |
Lower Target address: must be aligned to regionWindowSize For outbound configuration this contains outbound PCIe start offset For inbound configuration this contains destination address
uint32_t Pcie_AtuRegionParams::upperTargetAddr |
Upper target address Higher 32 bits in case of 64 bit addressing Configured to 0 for 32 bit addressing