Structure to access the status of interrupts belonging to a High or Low priority interrupt.
Data Fields | |
uint32_t | highestPendPlsIntNum |
uint32_t | highestPendLvlIntNum |
uint32_t | grpIntrStatus |
uint32_t ESM_GroupIntrStatus::highestPendPlsIntNum |
Indicates what is the highest priority High Priority interrupt caused by a pulse number.
uint32_t ESM_GroupIntrStatus::highestPendLvlIntNum |
Indicates what is the highest priority High Priority interrupt caused by a level number.
uint32_t ESM_GroupIntrStatus::grpIntrStatus |
Indicates which Event Groups have one or more interrupts pending. This register is bit oriented where bit 0 is for Event Group 0, bit 1 is for Event Group 1, etc… (bit N is for Event Group N).