Introduction

DMSC controls the power management, security and resource management of the device.

Data Structures
struct	tisci_msg_rm_ring_cfg_req
	Configures a Navigator Subsystem ring. More...

struct	tisci_msg_rm_ring_cfg_resp
	Response to configuring a ring. More...

struct	tisci_msg_rm_ring_mon_cfg_req
	Configures a Navigator Subsystem ring monitor. Configures the real-time registers of a Navigator Subsystem ring monitor. The ring monitor index must be assigned to the host defined in the TISCI header via the RM board configuration resource assignment range list. The channelized firewalls covering the ring monitor registers are configured to allow the host read-only access. More...

struct	tisci_msg_rm_ring_mon_cfg_resp
	Response to configuring a ring monitor. More...

Functions
struct tisci_msg_rm_ring_cfg_req	__attribute__ ((__packed__))

Macros
#define	TISCI_MSG_VALUE_RM_RING_ADDR_LO_VALID (1u << 0u)
	This file contains: More...

#define	TISCI_MSG_VALUE_RM_RING_ADDR_HI_VALID (1u << 1u)

#define	TISCI_MSG_VALUE_RM_RING_COUNT_VALID (1u << 2u)

#define	TISCI_MSG_VALUE_RM_RING_MODE_VALID (1u << 3u)

#define	TISCI_MSG_VALUE_RM_RING_SIZE_VALID (1u << 4u)

#define	TISCI_MSG_VALUE_RM_RING_ORDER_ID_VALID (1u << 5u)

#define	TISCI_MSG_VALUE_RM_RING_VIRTID_VALID (1u << 6u)

#define	TISCI_MSG_VALUE_RM_RING_ASEL_VALID (1U << 7U)

#define	TISCI_MSG_VALUE_RM_RING_MODE_RING (0x0u)

#define	TISCI_MSG_VALUE_RM_RING_MODE_MESSAGE (0x1u)

#define	TISCI_MSG_VALUE_RM_RING_MODE_CREDENTIALS (0x2u)

#define	TISCI_MSG_VALUE_RM_RING_MODE_QM (0x3u)

#define	TISCI_MSG_VALUE_RM_RING_SIZE_4B (0x0u)

#define	TISCI_MSG_VALUE_RM_RING_SIZE_8B (0x1u)

#define	TISCI_MSG_VALUE_RM_RING_SIZE_16B (0x2u)

#define	TISCI_MSG_VALUE_RM_RING_SIZE_32B (0x3u)

#define	TISCI_MSG_VALUE_RM_RING_SIZE_64B (0x4u)

#define	TISCI_MSG_VALUE_RM_RING_SIZE_128B (0x5u)

#define	TISCI_MSG_VALUE_RM_RING_SIZE_256B (0x6u)

#define	TISCI_MSG_VALUE_RM_MON_SOURCE_VALID (1u << 0U)

#define	TISCI_MSG_VALUE_RM_MON_MODE_VALID (1u << 1U)

#define	TISCI_MSG_VALUE_RM_MON_QUEUE_VALID (1u << 2U)

#define	TISCI_MSG_VALUE_RM_MON_DATA0_VAL_VALID (1u << 3U)

#define	TISCI_MSG_VALUE_RM_MON_DATA1_VAL_VALID (1u << 4U)

#define	TISCI_MSG_VALUE_RM_MON_SRC_ELEM_CNT (0U)

#define	TISCI_MSG_VALUE_RM_MON_SRC_HEAD_PKT_SIZE (1U)

#define	TISCI_MSG_VALUE_RM_MON_SRC_ACCUM_Q_SIZE (2U)

#define	TISCI_MSG_VALUE_RM_MON_MODE_DISABLED (0U)

#define	TISCI_MSG_VALUE_RM_MON_MODE_PUSH_POP (1U)

#define	TISCI_MSG_VALUE_RM_MON_MODE_THRESHOLD (2U)

#define	TISCI_MSG_VALUE_RM_MON_MODE_WATERMARK (3U)

#define	TISCI_MSG_VALUE_RM_MON_MODE_STARVATION (4U)

Macro Definition Documentation

◆ TISCI_MSG_VALUE_RM_RING_ADDR_LO_VALID

#define TISCI_MSG_VALUE_RM_RING_ADDR_LO_VALID (1u << 0u)

This file contains:

    WARNING!!: Autogenerated file from SYSFW. DO NOT MODIFY!!

System Firmware TISCI RM Ring Accelerator Messaging

TISCI Protocol Definitions for Ring Accelerator IRQ messages The addr_lo parameter is valid for RM ring configure TISCI message

◆ TISCI_MSG_VALUE_RM_RING_ADDR_HI_VALID

#define TISCI_MSG_VALUE_RM_RING_ADDR_HI_VALID (1u << 1u)

The addr_hi parameter is valid for RM ring configure TISCI message

◆ TISCI_MSG_VALUE_RM_RING_COUNT_VALID

#define TISCI_MSG_VALUE_RM_RING_COUNT_VALID (1u << 2u)

The count parameter is valid for RM ring configure TISCI message

◆ TISCI_MSG_VALUE_RM_RING_MODE_VALID

#define TISCI_MSG_VALUE_RM_RING_MODE_VALID (1u << 3u)

The mode parameter is valid for RM ring configure TISCI message

◆ TISCI_MSG_VALUE_RM_RING_SIZE_VALID

#define TISCI_MSG_VALUE_RM_RING_SIZE_VALID (1u << 4u)

The size parameter is valid for RM ring configure TISCI message

◆ TISCI_MSG_VALUE_RM_RING_ORDER_ID_VALID

#define TISCI_MSG_VALUE_RM_RING_ORDER_ID_VALID (1u << 5u)

The order_id parameter is valid for RM ring configure TISCI message

◆ TISCI_MSG_VALUE_RM_RING_VIRTID_VALID

#define TISCI_MSG_VALUE_RM_RING_VIRTID_VALID (1u << 6u)

The virtid parameter is valid for RM ring configure TISCI message

◆ TISCI_MSG_VALUE_RM_RING_ASEL_VALID

#define TISCI_MSG_VALUE_RM_RING_ASEL_VALID (1U << 7U)

The asel parameter is valid for RM ring configure TISCI message for SoCs that have ASEL capability for rings

◆ TISCI_MSG_VALUE_RM_RING_MODE_RING

#define TISCI_MSG_VALUE_RM_RING_MODE_RING (0x0u)

Exposed ring mode for tisci_msg_rm_ring_cfg_req::mode

◆ TISCI_MSG_VALUE_RM_RING_MODE_MESSAGE

#define TISCI_MSG_VALUE_RM_RING_MODE_MESSAGE (0x1u)

Messaging ring mode for tisci_msg_rm_ring_cfg_req::mode

◆ TISCI_MSG_VALUE_RM_RING_MODE_CREDENTIALS

#define TISCI_MSG_VALUE_RM_RING_MODE_CREDENTIALS (0x2u)

Credentials ring mode for tisci_msg_rm_ring_cfg_req::mode

◆ TISCI_MSG_VALUE_RM_RING_MODE_QM

#define TISCI_MSG_VALUE_RM_RING_MODE_QM (0x3u)

QM ring mode for tisci_msg_rm_ring_cfg_req::mode

◆ TISCI_MSG_VALUE_RM_RING_SIZE_4B

#define TISCI_MSG_VALUE_RM_RING_SIZE_4B (0x0u)

4-byte ring element size for tisci_msg_rm_ring_cfg_req::size

◆ TISCI_MSG_VALUE_RM_RING_SIZE_8B

#define TISCI_MSG_VALUE_RM_RING_SIZE_8B (0x1u)

8-byte ring element size for tisci_msg_rm_ring_cfg_req::size

◆ TISCI_MSG_VALUE_RM_RING_SIZE_16B

#define TISCI_MSG_VALUE_RM_RING_SIZE_16B (0x2u)

16-byte ring element size for tisci_msg_rm_ring_cfg_req::size

◆ TISCI_MSG_VALUE_RM_RING_SIZE_32B

#define TISCI_MSG_VALUE_RM_RING_SIZE_32B (0x3u)

32-byte ring element size for tisci_msg_rm_ring_cfg_req::size

◆ TISCI_MSG_VALUE_RM_RING_SIZE_64B

#define TISCI_MSG_VALUE_RM_RING_SIZE_64B (0x4u)

64-byte ring element size for tisci_msg_rm_ring_cfg_req::size

◆ TISCI_MSG_VALUE_RM_RING_SIZE_128B

#define TISCI_MSG_VALUE_RM_RING_SIZE_128B (0x5u)

128-byte ring element size for tisci_msg_rm_ring_cfg_req::size

◆ TISCI_MSG_VALUE_RM_RING_SIZE_256B

#define TISCI_MSG_VALUE_RM_RING_SIZE_256B (0x6u)

256-byte ring element size for tisci_msg_rm_ring_cfg_req::size

◆ TISCI_MSG_VALUE_RM_MON_SOURCE_VALID

#define TISCI_MSG_VALUE_RM_MON_SOURCE_VALID (1u << 0U)

The source parameter is valid for RM monitor configure TISCI message

◆ TISCI_MSG_VALUE_RM_MON_MODE_VALID

#define TISCI_MSG_VALUE_RM_MON_MODE_VALID (1u << 1U)

The mode parameter is valid for RM monitor configure TISCI message

◆ TISCI_MSG_VALUE_RM_MON_QUEUE_VALID

#define TISCI_MSG_VALUE_RM_MON_QUEUE_VALID (1u << 2U)

The queue parameter is valid for RM monitor configure TISCI message

◆ TISCI_MSG_VALUE_RM_MON_DATA0_VAL_VALID

#define TISCI_MSG_VALUE_RM_MON_DATA0_VAL_VALID (1u << 3U)

The data1_val parameter is valid for RM monitor configure TISCI message

◆ TISCI_MSG_VALUE_RM_MON_DATA1_VAL_VALID

#define TISCI_MSG_VALUE_RM_MON_DATA1_VAL_VALID (1u << 4U)

The data0_val parameter is valid for RM monitor configure TISCI message

◆ TISCI_MSG_VALUE_RM_MON_SRC_ELEM_CNT

#define TISCI_MSG_VALUE_RM_MON_SRC_ELEM_CNT (0U)

Element count is source for tisci_msg_rm_ring_mon_cfg_req::source

◆ TISCI_MSG_VALUE_RM_MON_SRC_HEAD_PKT_SIZE

#define TISCI_MSG_VALUE_RM_MON_SRC_HEAD_PKT_SIZE (1U)

Head packet size is source for tisci_msg_rm_ring_mon_cfg_req::source

◆ TISCI_MSG_VALUE_RM_MON_SRC_ACCUM_Q_SIZE

#define TISCI_MSG_VALUE_RM_MON_SRC_ACCUM_Q_SIZE (2U)

Accumulated queue size is source for tisci_msg_rm_ring_mon_cfg_req::source

◆ TISCI_MSG_VALUE_RM_MON_MODE_DISABLED

#define TISCI_MSG_VALUE_RM_MON_MODE_DISABLED (0U)

Disabled monitor mode for tisci_msg_rm_ring_mon_cfg_req::mode

◆ TISCI_MSG_VALUE_RM_MON_MODE_PUSH_POP

#define TISCI_MSG_VALUE_RM_MON_MODE_PUSH_POP (1U)

Push/pop statistics capture mode for tisci_msg_rm_ring_mon_cfg_req::mode

◆ TISCI_MSG_VALUE_RM_MON_MODE_THRESHOLD

#define TISCI_MSG_VALUE_RM_MON_MODE_THRESHOLD (2U)

Low/high threshold checks mode for tisci_msg_rm_ring_mon_cfg_req::mode

◆ TISCI_MSG_VALUE_RM_MON_MODE_WATERMARK

#define TISCI_MSG_VALUE_RM_MON_MODE_WATERMARK (3U)

Low/high watermarking mode for tisci_msg_rm_ring_mon_cfg_req::mode

◆ TISCI_MSG_VALUE_RM_MON_MODE_STARVATION

#define TISCI_MSG_VALUE_RM_MON_MODE_STARVATION (4U)

Starvation counter mode for tisci_msg_rm_ring_mon_cfg_req::mode

Function Documentation

◆ attribute()

struct tisci_msg_rm_ring_cfg_req __attribute__ ( (__packed__) )