Introduction

Sub Modules
	CPSW Management Data Input/Output (MDIO)

Data Structures
struct	EnetMdio_C22ReadInArgs
	Input args for ENET_MDIO_IOCTL_C22_READ command. More...

struct	EnetMdio_C45ReadInArgs
	Input args for ENET_MDIO_IOCTL_C45_READ command. More...

struct	EnetMdio_C22WriteInArgs
	Input args for ENET_MDIO_IOCTL_C22_WRITE command. More...

struct	EnetMdio_C45WriteInArgs
	Input args for ENET_MDIO_IOCTL_C45_WRITE command. More...

Enumerations
enum	EnetMdio_Ioctl { ENET_MDIO_IOCTL_GET_VERSION = ENET_MDIO_PUBLIC_IOCTL(0U), ENET_MDIO_IOCTL_PRINT_REGS = ENET_MDIO_PUBLIC_IOCTL(1U), ENET_MDIO_IOCTL_IS_ALIVE = ENET_MDIO_PUBLIC_IOCTL(2U), ENET_MDIO_IOCTL_IS_LINKED = ENET_MDIO_PUBLIC_IOCTL(3U), ENET_MDIO_IOCTL_IS_POLL_ENABLED = ENET_MDIO_PUBLIC_IOCTL(4U), ENET_MDIO_IOCTL_C22_READ = ENET_MDIO_PUBLIC_IOCTL(5U), ENET_MDIO_IOCTL_C22_WRITE = ENET_MDIO_PUBLIC_IOCTL(6U), ENET_MDIO_IOCTL_C45_READ = ENET_MDIO_PUBLIC_IOCTL(7U), ENET_MDIO_IOCTL_C45_WRITE = ENET_MDIO_PUBLIC_IOCTL(8U), ENET_MDIO_IOCTL_C22_ASYNC_READ_TRIGGER = ENET_MDIO_PUBLIC_IOCTL(9U), ENET_MDIO_IOCTL_C22_ASYNC_READ_COMPLETE = ENET_MDIO_PUBLIC_IOCTL(10U), ENET_MDIO_IOCTL_C22_ASYNC_WRITE_TRIGGER = ENET_MDIO_PUBLIC_IOCTL(11U), ENET_MDIO_IOCTL_C22_ASYNC_WRITE_COMPLETE = ENET_MDIO_PUBLIC_IOCTL(12U), ENET_MDIO_IOCTL_C45_ASYNC_READ_TRIGGER = ENET_MDIO_PUBLIC_IOCTL(13U), ENET_MDIO_IOCTL_C45_ASYNC_READ_COMPLETE = ENET_MDIO_PUBLIC_IOCTL(14U), ENET_MDIO_IOCTL_C45_ASYNC_WRITE_TRIGGER = ENET_MDIO_PUBLIC_IOCTL(15U), ENET_MDIO_IOCTL_C45_ASYNC_WRITE_COMPLETE = ENET_MDIO_PUBLIC_IOCTL(16U), ENET_MDIO_IOCTL_ENABLE_STATE_MACHINE = ENET_MDIO_PUBLIC_IOCTL(17U) }
	MDIO IOCTL commands. More...

enum	EnetMdio_Group { ENET_MDIO_GROUP_0 = 0U, ENET_MDIO_GROUP_1, ENET_MDIO_GROUP_NUM }
	MDIO user group. More...

enum	EnetMdio_FrameFmt { ENET_MDIO_FRAME_FMT_C22 = 0U, ENET_MDIO_FRAME_FMT_C45 }
	Frame format. More...

enum	EnetMdio_C45Mmd { ENET_MDIO_MMD_PMA_PMD = 1U, ENET_MDIO_MMD_WIS = 2U, ENET_MDIO_MMD_PCS = 3U, ENET_MDIO_MMD_PHY_XS = 4U, ENET_MDIO_MMD_DTE_XS = 5U, ENET_MDIO_MMD_VENDOR_1 = 30U, ENET_MDIO_MMD_VENDOR_2 = 31U }
	Clause-45 MDIO Manageable Device (MMD) addresses. More...

Macros
#define	ENET_MDIO_FEAT_CLAUSE45 (ENET_BIT(0U))
	MDIO feature mask for Clause-45 support. More...

#define	ENET_MDIO_FEAT_PHY_MONITOR (ENET_BIT(1U))
	MDIO feature mask for PHY state change monitoring. More...

#define	ENET_MDIO_PUBLIC_IOCTL(x)
	Helper macro to create IOCTL commands for MDIO module. More...

#define	ENET_MDIO_PRIVATE_IOCTL(x)
	Helper macro to create private IOCTL commands for MDIO module. More...

#define	ENET_MDIO_PHY_ADDR_MASK(addr) (ENET_BIT(addr))
	Create a MDIO PHY mask from a PHY address. More...

#define	ENET_MDIO_IS_PHY_ADDR_SET(mask, addr) (((mask) & ENET_BIT(addr)) != 0U)
	Check if the corresponding PHY address mask is set. More...

#define	ENET_MDIO_PHY_ADDR_MASK_NONE (0x00000000U)
	MDIO PHY address mask for no PHYs present. More...

#define	ENET_MDIO_PHY_ADDR_MASK_ALL (0xFFFFFFFFU)
	MDIO PHY address mask for all PHYs present. More...

#define	ENET_MDIO_PHY_CNT_MAX (31U)
	Maximum number of PHYs supported on the MDIO bus. More...

Macro Definition Documentation

◆ ENET_MDIO_FEAT_CLAUSE45

#define ENET_MDIO_FEAT_CLAUSE45 (ENET_BIT(0U))

MDIO feature mask for Clause-45 support.

◆ ENET_MDIO_FEAT_PHY_MONITOR

#define ENET_MDIO_FEAT_PHY_MONITOR (ENET_BIT(1U))

MDIO feature mask for PHY state change monitoring.

◆ ENET_MDIO_PUBLIC_IOCTL

#define ENET_MDIO_PUBLIC_IOCTL ( x )

Value:

                                               (ENET_IOCTL_TYPE_PUBLIC | \
                                               ENET_IOCTL_MDIO_BASE |   \
                                               ENET_IOCTL_MIN(x))

Helper macro to create IOCTL commands for MDIO module.

◆ ENET_MDIO_PRIVATE_IOCTL

#define ENET_MDIO_PRIVATE_IOCTL ( x )

Value:

                                               (ENET_IOCTL_TYPE_PRIVATE | \
                                               ENET_IOCTL_MDIO_BASE |   \
                                               ENET_IOCTL_MIN(x))

Helper macro to create private IOCTL commands for MDIO module.

◆ ENET_MDIO_PHY_ADDR_MASK

#define ENET_MDIO_PHY_ADDR_MASK ( addr ) (ENET_BIT(addr))

Create a MDIO PHY mask from a PHY address.

◆ ENET_MDIO_IS_PHY_ADDR_SET

#define ENET_MDIO_IS_PHY_ADDR_SET	(	mask,
		addr
	)	(((mask) & ENET_BIT(addr)) != 0U)

Check if the corresponding PHY address mask is set.

◆ ENET_MDIO_PHY_ADDR_MASK_NONE

#define ENET_MDIO_PHY_ADDR_MASK_NONE (0x00000000U)

MDIO PHY address mask for no PHYs present.

◆ ENET_MDIO_PHY_ADDR_MASK_ALL

#define ENET_MDIO_PHY_ADDR_MASK_ALL (0xFFFFFFFFU)

MDIO PHY address mask for all PHYs present.

◆ ENET_MDIO_PHY_CNT_MAX

#define ENET_MDIO_PHY_CNT_MAX (31U)

Maximum number of PHYs supported on the MDIO bus.

Enumeration Type Documentation

◆ EnetMdio_Ioctl

enum EnetMdio_Ioctl

MDIO IOCTL commands.

Enumerator
ENET_MDIO_IOCTL_GET_VERSION	Get the hardware version of the MDIO module. IOCTL parameters: inArgs: None outArgs: Enet_Version
ENET_MDIO_IOCTL_PRINT_REGS	Print MDIO registers. IOCTL parameters: inArgs: None outArgs: None
ENET_MDIO_IOCTL_IS_ALIVE	Get PHY alive status. IOCTL parameters: inArgs: uint8_t outArgs: bool
ENET_MDIO_IOCTL_IS_LINKED	Get PHY link status. IOCTL parameters: inArgs: uint8_t outArgs: bool
ENET_MDIO_IOCTL_IS_POLL_ENABLED	Get link state change poll enable status. Checks if PHY state change is being monitored for the given PHY address regardless of the underlying monitoring mechanism or mode. IOCTL parameters: inArgs: uint8_t outArgs: bool
ENET_MDIO_IOCTL_C22_READ	Read a PHY register using clause-22 frame. IOCTL parameters: inArgs: EnetMdio_C22ReadInArgs outArgs: uint16_t
ENET_MDIO_IOCTL_C22_WRITE	Write a PHY register using clause-22 frame. IOCTL parameters: inArgs: EnetMdio_C22WriteInArgs outArgs: None
ENET_MDIO_IOCTL_C45_READ	Read a PHY register using clause-45 frame. IOCTL parameters: inArgs: EnetMdio_C45ReadInArgs outArgs: uint16_t
ENET_MDIO_IOCTL_C45_WRITE	Write a PHY register using clause-45 frame. IOCTL parameters: inArgs: EnetMdio_C45WriteInArgs outArgs: None
ENET_MDIO_IOCTL_C22_ASYNC_READ_TRIGGER	Trigger Asynchronous read to PHY register. IOCTL parameters: inArgs: EnetMdio_C45ReadInArgs outArgs: None
ENET_MDIO_IOCTL_C22_ASYNC_READ_COMPLETE	Checks for async read completion to PHY register. IOCTL parameters: inArgs: EnetMdio_C45ReadInArgs outArgs: None
ENET_MDIO_IOCTL_C22_ASYNC_WRITE_TRIGGER	Trigger Asynchronous Write to PHY register. IOCTL parameters: inArgs: EnetMdio_C45WriteInArgs outArgs: None
ENET_MDIO_IOCTL_C22_ASYNC_WRITE_COMPLETE	Checks for async Write completion to PHY register. IOCTL parameters: inArgs: EnetMdio_C45WriteInArgs outArgs: None
ENET_MDIO_IOCTL_C45_ASYNC_READ_TRIGGER	Trigger Asynchronous Read to PHY register using clause-45 frame. IOCTL parameters: inArgs: EnetMdio_C45ReadInArgs outArgs: uint16_t
ENET_MDIO_IOCTL_C45_ASYNC_READ_COMPLETE	Checks for async Read completion to PHY register using clause-45 frame. IOCTL parameters: inArgs: EnetMdio_C45ReadInArgs outArgs: uint16_t
ENET_MDIO_IOCTL_C45_ASYNC_WRITE_TRIGGER	Trigger Asynchronous Write to PHY register using clause-45 frame. IOCTL parameters: inArgs: EnetMdio_C45WriteInArgs outArgs: None
ENET_MDIO_IOCTL_C45_ASYNC_WRITE_COMPLETE	Checks for async Write completion to PHY register using clause-45 frame. IOCTL parameters: inArgs: EnetMdio_C45WriteInArgs outArgs: None
ENET_MDIO_IOCTL_ENABLE_STATE_MACHINE	Enable MDIO state machine. Use. If Mdio_Cfg.disableStateMachineOnInit is set, this IOCTL allows enabling Mdio state machine via IOCTL. This is used for sequencing external PHY management operation with MDIO state machine so that any link interrupts are not missed and MDIO state machine is enabled only after PHY initialization is complete IOCTL parameters: inArgs: None outArgs: None

◆ EnetMdio_Group

enum EnetMdio_Group

MDIO user group.

Enumerator
ENET_MDIO_GROUP_0	Group 0
ENET_MDIO_GROUP_1	Group 1
ENET_MDIO_GROUP_NUM	Number of groups

◆ EnetMdio_FrameFmt

enum EnetMdio_FrameFmt

Frame format.

Enumerator
ENET_MDIO_FRAME_FMT_C22	Clause 22 frame format
ENET_MDIO_FRAME_FMT_C45	Clause 45 frame format

◆ EnetMdio_C45Mmd

enum EnetMdio_C45Mmd

Clause-45 MDIO Manageable Device (MMD) addresses.

Enumerator
ENET_MDIO_MMD_PMA_PMD	PMA/PMD
ENET_MDIO_MMD_WIS	WIS
ENET_MDIO_MMD_PCS	PCS
ENET_MDIO_MMD_PHY_XS	PHY XS
ENET_MDIO_MMD_DTE_XS	DTE XS
ENET_MDIO_MMD_VENDOR_1	Vendor specific 1
ENET_MDIO_MMD_VENDOR_2	Vendor specific 2