Introduction

This layer 2 icssg example demonstrates the usage of Enet with ICSSG peripheral operation.

On AM243X, we can do Ethernet based communication using ICSSG HW Mechanism

PRU firmware based Ethernet Switch and Dual MAC implementation
This HW can be used with industrial communication protocols as well

This example does the following:

Target-side application running on a Cortex R5F core.
- Application receives the packet, copies the payload into a new packet which is then sent back.
- The application has a menu to enable/disable features, such as getting mac address and stats. This menu along with application logs are implemented via UART.
Host-side functionality
- Software applications like Colasoft Pkt Builder or packETH tool can be used to generate and send packets. Wireshark can be used to receive and verify packet contents.
The data path enabled in this example is as follows:
- Host side (PC) application sends a packet to MAC port.
- Based on Switch mode or Dual-EMAC mode the data flow will differ.
- In Switch mode:
  - If packet is non-directed unicast(UC) packet, it will be only forwarded.
  - If packet is directed unicast(UC) packet, it will be sent only to target application.
  - If packet is multicast(MC) or broadcast(BC) packet, it will be forwarded as well as sent to target application.
- In Dual-mac mode:
  - If packet is non-directed unicast(UC) packet, it will be dropped.
  - If packet is directed unicast(UC) or multicast(MC) or broadcast(BC) packet, it will be sent to target application.
  - Currently to test both MAC ports simultaneously in Dual-MAC mode, it requires additional Enet-lld (UDMA channel allocation) changes.
- Target side application receives the packet, updates the MAC addresses in the Layer-2 header and sends the packet back.
- Application like Wireshark (PC) receives the packet and can be seen in the capture window.

Supported Combinations

Parameter	Value
CPU + OS	r5fss0-0_freertos
Toolchain	ti-arm-clang
Boards	am243x-evm, am243x-lp
Icssg Instance	ICSSG1
Example folder	source/networking/enet/core/examples/enet_layer2_icssg

Configuring ICSSG DUAL MAC with two MAC ports

Selecting DUAL MAC mode in ICSSG does not imply both the MAC ports being functional.
To setup Dual MAC configuration, two instances of ICSSG have to be opened.
Both of the instances have to be setup as shown above in the MAC configuration.
Unlike what is shown in the image, set the QoS level to 3 for layer 2 use cases.
Dual MAC mode port of the first instance has to be set to MAC_PORT_1.

ICSSG DUAL MAC PORT-1 configuration.
Dual MAC mode port of the second instance has to be set to MAC_PORT_2.
Uncheck the option "Enable MDIO MDC Config" in the second ICSSG instance.
Set the QoS level to 3, same as the first instance.

ICSSG DUAL MAC PORT-2 configuration.

Configuring ICSSG Switch Mode:

Open the ICSSG instance in the sysconfig, and select the ICSSG instance as ICSSG1.
Both of the instances have to be setup as shown above in the MAC configuration.
Unlike what is shown in the image, set the QoS level to 3 for layer 2 use cases.
Ensure to check the option "Enable MDIO MDC Config".
The system configuration of the ICSSG instance has to be configured as shown below.

ICSSG SWITCH MODE configuration.
In the DMA channel config module, allocate required number of packets for Tx Channels and Rx flows.
Set both the Rx flows as default flows.
Set only one Rx flow with 'Number of MAC Address' field as 1. Set remaining flows to 0.
Only the Rx flow with 'Number of MAC Address' and corresponding Rx channel will be allocated a MAC address, so set accordingly.
Set the field 'Rx Ch Id' as 0 for half of the Rx flows, and 1 for the remaining half.
The final configuration should look similar to the following.

ICSSG SWITCH MODE Rx DMA-1 configuration

ICSSG SWITCH MODE Rx DMA-2 configuration

Steps to Run the Example

Build the example

When using CCS projects to build, import the CCS project for the required combination and build it using the CCS project menu (see Using SDK with CCS Projects).
When using makefiles to build, note the required combination and build using make command (see Using SDK with Makefiles)

Note: Enable the ENET_TEST_MII_MODE macro in test application and change the mode to MII from RGMII in SysConfig and rebuild the application to test the ICSSG ports in MII mode.

HW Setup

Note: Make sure you have setup the EVM with cable connections as shown here, EVM Setup. In addition do below steps.

AM243X-EVM

For ICSSG based example

Connect two ethernet cables to the EVM from two host PC's as shown below

Ethernet cable for ICSS based ethernet

AM243X-LP

Note: AM243X-LP has two ethernet ports which can be configured as both CPSW/ICSS ports.

For ICSSG based examples

Connect two ethernet cables to the AM243X-LP from two host PC's as shown below

Ethernet cable for ICSSG based ethernet

Run the example

Attention: If you need to reload and run again, a CPU power-cycle is MUST

Launch a CCS debug session and run the example executable, see CCS Launch, Load and Run
You will see logs in the UART terminal as shown in the next section.
We can start sending packets from Colasoft Pkt Builder or packETH tool and capture the packets in Wireshark.

Sample output for Layer2 ICSSG example

==========================
      MULTIPORT TEST
==========================
 
Init all peripheral clocks
----------------------------------------------
Enabling clocks!
 
Open all peripherals
----------------------------------------------
 
Init  configs EnetType:2, InstId :1
----------------------------------------------
icssg1: Open port 1
icssg1: Open port 2
EnetPhy_bindDriver:
PHY 3 is alive
PHY 15 is alive
icssg1: Register async IOCTL callback
icssg1: Register TX timestamp callback
 
Attach core id 1 on all peripherals
----------------------------------------------
icssg1: Attach core
 
Create RX tasks
----------------------------------------------
icssg1: Create RX task
icssg1: Waiting for link up...
 
Enet Multiport Menu:
 'T'  -  Enable timestamp prints
 't'  -  Disable timestamp prints
 's'  -  Print statistics
 'r'  -  Reset statistics
 'm'  -  Show allocated MAC addresses
 'd'  -  Enable dscp based priority mapping
 'x'  -  Stop the test
 
EnetPhy_bindDriver:
Icssg_handleLinkUp:
Icssg_handleLinkUp:
icssg1: Port 1 link is up
icssg1: Set port state to 'Forward'
icssg1: Async IOCTL completed
icssg1: Async IOCTL completed
icssg1: Port 2 link is up
icssg1: Set port state to 'Forward'
icssg1: Async IOCTL completed
icssg1: Async IOCTL completed
icssg1: Open DMA
initQs() txFreePktInfoQ initialized with 8 pkts
icssg1: Set MAC addr: 70:ff:76:1d:92:c1
icssg1: MAC port addr: 70:ff:76:1d:92:c1
 
Invalid option, try again...
 
Enet Multiport Menu:
 'T'  -  Enable timestamp prints
 't'  -  Disable timestamp prints
 's'  -  Print statistics
 'r'  -  Reset statistics
 'm'  -  Show allocated MAC addresses
 'd'  -  Enable dscp based priority mapping
 'x'  -  Stop the test
 
s
 
Print statistics
----------------------------------------------
 
 icssg1 - PA statistics
--------------------------------
  port1Q0Overflow            = 234
 
 
 icssg1 - Port 1 statistics
--------------------------------
  rxGoodFrames            = 25337838
  rxClass8                = 25337838
  rxClass9                = 25337838
  rxBucket2SizedFrame     = 65535
  rxTotalByte             = 3243243264
  rxTxTotalByte           = 4294967295
  txGoodFrame             = 25337838
  txBucket3SizedFrame     = 65535
  txTotalByte             = 3445945968
 
 
 icssg1 - Port 2 statistics
--------------------------------
  rxGoodFrames            = 25337838
  rxClass8                = 25337838
  rxClass9                = 25337838
  rxBucket2SizedFrame     = 65535
  rxTotalByte             = 3243243264
  rxTxTotalByte           = 4294967295
  txGoodFrame             = 25337604
  txBucket3SizedFrame     = 65535
  txTotalByte             = 3445914144

On Wireshark we can see the packets received:

Wireshark log for Layer 2 ICSSG Example

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