Go to the source code of this file.
VTM temperature sensor STAT read valid map | |
This enumerator define for VTM temperature sensor STAT read valid map | |
#define | SDL_VTM_VD_CONFIG_CTRL_SET_CTL (1U) |
#define | SDL_VTM_VD_CONFIG_CTRL_OUTRNG_ALRT (2U) |
#define | SDL_VTM_VD_CONFIG_CTRL_SET_THR (4U) |
#define | SDL_VTM_TS_READ_VD_MAP_VAL (1U) |
#define | SDL_VTM_TS_READ_ALL_THRESHOLD_ALERTS (2U) |
#define | SDL_VTM_TS_READ_FIRST_TIME_EOC_BIT (4U) |
#define | SDL_VTM_TS_READ_DATA_VALID_BIT (8U) |
#define | SDL_VTM_TS_READ_DATA_OUT_VAL (16U) |
typedef uint8_t | SDL_VTM_configTsCtrl |
typedef uint8_t | SDL_VTM_Stat_read_ctrl |
VTM OPP VID Codes | |
This enumerator defines the possible VID Codes to set various voltage domain supply voltages | |
#define | SDL_VTM_VID_OPP_MAX_NUM ((uint8_t) 4U) |
#define | SDL_VTM_VID_OPP_3_CODE ((uint8_t) 3U) |
#define | SDL_VTM_VID_OPP_2_CODE ((uint8_t) 2U) |
#define | SDL_VTM_VID_OPP_1_CODE ((uint8_t) 1U) |
#define | SDL_VTM_VID_OPP_0_CODE ((uint8_t) 0U) |
typedef uint8_t | SDL_VTM_vid_opp |
VTM Core Voltage domain map | |
This enumerator defines the core voltage domain mapping of VTM VD | |
#define | SDL_VTM_TS_STAT_VD_MAP_RTC ((uint32) 0U) |
#define | SDL_VTM_TS_STAT_VD_MAP_WKUP ((uint32) 1U) |
#define | SDL_VTM_TS_STAT_VD_MAP_MCU ((uint32) 2U) |
#define | SDL_VTM_TS_STAT_VD_MAP_CORE ((uint32) 3U) |
#define | SDL_VTM_TSTAT_VD_MAP_NOT_IMPLEMENTED ((uint32) 15U) |
typedef uint8_t | SDL_VTM_ts_stat_vd_map |
VTM Voltage domain threshold interrupt control | |
This enumerator define for VTM Voltage domain threshold interrupt control | |
#define | SDL_VTM_VD_LT_THR0_INTR_RAW_SET (1u) |
#define | SDL_VTM_VD_GT_THR1_INTR_RAW_SET (2u) |
#define | SDL_VTM_VD_GT_THR2_INTR_RAW_SET (4u) |
#define | SDL_VTM_VD_LT_THR0_INTR_RAW_CLR (8u) |
#define | SDL_VTM_VD_GT_THR1_INTR_RAW_CLR (16u) |
#define | SDL_VTM_VD_GT_THR2_INTR_RAW_CLR (32u) |
#define | SDL_VTM_VD_LT_THR0_INTR_EN_SET (64u) |
#define | SDL_VTM_VD_GT_THR1_INTR_EN_SET (128u) |
#define | SDL_VTM_VD_GT_THR2_INTR_EN_SET (256u) |
#define | SDL_VTM_VD_LT_THR0_INTR_EN_CLR (512u) |
#define | SDL_VTM_VD_GT_THR1_INTR_EN_CLR (1024u) |
#define | SDL_VTM_VD_GT_THR2_INTR_EN_CLR (2048u) |
#define | SDL_VTM_VD_INTR_INVALID |
typedef uint16_t | SDL_VTM_intrCtrl |
VTM Voltage domain Event selection set | |
This enumerator define for VTM Voltage domain Event selection set | |
#define | SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_0 (1u) |
#define | SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_1 (2u) |
#define | SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_2 (4u) |
#define | SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_3 (8u) |
#define | SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_4 (16u) |
#define | SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_5 (32u) |
#define | SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_6 (64u) |
#define | SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_7 (128u) |
typedef uint16_t | SDL_VTM_vdEvtSel_set |
VTM temperature sensor id | |
This enumerator defines for VTM Temperature sensor id control update valid maps. This controls the selective update of the fields in the temperature sensor control field. | |
#define | SDL_VTM_TSGLOBAL_CLK_SEL_VALID (1u) |
#define | SDL_VTM_TSGLOBAL_CLK_DIV_VALID (2u) |
#define | SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_EN_VALID (4u) |
#define | SDL_VTM_TSGLOBAL_MAXT_OUTRG_ALERT_THR0_VALID (8u) |
#define | SDL_VTM_TSGLOBAL_MAXT_OUTRG_ALERT_THR_VALID (16u) |
#define | SDL_VTM_TSGLOBAL_SAMPLES_PER_CNT_VALID (32u) |
typedef uint32_t | SDL_VTM_tsGlobal_ctrl_valid_map |
VTM Temperature Sensor global control clock select | |
This enumerator define for VTM Temperature sensor global control Clock select options | |
#define | SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_SEL_FIX_REF_CLK (1u) |
#define | SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_SEL_FIX_REF2_CLK (2u) |
typedef uint8_t | SDL_VTM_tsGlobal_clkSel |
VTM Temperature Sensor global control any | |
This enumerator define for VTM Temperature sensor global control any max temperature alert enable control | |
#define | SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_ENABLE (1u) |
#define | SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_DISABLE (0u) |
typedef uint8_t | SDL_VTM_tsGlobal_any_maxt_outrg_alert_en |
VTM Temperature Sensor control valid map | |
This enumerator define for VTM Temperature sensor control valid map | |
#define | SDL_VTM_TS_CTRL_MAXT_OUTG_ALERT_VALID (1u) |
#define | SDL_VTM_TS_CTRL_RESET_CTRL_VALID (2u) |
#define | SDL_VTM_TS_CTRL_SOC_VALID (4u) |
#define | SDL_VTM_TS_CTRL_MODE_VALID (8u) |
typedef uint8_t | SDL_VTM_tsCtrl_valid_map |
VTM temperature sensor band gap maximum temperature | |
This enumerator define for VTM temperature sensor band gap maximum temperature out of range alert control | |
#define | SDL_VTM_TS_CTRL_MAXT_OUTRG_GEN_ALERT (1u) |
#define | SDL_VTM_TS_CTRL_MAXT_OUTRG_NO_ALERT (0u) |
typedef uint8_t | SDL_VTM_tsCtrl_max_outrg_alert |
VTM temperature sensor band gap reset control bits | |
This enumerator define for VTM temperature sensor band gap reset control bits | |
#define | SDL_VTM_TS_CTRL_SENSOR_RESET (0u) |
#define | SDL_VTM_TS_CTRL_SENSOR_NORM_OP (1u) |
typedef uint8_t | SDL_VTM_tsCtrl_resetCtrl |
VTM temperature sensor mode control bits | |
This enumerator define for VTM temperature sensor mode control bits | |
#define | SDL_VTM_TS_CTRL_SINGLESHOT_MODE (0u) |
#define | SDL_VTM_TS_CTRL_CONTINUOUS_MODE (1u) |
typedef uint8_t | SDL_VTM_tsCtrl_mode |
VTM temperature sensor band gap single shot mode start of conversion trigger | |
This enumerator define for VTM temperature sensor band gap single shot mode start of conversion trigger | |
#define | SDL_VTM_TS_CTRL_SINGLESHOT_ADC_CONV_IN_PROGRESS (1u) |
#define | SDL_VTM_TS_CTRL_SINGLESHOT_ADC_CONV_COMPLETE (0u) |
typedef uint8_t | SDL_VTM_tsCtrl_singleshot_conv_stat |
VTM Temperature Sensor thresholds valid bit map | |
This enumerator define for VTM Temperature Sensor thresholds valid bit map | |
#define | SDL_VTM_GT_TH1_VALID (1u) |
#define | SDL_VTM_GT_TH2_VALID (2u) |
#define | SDL_VTM_LT_TH0_VALID (4u) |
typedef uint8_t | SDL_VTM_thr_valid_map |
VTM Voltage domain event status | |
#define | SDL_VTM_VD_EVT_STAT_THR_ALERTS_MASK (7u) |
#define | SDL_VTM_VD_EVT_STAT_LT_TH0_ALERT (4u) |
#define | SDL_VTM_VD_EVT_STAT_GT_TH1_ALERT (1u) |
#define | SDL_VTM_VD_EVT_STAT_GT_TH2_ALERT (2u) |
typedef uint8_t | SDL_VTM_vdEvt_status |
void | SDL_VTM_getSensorVDCount (const SDL_VTM_cfg1Regs *p_cfg1) |
get sensor and VD count More... | |
SDL_VTM_adc_code | SDL_VTM_getBestValue (SDL_VTM_adc_code c0, SDL_VTM_adc_code c1, SDL_VTM_adc_code c2) |
select best ADC code More... | |
SDL_VTM_adc_code | SDL_VTM_getAdcCode (const SDL_VTM_cfg1Regs_TMPSENS *p_sensor) |
read Temperature sensor ADC code More... | |
int32_t | SDL_VTM_vdSetOppVid (const SDL_VTM_cfg1Regs *p_cfg1, SDL_VTM_InstVd instance, SDL_VTM_vid_opp vid_opp, uint8_t vid_opp_val) |
set the VID OPP Code for VID OPP register More... | |
int32_t | SDL_VTM_vdGetOppVid (const SDL_VTM_cfg1Regs *p_cfg1, SDL_VTM_InstVd instance, SDL_VTM_vid_opp vid_opp, uint8_t *p_vid_opp_val) |
get VTM VID OPP Code from VID OPP register More... | |
int32_t | SDL_VTM_vdEvtSelSet (const SDL_VTM_cfg1Regs *p_cfg1, SDL_VTM_InstVd instance, SDL_VTM_vdEvtSel_set vd_temp_evts) |
set Voltage domain a event select and control set register. In this API, select which of the event contributions of the temp-monitors controlled by this VTM will contribute to generate the merged event/alerts of this VD. Any combination of them could be selected More... | |
int32_t | SDL_VTM_tsSetGlobalCfg (const SDL_VTM_cfg2Regs *p_cfg2, const SDL_VTM_tsGlobal_cfg *p_tsGlobal_cfg) |
VTM Temperature Sensor Set Global configuration values. More... | |
int32_t | SDL_VTM_tsGetGlobalCfg (const SDL_VTM_cfg2Regs *p_cfg2, SDL_VTM_tsGlobal_cfg *p_tsGlobal_cfg) |
VTM Temperature Sensor Get Global configuration values. More... | |
int32_t | SDL_VTM_tsSetCtrl (const SDL_VTM_cfg2Regs *p_cfg2, SDL_VTM_InstTs instance, const SDL_VTM_Ctrlcfg *p_tsCtrl_cfg) |
VTM Temperature Sensor Control. More... | |
int32_t | SDL_VTM_tsGetCtrl (const SDL_VTM_cfg2Regs *p_cfg2, SDL_VTM_InstTs instance, SDL_VTM_Ctrlcfg *p_tsCtrl_cfg) |
Read VTM Temperature Sensor Control. More... | |
int32_t | SDL_VTM_tsSetThresholds (const SDL_VTM_cfg1Regs *p_cfg1, SDL_VTM_InstTs instance, const SDL_VTM_tsThrVal *p_thr_val) |
VTM Temperature sensor set, clear threshold values and enable, disable threshold events. More... | |
int32_t | SDL_VTM_tsGetThresholds (const SDL_VTM_cfg1Regs *p_cfg1, SDL_VTM_InstTs instance, SDL_VTM_tsThrVal *p_thr_val) |
VTM Temperature Sensor get threshold values and threshold enable/disable status. More... | |
int32_t | SDL_VTM_tsConvADCToTemp (SDL_VTM_adc_code adc_code, SDL_VTM_InstTs instance, int32_t *p_milli_degree_temp_val) |
VTM Temperature ADC code to Temperature conversion. More... | |
int32_t | SDL_VTM_tsConvTempToAdc (int32_t milli_degree_temp_val, SDL_VTM_InstTs instance, SDL_VTM_adc_code *p_adc_code) |
VTM Temperature to ADC code conversion. More... | |
int32_t | SDL_VTM_tsSetMaxTOutRgAlertThr (const SDL_VTM_cfg2Regs *p_cfg2, SDL_VTM_InstTs instance, int32_t high_temp_in_milli_degree_celcius, int32_t low_temp_in_milli_degree_celcius) |
VTM Temperature Sensor Maximum Temperature Out of Range Alert threshold. More... | |
Data Structures | |
struct | SDL_VTM_tsGlobal_cfg |
VTM Global Configuration Registers. More... | |
struct | SDL_VTM_Ctrlcfg |
VTM temperature sensor band gap control. More... | |
struct | SDL_VTM_tsThrVal |
VTM temperature sensor threshold values. More... | |
struct | SDL_VTM_Stat_val |
VTM temperature sensor Stat values. More... | |
Macros | |
#define | SDL_VTM_VD_CONFIG_CTRL_VID_OPP (1U) |
#define | SDL_VTM_VD_CONFIG_CTRL_EVT_SEL (2U) |
#define | SDL_VTM_VD_CONFIG_CTRL_GLB_CFG (4U) |
Typedefs | |
typedef uint8_t | SDL_VTM_configVdCtrl |
This enumerator define forVTM VD configuration valid map. More... | |
VTM Temperature Sensor global control samples per count | |
typedef uint16_t | SDL_VTM_tsGlobal_samples_per_count |
VTM temperature sensor ADC code | |
typedef int16_t | SDL_VTM_adc_code |
#define SDL_VTM_VD_CONFIG_CTRL_VID_OPP (1U) |
#define SDL_VTM_VD_CONFIG_CTRL_EVT_SEL (2U) |
#define SDL_VTM_VD_CONFIG_CTRL_GLB_CFG (4U) |
#define SDL_VTM_VD_CONFIG_CTRL_SET_CTL (1U) |
#define SDL_VTM_VD_CONFIG_CTRL_OUTRNG_ALRT (2U) |
#define SDL_VTM_VD_CONFIG_CTRL_SET_THR (4U) |
#define SDL_VTM_VID_OPP_MAX_NUM ((uint8_t) 4U) |
Maximum number of OPP VID Codes
#define SDL_VTM_VID_OPP_3_CODE ((uint8_t) 3U) |
VID OPP3 Code
#define SDL_VTM_VID_OPP_2_CODE ((uint8_t) 2U) |
VID OPP2 Code
#define SDL_VTM_VID_OPP_1_CODE ((uint8_t) 1U) |
VID OPP1 Code
#define SDL_VTM_VID_OPP_0_CODE ((uint8_t) 0U) |
VID OPP0 Code
#define SDL_VTM_TS_STAT_VD_MAP_RTC ((uint32) 0U) |
RTC Voltage Domain map
#define SDL_VTM_TS_STAT_VD_MAP_WKUP ((uint32) 1U) |
WKUP Voltage Domain map
#define SDL_VTM_TS_STAT_VD_MAP_MCU ((uint32) 2U) |
MCU Voltage Domain map
#define SDL_VTM_TS_STAT_VD_MAP_CORE ((uint32) 3U) |
Core Voltage Domain map
#define SDL_VTM_TSTAT_VD_MAP_NOT_IMPLEMENTED ((uint32) 15U) |
Voltage Domain map not implemented
#define SDL_VTM_VD_LT_THR0_INTR_RAW_SET (1u) |
#define SDL_VTM_VD_GT_THR1_INTR_RAW_SET (2u) |
#define SDL_VTM_VD_GT_THR2_INTR_RAW_SET (4u) |
#define SDL_VTM_VD_LT_THR0_INTR_RAW_CLR (8u) |
#define SDL_VTM_VD_GT_THR1_INTR_RAW_CLR (16u) |
#define SDL_VTM_VD_GT_THR2_INTR_RAW_CLR (32u) |
#define SDL_VTM_VD_LT_THR0_INTR_EN_SET (64u) |
#define SDL_VTM_VD_GT_THR1_INTR_EN_SET (128u) |
#define SDL_VTM_VD_GT_THR2_INTR_EN_SET (256u) |
#define SDL_VTM_VD_LT_THR0_INTR_EN_CLR (512u) |
#define SDL_VTM_VD_GT_THR1_INTR_EN_CLR (1024u) |
#define SDL_VTM_VD_GT_THR2_INTR_EN_CLR (2048u) |
#define SDL_VTM_VD_INTR_INVALID |
#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_0 (1u) |
#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_1 (2u) |
#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_2 (4u) |
#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_3 (8u) |
#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_4 (16u) |
#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_5 (32u) |
#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_6 (64u) |
#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_7 (128u) |
#define SDL_VTM_TSGLOBAL_CLK_SEL_VALID (1u) |
#define SDL_VTM_TSGLOBAL_CLK_DIV_VALID (2u) |
#define SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_EN_VALID (4u) |
#define SDL_VTM_TSGLOBAL_MAXT_OUTRG_ALERT_THR0_VALID (8u) |
#define SDL_VTM_TSGLOBAL_MAXT_OUTRG_ALERT_THR_VALID (16u) |
#define SDL_VTM_TSGLOBAL_SAMPLES_PER_CNT_VALID (32u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_SEL_FIX_REF_CLK (1u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_SEL_FIX_REF2_CLK (2u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_1 (0u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_2 (1u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_3 (2u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_4 (3u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_5 (4u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_6 (5u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_7 (6u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_8 (7u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_9 (8u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_10 (9u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_11 (10u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_12 (11u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_13 (12u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_14 (13u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_15 (14u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_16 (15u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_17 (16u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_18 (17u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_19 (18u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_20 (19u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_21 (20u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_22 (21u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_23 (22u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_24 (23u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_25 (24u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_26 (25u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_27 (26u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_28 (27u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_29 (28u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_30 (29u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_31 (30u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_32 (31u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_33 (32u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_34 (33u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_35 (34u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_36 (35u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_37 (36u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_38 (37u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_39 (38u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_40 (39u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_41 (40u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_42 (41u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_43 (42u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_44 (43u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_45 (44u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_46 (45u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_47 (46u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_48 (47u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_49 (48u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_50 (49u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_51 (50u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_52 (51u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_53 (52u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_54 (53u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_55 (54u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_56 (55u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_57 (56u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_58 (57u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_59 (58u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_60 (59u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_61 (60u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_62 (61u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_63 (62u) |
#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_64 (63u) |
#define SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_ENABLE (1u) |
#define SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_DISABLE (0u) |
#define SDL_VTM_TS_CTRL_MAXT_OUTG_ALERT_VALID (1u) |
#define SDL_VTM_TS_CTRL_RESET_CTRL_VALID (2u) |
#define SDL_VTM_TS_CTRL_SOC_VALID (4u) |
#define SDL_VTM_TS_CTRL_MODE_VALID (8u) |
#define SDL_VTM_TS_CTRL_MAXT_OUTRG_GEN_ALERT (1u) |
#define SDL_VTM_TS_CTRL_MAXT_OUTRG_NO_ALERT (0u) |
#define SDL_VTM_TS_CTRL_SENSOR_RESET (0u) |
#define SDL_VTM_TS_CTRL_SENSOR_NORM_OP (1u) |
#define SDL_VTM_TS_CTRL_SINGLESHOT_MODE (0u) |
#define SDL_VTM_TS_CTRL_CONTINUOUS_MODE (1u) |
#define SDL_VTM_TS_CTRL_SINGLESHOT_ADC_CONV_IN_PROGRESS (1u) |
#define SDL_VTM_TS_CTRL_SINGLESHOT_ADC_CONV_COMPLETE (0u) |
#define SDL_VTM_GT_TH1_VALID (1u) |
#define SDL_VTM_GT_TH2_VALID (2u) |
#define SDL_VTM_LT_TH0_VALID (4u) |
#define SDL_VTM_TS_READ_VD_MAP_VAL (1U) |
#define SDL_VTM_TS_READ_ALL_THRESHOLD_ALERTS (2U) |
#define SDL_VTM_TS_READ_FIRST_TIME_EOC_BIT (4U) |
#define SDL_VTM_TS_READ_DATA_VALID_BIT (8U) |
#define SDL_VTM_TS_READ_DATA_OUT_VAL (16U) |
#define SDL_VTM_VD_EVT_STAT_THR_ALERTS_MASK (7u) |
#define SDL_VTM_VD_EVT_STAT_LT_TH0_ALERT (4u) |
#define SDL_VTM_VD_EVT_STAT_GT_TH1_ALERT (1u) |
#define SDL_VTM_VD_EVT_STAT_GT_TH2_ALERT (2u) |
typedef uint8_t SDL_VTM_configVdCtrl |
This enumerator define forVTM VD configuration valid map.
typedef uint8_t SDL_VTM_configTsCtrl |
typedef uint8_t SDL_VTM_vid_opp |
typedef uint8_t SDL_VTM_ts_stat_vd_map |
typedef uint16_t SDL_VTM_intrCtrl |
typedef uint16_t SDL_VTM_vdEvtSel_set |
typedef uint32_t SDL_VTM_tsGlobal_ctrl_valid_map |
typedef uint8_t SDL_VTM_tsGlobal_clkSel |
typedef uint8_t SDL_VTM_tsGlobal_clkDiv |
typedef uint8_t SDL_VTM_tsGlobal_any_maxt_outrg_alert_en |
typedef uint16_t SDL_VTM_tsGlobal_samples_per_count |
typedef uint8_t SDL_VTM_tsCtrl_valid_map |
typedef uint8_t SDL_VTM_tsCtrl_max_outrg_alert |
typedef uint8_t SDL_VTM_tsCtrl_resetCtrl |
typedef uint8_t SDL_VTM_tsCtrl_mode |
typedef uint8_t SDL_VTM_tsCtrl_singleshot_conv_stat |
typedef uint8_t SDL_VTM_thr_valid_map |
typedef uint8_t SDL_VTM_Stat_read_ctrl |
typedef int16_t SDL_VTM_adc_code |
typedef uint8_t SDL_VTM_vdEvt_status |
void SDL_VTM_getSensorVDCount | ( | const SDL_VTM_cfg1Regs * | p_cfg1 | ) |
get sensor and VD count
p_cfg1 | [IN] Pointer to the VTM configuration1 structure |
SDL_VTM_adc_code SDL_VTM_getBestValue | ( | SDL_VTM_adc_code | c0, |
SDL_VTM_adc_code | c1, | ||
SDL_VTM_adc_code | c2 | ||
) |
select best ADC code
c0 | [IN] ADC code 0 |
c1 | [IN] ADC code 1 |
c2 | [IN] ADC code 2 |
SDL_VTM_adc_code SDL_VTM_getAdcCode | ( | const SDL_VTM_cfg1Regs_TMPSENS * | p_sensor | ) |
read Temperature sensor ADC code
p_sensor | [IN] Pointer to the sensor code |
int32_t SDL_VTM_vdSetOppVid | ( | const SDL_VTM_cfg1Regs * | p_cfg1, |
SDL_VTM_InstVd | instance, | ||
SDL_VTM_vid_opp | vid_opp, | ||
uint8_t | vid_opp_val | ||
) |
set the VID OPP Code for VID OPP register
Reset defaults are sourced from efuse for each OPP. The default reset values will not be necessarily overwritten. The write capability in the MMR is for having the option to debug and have software driven adjustments if necessary
p_cfg1 | [IN] Pointer to the VTM configuration1 structure |
instance | [IN] VTM Voltage Domain instance |
vid_opp | [IN] which VID OPP to be updated |
vid_opp_val | [IN] VID OPP Code value |
int32_t SDL_VTM_vdGetOppVid | ( | const SDL_VTM_cfg1Regs * | p_cfg1, |
SDL_VTM_InstVd | instance, | ||
SDL_VTM_vid_opp | vid_opp, | ||
uint8_t * | p_vid_opp_val | ||
) |
get VTM VID OPP Code from VID OPP register
p_cfg1 | [IN] Pointer to the VTM configuration1 structure |
instance | [IN] VTM Voltage Domain instance |
vid_opp | [IN] which VID OPP to be updated |
p_vid_opp_val | [OUT] Pointer to VID OPP Code value |
int32_t SDL_VTM_vdEvtSelSet | ( | const SDL_VTM_cfg1Regs * | p_cfg1, |
SDL_VTM_InstVd | instance, | ||
SDL_VTM_vdEvtSel_set | vd_temp_evts | ||
) |
set Voltage domain a event select and control set register. In this API, select which of the event contributions of the temp-monitors controlled by this VTM will contribute to generate the merged event/alerts of this VD. Any combination of them could be selected
p_cfg1 | [IN] Pointer to the VTM configuration1 structure |
instance | [IN] VTM Voltage Domain instance |
vd_temp_evts | [IN] Temperature events to be selected for VD |
int32_t SDL_VTM_tsSetGlobalCfg | ( | const SDL_VTM_cfg2Regs * | p_cfg2, |
const SDL_VTM_tsGlobal_cfg * | p_tsGlobal_cfg | ||
) |
VTM Temperature Sensor Set Global configuration values.
p_cfg2 | [IN] Pointer to the VTM configuration2 structure |
p_tsGlobal_cfg | [IN] Pointer to temperature global configuration |
int32_t SDL_VTM_tsGetGlobalCfg | ( | const SDL_VTM_cfg2Regs * | p_cfg2, |
SDL_VTM_tsGlobal_cfg * | p_tsGlobal_cfg | ||
) |
VTM Temperature Sensor Get Global configuration values.
p_cfg2 | [IN] Pointer to the VTM configuration2 structure |
p_tsGlobal_cfg | [OUT] Pointer to temperature global configuration |
int32_t SDL_VTM_tsSetCtrl | ( | const SDL_VTM_cfg2Regs * | p_cfg2, |
SDL_VTM_InstTs | instance, | ||
const SDL_VTM_Ctrlcfg * | p_tsCtrl_cfg | ||
) |
VTM Temperature Sensor Control.
p_cfg2 | [IN] Pointer to the VTM configuration2 structure |
instance | [IN] VTM Temperature sensor instance |
p_tsCtrl_cfg | [IN] Pointer to temperature sensor control configuration |
int32_t SDL_VTM_tsGetCtrl | ( | const SDL_VTM_cfg2Regs * | p_cfg2, |
SDL_VTM_InstTs | instance, | ||
SDL_VTM_Ctrlcfg * | p_tsCtrl_cfg | ||
) |
Read VTM Temperature Sensor Control.
p_cfg2 | [IN] Pointer to the VTM configuration2 structure |
instance | [IN] VTM Temperature sensor instance |
p_tsCtrl_cfg | [IN] Pointer to temperature sensor control configuration |
int32_t SDL_VTM_tsSetThresholds | ( | const SDL_VTM_cfg1Regs * | p_cfg1, |
SDL_VTM_InstTs | instance, | ||
const SDL_VTM_tsThrVal * | p_thr_val | ||
) |
VTM Temperature sensor set, clear threshold values and enable, disable threshold events.
p_cfg1 | [IN] Pointer to the VTM configuration1 structure |
instance | [IN] VTM Temperature sensor instance |
p_thr_val | [IN] Pointer to temperature threshold values |
int32_t SDL_VTM_tsGetThresholds | ( | const SDL_VTM_cfg1Regs * | p_cfg1, |
SDL_VTM_InstTs | instance, | ||
SDL_VTM_tsThrVal * | p_thr_val | ||
) |
VTM Temperature Sensor get threshold values and threshold enable/disable status.
p_cfg1 | [IN] Pointer to the VTM configuration1 structure |
instance | [IN] VTM Temperature sensor instance |
p_thr_val | [OUT] Pointer to temperature threshold values |
int32_t SDL_VTM_tsConvADCToTemp | ( | SDL_VTM_adc_code | adc_code, |
SDL_VTM_InstTs | instance, | ||
int32_t * | p_milli_degree_temp_val | ||
) |
VTM Temperature ADC code to Temperature conversion.
adc_code | [IN] 10 Bit ADC code |
instance | [IN] VTM Temperature sensor instance |
p_milli_degree_temp_val | [OUT] Pointer to Temperature in milli degree celcius |
int32_t SDL_VTM_tsConvTempToAdc | ( | int32_t | milli_degree_temp_val, |
SDL_VTM_InstTs | instance, | ||
SDL_VTM_adc_code * | p_adc_code | ||
) |
VTM Temperature to ADC code conversion.
milli_degree_temp_val | [IN] Temperature in milli degree celcius |
instance | [IN] VTM Temperature sensor instance |
p_adc_code | [OUT] Pointer to 10 Bit ADC code |
int32_t SDL_VTM_tsSetMaxTOutRgAlertThr | ( | const SDL_VTM_cfg2Regs * | p_cfg2, |
SDL_VTM_InstTs | instance, | ||
int32_t | high_temp_in_milli_degree_celcius, | ||
int32_t | low_temp_in_milli_degree_celcius | ||
) |
VTM Temperature Sensor Maximum Temperature Out of Range Alert threshold.
This function sets the "high temperature threshold" and "low temperature threshold" alert thresholds for the VTM hardware to use in determining when to apply the device reset (and when to release it). When the temperatures are above the high threshold, a SoC reset would be done and gets released after the temperature falls below the low temperature threshold. There should not be any ISR (Interrupt Service Routine) need to program for maximum temperature out of range programming. The caller should have actively taken necessary cooling actions, prior to temperature reaching to this maximum value, with the help of GT_THR1 and/or GT_THR2 alert ISRs.
p_cfg2 | [IN] Pointer to the VTM configuration2 structure |
instance | [IN] VTM Temperature sensor instance |
high_temp_in_milli_degree_celcius | [IN] high temperature in milli degree celcius |
low_temp_in_milli_degree_celcius | [IN] low temperature in milli degree celcius |