epwm/v0/epwm.h

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/*
 * Copyright (C) 2021 Texas Instruments Incorporated
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *   Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 *   Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 *   Neither the name of Texas Instruments Incorporated nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef EPWM_V0_H_
#define EPWM_V0_H_
 
/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */
 
#include <drivers/hw_include/cslr.h>
#include <drivers/hw_include/cslr_epwm.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* ========================================================================== */
/*                             Macros & Typedefs                              */
/* ========================================================================== */
 
typedef uint32_t Epwm_OutputCh_t;
#define EPWM_OUTPUT_CH_MIN (0U)
 
#define EPWM_OUTPUT_CH_A  (EPWM_OUTPUT_CH_MIN)
 
#define EPWM_OUTPUT_CH_B  (1U)
 
#define EPWM_OUTPUT_CH_MAX (EPWM_OUTPUT_CH_B)
 
typedef uint32_t Epwm_TbCounterDir_t;
#define EPWM_TB_COUNTER_DIR_UP      (PWMSS_EPWM_TBCTL_CTRMODE_UP_COUNT)
 
#define EPWM_TB_COUNTER_DIR_DOWN    (PWMSS_EPWM_TBCTL_CTRMODE_DOWN_COUNT)
 
#define EPWM_TB_COUNTER_DIR_UP_DOWN (PWMSS_EPWM_TBCTL_CTRMODE_UP_DOWN_COUNT)
 
#define EPWM_TB_COUNTER_DIR_STOP    (PWMSS_EPWM_TBCTL_CTRMODE_STOP_FREEZE)
 
typedef uint32_t Epwm_ShadowRegCtrl_t;
#define EPWM_SHADOW_REG_CTRL_ENABLE  (PWMSS_EPWM_TBCTL_PRDLD_LOAD_FROM_SHADOW)
 
#define EPWM_SHADOW_REG_CTRL_DISABLE (PWMSS_EPWM_TBCTL_PRDLD_LOAD_IMMEDIATELY)
 
typedef uint32_t Epwm_TbCntDirAftSync_t;
#define EPWM_TB_CNT_DIR_AFT_SYNC_DOWN (PWMSS_EPWM_TBCTL_PHSDIR_COUNT_DOWN)
 
#define EPWM_TB_CNT_DIR_AFT_SYNC_UP   (PWMSS_EPWM_TBCTL_PHSDIR_COUNT_UP)
 
typedef uint32_t Epwm_TbSyncOutEvt_t;
#define EPWM_TB_SYNC_OUT_EVT_SYNCIN        (PWMSS_EPWM_TBCTL_SYNCOSEL_EPWMXSYNC)
 
#define EPWM_TB_SYNC_OUT_EVT_CNT_EQ_ZERO   (PWMSS_EPWM_TBCTL_SYNCOSEL_CTR_0)
 
#define EPWM_TB_SYNC_OUT_EVT_CNT_EQ_CMP_B  (PWMSS_EPWM_TBCTL_SYNCOSEL_CTR_CPMB)
 
#define EPWM_TB_SYNC_OUT_EVT_DISABLE       (PWMSS_EPWM_TBCTL_SYNCOSEL_DISABLE_EPWMXSYNCO)
 
typedef uint32_t Epwm_TbSts_t;
#define EPWM_TB_STS_CTR_MAX  (PWMSS_EPWM_TBSTS_CTRMAX_MASK)
 
#define EPWM_TB_STS_SYNCI    (PWMSS_EPWM_TBSTS_SYNCI_MASK)
 
#define EPWM_TB_STS_CTR_DIR  (PWMSS_EPWM_TBSTS_CTRDIR_MASK)
 
typedef uint32_t Epwm_TbEmuMode_t;
#define EPWM_TB_EMU_MODE_STP_AFT_NEXT_CYCLE  (PWMSS_EPWM_TBCTL_FREE_SOFT_STOP_AFTER_NEXT_CTR)
 
#define EPWM_TB_EMU_MODE_STP_AFT_COMPLETE_CYCLE (PWMSS_EPWM_TBCTL_FREE_SOFT_STOP_AFTER_CYCLE)
 
#define EPWM_TB_EMU_MODE_FREE_RUN (PWMSS_EPWM_TBCTL_FREE_SOFT_RUN2)
 
typedef uint32_t Epwm_CcCmp_t;
#define EPWM_CC_CMP_MIN (0U)
 
#define EPWM_CC_CMP_A (EPWM_CC_CMP_MIN)
 
#define EPWM_CC_CMP_B (1U)
 
#define EPWM_CC_CMP_MAX (CSL_EPWM_CC_CMP_B)
 
typedef uint32_t Epwm_CcCmpLoadMode_t;
#define EPWM_CC_CMP_LOAD_MODE_CNT_EQ_ZERO           (PWMSS_EPWM_CMPCTL_LOADAMODE_CTR_0)
 
#define EPWM_CC_CMP_LOAD_MODE_CNT_EQ_PRD            (PWMSS_EPWM_CMPCTL_LOADAMODE_CTR_PRD)
 
#define EPWM_CC_CMP_LOAD_MODE_CNT_EQ_ZERO_OR_PRD    (PWMSS_EPWM_CMPCTL_LOADAMODE_CTR_0_OR_PRD)
 
#define EPWM_CC_CMP_LOAD_MODE_NO_LOAD               (PWMSS_EPWM_CMPCTL_LOADAMODE_FREEZE)
 
typedef uint32_t Epwm_AqAction_t;
#define EPWM_AQ_ACTION_DONOTHING    (PWMSS_EPWM_AQCTLA_ZRO_DISABLED)
 
#define EPWM_AQ_ACTION_LOW          (PWMSS_EPWM_AQCTLA_ZRO_CLEAR)
 
#define EPWM_AQ_ACTION_HIGH         (PWMSS_EPWM_AQCTLA_ZRO_SET)
 
#define EPQM_AQ_ACTION_TOLLGE       (PWMSS_EPWM_AQCTLA_ZRO_TOGGLE)
#define EPWM_AQ_ACTION_TOLLGE       (CSL_EPQM_AQ_ACTION_TOLLGE)
 
typedef uint32_t Epwm_AqSwTrigOtAction_t;
#define EPWM_AQ_SW_TRIG_OT_ACTION_DONOTHING  (PWMSS_EPWM_AQSFRC_ACTSFA_DISABLED)
 
#define EPWM_AQ_SW_TRIG_OT_ACTION_LOW        (PWMSS_EPWM_AQSFRC_ACTSFA_CLEAR)
 
#define EPWM_AQ_SW_TRIG_OT_ACTION_HIGH       (PWMSS_EPWM_AQSFRC_ACTSFA_SET)
 
#define EPWM_AQ_SW_TRIG_OT_ACTION_TOGGLE     (PWMSS_EPWM_AQSFRC_ACTSFA_TOGGLE)
 
typedef uint32_t Epwm_AqSwTrigContAction_t;
#define EPWM_AQ_SW_TRIG_CONT_ACTION_NOEFFECT    (PWMSS_EPWM_AQCSFRC_CSFA_DISABLED)
 
#define EPWM_AQ_SW_TRIG_CONT_ACTION_LOW         (PWMSS_EPWM_AQCSFRC_CSFA_LOW_OUTPUT)
 
#define EPWM_AQ_SW_TRIG_CONT_ACTION_HIGH        (PWMSS_EPWM_AQCSFRC_CSFA_HIGH_OUTPUT)
 
#define EPWM_AQ_SW_TRIG_CONT_ACTION_SW_DISBALED (PWMSS_EPWM_AQCSFRC_CSFA_NO_EFFECT)
 
typedef uint32_t Epwm_AqCsfrcRegReload_t;
#define EPWM_AQ_CSFRC_REG_RELOAD_CNT_EQ_ZRO         (PWMSS_EPWM_AQSFRC_RLDCSF_CTR_0)
 
#define EPWM_AQ_CSFRC_REG_RELOAD_CNT_EQ_PRD         (PWMSS_EPWM_AQSFRC_RLDCSF_CTR_PERIOD)
 
#define EPWM_AQ_CSFRC_REG_RELOAD_CNT_EQ_ZRO_OR_PRD  (PWMSS_EPWM_AQSFRC_RLDCSF_CTR_0_OR_PERIOD)
 
#define EPWM_AQ_CSFRC_REG_RELOAD_IMMEDIATE          (PWMSS_EPWM_AQSFRC_RLDCSF_IMMEDIATE)
 
typedef uint32_t Epwm_DbInMode_t;
#define EPWM_DB_IN_MODE_A_RED_A_FED (PWMSS_EPWM_DBCTL_IN_MODE_SRC_ARED_AFED)
 
#define EPWM_DB_IN_MODE_B_RED_A_FED (PWMSS_EPWM_DBCTL_IN_MODE_SRC_BRED_AFED)
 
#define EPWM_DB_IN_MODE_A_RED_B_FED (PWMSS_EPWM_DBCTL_IN_MODE_SRC_ARED_BFED)
 
#define EPWM_DB_IN_MODE_B_RED_B_FED (PWMSS_EPWM_DBCTL_IN_MODE_SRC_BRED_BFED)
 
typedef uint32_t Epwm_DbPolSel_t;
#define EPWM_DB_POL_SEL_ACTV_HIGH               (PWMSS_EPWM_DBCTL_POLSEL_ACTIVE_HIGH)
 
#define EPWM_DB_POL_SEL_ACTV_LOW_COMPLEMENTARY  (PWMSS_EPWM_DBCTL_POLSEL_ACTIVE_LOW_COMPLEMENTARY)
 
#define EPWM_DB_POL_SEL_ACTV_HIGH_COMPLEMENTARY (PWMSS_EPWM_DBCTL_POLSEL_ACTIVE_HIGH_COMPLEMENTARY)
 
#define EPWM_DB_POL_SEL_ACTV_LOW                (PWMSS_EPWM_DBCTL_POLSEL_ACTIVE_LOW)
 
typedef uint32_t Epwm_DbOutMode_t;
#define EPWM_DB_OUT_MODE_BYPASS         (PWMSS_EPWM_DBCTL_OUT_MODE_DISABLED)
 
#define EPWM_DB_OUT_MODE_NO_RED_B_FED   (PWMSS_EPWM_DBCTL_OUT_MODE_DISABLE_RISING_EDGE)
 
#define EPWM_DB_OUT_MODE_A_RED_NO_FED   (PWMSS_EPWM_DBCTL_OUT_MODE_DISABLE_FALLING_EDGE)
 
#define EPWM_DB_OUT_MODE_A_RED_B_FED    (PWMSS_EPWM_DBCTL_OUT_MODE_ENABLED)
 
typedef uint32_t Epwm_ChpDutyCycle_t;
#define EPWM_CHP_DUTY_CYCLE_PERC_12PNT5 (PWMSS_EPWM_PCCTL_CHPDUTY_DUTY_12_5)
 
#define EPWM_CHP_DUTY_CYCLE_PERC_25     (PWMSS_EPWM_PCCTL_CHPDUTY_DUTY_25)
 
#define EPWM_CHP_DUTY_CYCLE_PERC_37PNT5 (PWMSS_EPWM_PCCTL_CHPDUTY_DUTY_37_5)
 
#define EPWM_CHP_DUTY_CYCLE_PERC_50_PER (PWMSS_EPWM_PCCTL_CHPDUTY_DUTY_50)
 
#define EPWM_CHP_DUTY_CYCLE_PERC_62PNT5 (PWMSS_EPWM_PCCTL_CHPDUTY_DUTY_62_5)
 
#define EPWM_CHP_DUTY_CYCLE_PERC_75     (PWMSS_EPWM_PCCTL_CHPDUTY_DUTY_75)
 
#define EPWM_CHP_DUTY_CYCLE_PERC_87PNT5 (PWMSS_EPWM_PCCTL_CHPDUTY_DUTY_87_5)
 
typedef uint32_t Epwm_ChpClkFreq_t;
#define EPWM_CHP_CLK_FREQ_DIV_BY_1 (PWMSS_EPWM_PCCTL_CHPFREQ_DIV_1)
 
#define EPWM_CHP_CLK_FREQ_DIV_BY_2 (PWMSS_EPWM_PCCTL_CHPFREQ_DIV_2)
 
#define EPWM_CHP_CLK_FREQ_DIV_BY_3 (PWMSS_EPWM_PCCTL_CHPFREQ_DIV_3)
 
#define EPWM_CHP_CLK_FREQ_DIV_BY_4 (PWMSS_EPWM_PCCTL_CHPFREQ_DIV_4)
 
#define EPWM_CHP_CLK_FREQ_DIV_BY_5 (PWMSS_EPWM_PCCTL_CHPFREQ_DIV_5)
 
#define EPWM_CHP_CLK_FREQ_DIV_BY_6 (PWMSS_EPWM_PCCTL_CHPFREQ_DIV_6)
 
#define EPWM_CHP_CLK_FREQ_DIV_BY_7 (PWMSS_EPWM_PCCTL_CHPFREQ_DIV_7)
 
#define EPWM_CHP_CLK_FREQ_DIV_BY_8 (PWMSS_EPWM_PCCTL_CHPFREQ_DIV_8)
 
typedef uint32_t Epwm_ChpOshtWidth_t;
#define EPWM_CHP_OSHT_WIDTH_MIN (0U)
 
#define EPWM_CHP_OSHT_WIDTH_1XSYSOUT_BY_8   (CSL_EPWM_CHP_OSHT_WIDTH_MIN)
 
#define EPWM_CHP_OSHT_WIDTH_2XSYSOUT_BY_8   (1U)
 
#define EPWM_CHP_OSHT_WIDTH_3XSYSOUT_BY_8   (2U)
 
#define EPWM_CHP_OSHT_WIDTH_4XSYSOUT_BY_8   (3U)
 
#define EPWM_CHP_OSHT_WIDTH_5XSYSOUT_BY_8   (4U)
 
#define EPWM_CHP_OSHT_WIDTH_6XSYSOUT_BY_8   (5U)
 
#define EPWM_CHP_OSHT_WIDTH_7XSYSOUT_BY_8   (6U)
 
#define EPWM_CHP_OSHT_WIDTH_8XSYSOUT_BY_8   (7U)
 
#define EPWM_CHP_OSHT_WIDTH_9XSYSOUT_BY_8   (8U)
 
#define EPWM_CHP_OSHT_WIDTH_10XSYSOUT_BY_8  (9U)
 
#define EPWM_CHP_OSHT_WIDTH_11XSYSOUT_BY_8  (10U)
 
#define EPWM_CHP_OSHT_WIDTH_12XSYSOUT_BY_8  (11U)
 
#define EPWM_CHP_OSHT_WIDTH_13XSYSOUT_BY_8  (12U)
 
#define EPWM_CHP_OSHT_WIDTH_14XSYSOUT_BY_8  (13U)
 
#define EPWM_CHP_OSHT_WIDTH_15XSYSOUT_BY_8  (14U)
 
#define EPWM_CHP_OSHT_WIDTH_16XSYSOUT_BY_8  (15U)
 
#define EPWM_CHP_OSHT_WIDTH_MAX             (CSL_EPWM_CHP_OSHT_WIDTH_16XSYSOUT_BY_8)
 
typedef uint32_t Epwm_TzTripAction_t;
#define EPWM_TZ_TRIP_ACTION_TRI_STATE   (PWMSS_EPWM_TZCTL_TZA_HIGH_IMPEDANCE)
 
#define EPWM_TZ_TRIP_ACTION_HIGH        (PWMSS_EPWM_TZCTL_TZA_HIGH_STATE)
 
#define EPWM_TZ_TRIP_ACTION_LOW         (PWMSS_EPWM_TZCTL_TZA_LOW_STATE)
 
#define EPWM_TZ_TRIP_ACTION_DO_NOTHING  (PWMSS_EPWM_TZCTL_TZA_DO_NOTHING)
 
typedef uint32_t Epwm_TzEvent_t;
#define EPWM_TZ_EVENT_MIN (0x0U)
 
#define EPWM_TZ_EVENT_ONE_SHOT          (EPWM_TZ_EVENT_MIN)
 
#define EPWM_TZ_EVENT_CYCLE_BY_CYCLE    (0x1U)
 
#define EPWM_TZ_EVENT_MAX               (CSL_EPWM_TZ_EVENT_CYCLE_BY_CYCLE)
 
typedef uint32_t Epwm_TzStsFlg_t;
#define EPWM_TZ_STS_FLG_OST (PWMSS_EPWM_TZFLG_OST_MASK)
 
#define EPWM_TZ_STS_FLG_CBC (PWMSS_EPWM_TZFLG_CBC_MASK)
 
#define EPWM_TZ_STS_FLG_INT (PWMSS_EPWM_TZFLG_INT_MASK)
 
typedef uint32_t Epwm_EtIntrEvt_t;
#define EPWM_ET_INTR_EVT_CNT_EQ_ZRO       (PWMSS_EPWM_ETSEL_INTSEL_CTR_0)
 
#define EPWM_ET_INTR_EVT_CNT_EQ_PRD       (PWMSS_EPWM_ETSEL_INTSEL_CTR_PERIOD)
 
#define EPWM_ET_INTR_EVT_CNT_EQ_CMPA_INC  (PWMSS_EPWM_ETSEL_INTSEL_CTR_CMPA_INCR)
 
#define EPWM_ET_INTR_EVT_CNT_EQ_CMPA_DEC  (PWMSS_EPWM_ETSEL_INTSEL_CTR_CMPA_DECR)
 
#define EPWM_ET_INTR_EVT_CNT_EQ_CMPB_INC  (PWMSS_EPWM_ETSEL_INTSEL_CTR_CMPB_INCR)
 
#define EPWM_ET_INTR_EVT_CNT_EQ_CMPB_DEC  (PWMSS_EPWM_ETSEL_INTSEL_CTR_CMPB_DECR)
 
typedef uint32_t Epwm_EtIntrPeriod_t;
#define EPWM_ET_INTR_PERIOD_DIS_INTR   (PWMSS_EPWM_ETPS_INTPRD_DISABLE)
 
#define EPWM_ET_INTR_PERIOD_FIRST_EVT  (PWMSS_EPWM_ETPS_INTPRD_GEN_FIRST_EVT)
 
#define EPWM_ET_INTR_PERIOD_SECOND_EVT (PWMSS_EPWM_ETPS_INTPRD_GEN_SECOND_EVT)
 
#define EPWM_ET_INTR_PERIOD_THIRD_EVT  (PWMSS_EPWM_ETPS_INTPRD_GEN_THIRD_EVT)
 
#define EPWM_ETFLG_INT_MASK (PWMSS_EPWM_ETFLG_INT_MASK)
 
/* ========================================================================== */
/*                         Structures and Enums                               */
/* ========================================================================== */
 
typedef struct Epwm_TimebaseCfg
{
    uint32_t tbClk;
    uint32_t pwmtbCounterFreqPrd;
    uint32_t tbCntrDirection;
    uint32_t enableSynchronization;
    uint32_t cntDirAfterSync;
    uint32_t phsCountAfterSync;
    uint32_t syncOutSrc;
} Epwm_TimebaseCfg_t;
 
typedef struct Epwm_CounterCmpCfg
{
    uint32_t cmpAValue;
    uint32_t cmpBValue;
} Epwm_CounterCmpCfg_t;
 
typedef struct Epwm_AqActionCfg
{
    uint32_t zeroAction;
    uint32_t prdAction;
    uint32_t cmpAUpAction;
    uint32_t cmpADownAction;
    uint32_t cmpBUpAction;
    uint32_t cmpBDownAction;
} Epwm_AqActionCfg_t;
 
typedef struct Epwm_DeadbandCfg
{
    uint32_t inputMode;
    uint32_t outputMode;
    uint32_t polaritySelect;
    uint32_t risingEdgeDelay;
    uint32_t fallingEdgeDelay;
} Epwm_DeadbandCfg_t;
 
typedef struct Epwm_ChopperCfg
{
    uint32_t dutyCycle;
    uint32_t clkFrequency;
    uint32_t oneShotPulseWidth;
} Epwm_ChopperCfg_t;
 
typedef struct Epwm_TripzoneCfg
{
    uint32_t tripAction;
    uint32_t tripEvtType;
    uint32_t tripPin;
    uint32_t enableTripIntr;
} Epwm_TripzoneCfg_t;
 
typedef struct Epwm_EtCfg
{
    uint32_t intrEvtSource;
    uint32_t intrPrd;
} Epwm_EtCfg_t;
 
/* ========================================================================== */
/*                         Global Variables Declarations                      */
/* ========================================================================== */
 
/* None */
 
/* ========================================================================== */
/*                          Function Declarations                             */
/* ========================================================================== */
 
void Epwm_tbTimebaseClkCfg(uint32_t baseAddr,
                           uint32_t tbClk,
                           uint32_t moduleClk);
 
void Epwm_tbPwmFreqCfg(uint32_t baseAddr,
                       uint32_t tbClk,
                       uint32_t pwmFreq,
                       uint32_t counterDir,
                       uint32_t enableShadowWrite);
 
void Epwm_tbSyncEnable(uint32_t baseAddr,
                       uint32_t tbPhsValue,
                       uint32_t counterDir);
 
void Epwm_tbSyncDisable(uint32_t baseAddr);
 
void Epwm_tbSetSyncOutMode(uint32_t baseAddr, uint32_t syncOutMode);
 
void Epwm_tbTriggerSwSync(uint32_t baseAddr);
 
void Epwm_tbWriteTbCount(uint32_t baseAddr, uint32_t tbCount);
 
uint16_t Epwm_tbReadTbCount(uint32_t baseAddr);
 
uint16_t Epwm_tbGetStatus(uint32_t baseAddr, uint32_t tbStatusMask);
 
void Epwm_tbStatusClear(uint32_t baseAddr, uint32_t tbStatusClrMask);
 
void Epwm_tbSetEmulationMode(uint32_t baseAddr, uint32_t mode);
 
uint32_t Epwm_counterComparatorCfg(uint32_t baseAddr,
                                   uint32_t cmpType,
                                   uint32_t cmpVal,
                                   uint32_t enableShadowWrite,
                                   uint32_t shadowToActiveLoadTrigger,
                                   uint32_t overwriteShadow);
 
void Epwm_aqActionOnOutputCfg(uint32_t baseAddr,
                              uint32_t pwmOutputCh,
                              const Epwm_AqActionCfg_t *pCfg);
 
void Epwm_aqSwTriggerOneTimeAction(uint32_t baseAddr,
                                   uint32_t pwmOutputCh,
                                   uint32_t swTrigAction);
 
void Epwm_aqSwTriggerContAction(uint32_t baseAddr,
                                uint32_t pwmOutputCh,
                                uint32_t swTrigAction,
                                uint32_t activeRegReloadMode);
 
void Epwm_deadbandCfg(uint32_t baseAddr, const Epwm_DeadbandCfg_t *pCfg);
 
void Epwm_deadbandBypass(uint32_t baseAddr);
 
void Epwm_chopperCfg(uint32_t baseAddr, const Epwm_ChopperCfg_t *pCfg);
 
void Epwm_chopperEnable(uint32_t baseAddr, uint32_t enableChopper);
 
void Epwm_tzTriggerTripAction(uint32_t baseAddr,
                              uint32_t tripAction,
                              uint32_t pwmOutputCh);
 
void Epwm_tzTripEventEnable(uint32_t baseAddr,
                            uint32_t tzEventType,
                            uint32_t pinNum);
 
void Epwm_tzTripEventDisable(uint32_t baseAddr,
                             uint32_t tzEventType,
                             uint32_t pinNum);
 
void Epwm_tzIntrEnable(uint32_t baseAddr, uint32_t tzEventType);
 
void Epwm_tzIntrDisable(uint32_t baseAddr, uint32_t tzEventType);
 
uint16_t Epwm_tzEventStatus(uint32_t baseAddr, uint32_t eventMask);
 
void Epwm_tzEventStatusClear(uint32_t baseAddr, uint32_t eventMask);
 
void Epwm_tzTriggerSwEvent(uint32_t baseAddr, uint32_t tzEventType);
 
void Epwm_etIntrCfg(uint32_t baseAddr, uint32_t intrEvtSrc, uint32_t intrPrd);
 
void Epwm_etIntrEnable(uint32_t baseAddr);
 
void Epwm_etIntrDisable(uint32_t baseAddr);
 
uint16_t Epwm_etIntrStatus(uint32_t baseAddr);
 
void Epwm_etIntrClear(uint32_t baseAddr);
 
void Epwm_etIntrTrigger(uint32_t baseAddr);
 
uint16_t Epwm_etGetEventCount(uint32_t baseAddr);
 
#ifdef __cplusplus
}
#endif
 
#endif  /* #ifndef EPWM_V0_H_ */