CC26xx Driver Library
setup.c File Reference
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_adi.h"
#include "../inc/hw_adi_2_refsys.h"
#include "../inc/hw_adi_3_refsys.h"
#include "../inc/hw_aon_ioc.h"
#include "../inc/hw_aon_sysctl.h"
#include "../inc/hw_aon_wuc.h"
#include "../inc/hw_aux_wuc.h"
#include "../inc/hw_ccfg.h"
#include "../inc/hw_fcfg1.h"
#include "../inc/hw_flash.h"
#include "../inc/hw_prcm.h"
#include "../inc/hw_vims.h"
#include "aon_wuc.h"
#include "aux_wuc.h"
#include "chipinfo.h"
#include "setup.h"
#include "setup_rom.h"

Macros

#define CPU_DELAY_MICRO_SECONDS(x)   CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )
 

Functions

static void TrimAfterColdReset (void)
 Trims to be applied when coming from PIN_RESET. More...
 
static void TrimAfterColdResetWakeupFromShutDown (uint32_t ui32Fcfg1Revision)
 Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET). More...
 
static void TrimAfterColdResetWakeupFromShutDownWakeupFromPowerDown (void)
 Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET). More...
 
void SetupTrimDevice (void)
 Performs the necessary trim of the device which is not done in boot code. More...
 

Macro Definition Documentation

#define CPU_DELAY_MICRO_SECONDS (   x)    CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )

Function Documentation

static void TrimAfterColdReset ( void  )
static

Trims to be applied when coming from PIN_RESET.

Returns
None

Referenced by SetupTrimDevice().

358 {
359  // Currently no specific trim for Cold Reset
360 }
static void TrimAfterColdResetWakeupFromShutDown ( uint32_t  ui32Fcfg1Revision)
static

Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET).

Returns
None

Referenced by SetupTrimDevice().

250 {
251  uint32_t ccfg_ModeConfReg ;
252  uint32_t mp1rev ;
253 
254  // Force AUX on and enable clocks
255  //
256  // No need to save the current status of the power/clock registers.
257  // At this point both AUX and AON should have been reset to 0x0.
258  HWREG(AON_WUC_BASE + AON_WUC_O_AUXCTL) = AON_WUC_AUXCTL_AUX_FORCE_ON;
259 
260  // Wait for power on on the AUX domain
261  while( ! ( HWREGBITW( AON_WUC_BASE + AON_WUC_O_PWRSTAT, AON_WUC_PWRSTAT_AUX_PD_ON_BITN )));
262 
263  // Enable the clocks for AUX_DDI0_OSC and AUX_ADI4
264  HWREG(AUX_WUC_BASE + AUX_WUC_O_MODCLKEN0) = AUX_WUC_MODCLKEN0_AUX_DDI0_OSC |
265  AUX_WUC_MODCLKEN0_AUX_ADI4;
266 
267  // It's found to be optimal to override the FCFG1..DCDC_IPEAK setting as follows:
268  // if ( alternative DCDC setting in CCFG is enabled ) ADI3..IPEAK = CCFG..DCDC_IPEAK
269  // else ADI3..IPEAK = 2
270  if (( HWREG( CCFG_BASE + CCFG_O_SIZE_AND_DIS_FLAGS ) & CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING ) == 0 ) {
271  // ADI_3_REFSYS:DCDCCTL5[3] (=DITHER_EN) = CCFG_MODE_CONF_1[19] (=ALT_DCDC_DITHER_EN)
272  // ADI_3_REFSYS:DCDCCTL5[2:0](=IPEAK ) = CCFG_MODE_CONF_1[18:16](=ALT_DCDC_IPEAK )
273  // Using a single 4-bit masked write since layout is equal for both source and destination
274  HWREGB( ADI3_BASE + ADI_O_MASK4B + ( ADI_3_REFSYS_O_DCDCCTL5 * 2 )) = ( 0xF0 |
275  ( HWREG( CCFG_BASE + CCFG_O_MODE_CONF_1 ) >> CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_S ));
276 
277  } else {
278  HWREGB( ADI3_BASE + ADI_O_MASK4B + ( ADI_3_REFSYS_O_DCDCCTL5 * 2 )) = 0x72;
279  }
280 
281  //
282  // Enable for JTAG to be powered down (will still be powered on if debugger is connected)
284 
285  // read the MODE_CONF register in CCFG
286  ccfg_ModeConfReg = HWREG( CCFG_BASE + CCFG_O_MODE_CONF );
287 
288  // First part of trim done after cold reset and wakeup from shutdown:
289  // -Adjust the VDDR_TRIM_SLEEP value.
290  // -Configure DCDC.
291  SetupAfterColdResetWakeupFromShutDownCfg1( ccfg_ModeConfReg );
292 
293  // Second part of trim done after cold reset and wakeup from shutdown:
294  // -Configure XOSC.
295 #if ( CCFG_BASE == CCFG_BASE_DEFAULT )
296  SetupAfterColdResetWakeupFromShutDownCfg2( ui32Fcfg1Revision, ccfg_ModeConfReg );
297 #else
298  NOROM_SetupAfterColdResetWakeupFromShutDownCfg2( ui32Fcfg1Revision, ccfg_ModeConfReg );
299 #endif
300 
301  // Increased margin between digital supply voltage and VDD BOD during standby.
302  // VTRIM_UDIG: signed 4 bits value to be incremented by 2 (max = 7)
303  // VTRIM_BOD: unsigned 4 bits value to be decremented by 1 (min = 0)
304  // This applies to chips with mp1rev < 542 for cc13x0 and for mp1rev < 527 for cc26x0
305  mp1rev = (( HWREG( FCFG1_BASE + FCFG1_O_TRIM_CAL_REVISION ) & FCFG1_TRIM_CAL_REVISION_MP1_M ) >>
306  FCFG1_TRIM_CAL_REVISION_MP1_S ) ;
307  if ( mp1rev < 527 ) {
308  uint32_t ldoTrimReg = HWREG( FCFG1_BASE + FCFG1_O_BAT_RC_LDO_TRIM );
309  uint32_t vtrim_bod = (( ldoTrimReg & FCFG1_BAT_RC_LDO_TRIM_VTRIM_BOD_M ) >>
310  FCFG1_BAT_RC_LDO_TRIM_VTRIM_BOD_S ); // bit[27:24] unsigned
311  uint32_t vtrim_udig = (( ldoTrimReg & FCFG1_BAT_RC_LDO_TRIM_VTRIM_UDIG_M ) >>
312  FCFG1_BAT_RC_LDO_TRIM_VTRIM_UDIG_S ); // bit[19:16] signed but treated as unsigned
313  if ( vtrim_bod > 0 ) {
314  vtrim_bod -= 1;
315  }
316  if ( vtrim_udig != 7 ) {
317  if ( vtrim_udig == 6 ) {
318  vtrim_udig = 7;
319  } else {
320  vtrim_udig = (( vtrim_udig + 2 ) & 0xF );
321  }
322  }
323  HWREGB( ADI2_BASE + ADI_2_REFSYS_O_SOCLDOCTL0 ) =
324  ( vtrim_udig << ADI_2_REFSYS_SOCLDOCTL0_VTRIM_UDIG_S ) |
325  ( vtrim_bod << ADI_2_REFSYS_SOCLDOCTL0_VTRIM_BOD_S ) ;
326  }
327 
328  // Third part of trim done after cold reset and wakeup from shutdown:
329  // -Configure HPOSC.
330  // -Setup the LF clock.
331 #if ( CCFG_BASE == CCFG_BASE_DEFAULT )
332  SetupAfterColdResetWakeupFromShutDownCfg3( ccfg_ModeConfReg );
333 #else
334  NOROM_SetupAfterColdResetWakeupFromShutDownCfg3( ccfg_ModeConfReg );
335 #endif
336 
337  //
338  // Allow AUX to power down
340 
341  // Leaving on AUX and clock for AUX_DDI0_OSC on but turn off clock for AUX_ADI4
342  HWREG( AUX_WUC_BASE + AUX_WUC_O_MODCLKEN0 ) = AUX_WUC_MODCLKEN0_AUX_DDI0_OSC;
343 
344  // Disable EFUSE clock
345  HWREGBITW( FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_EFUSECLK_BITN ) = 1;
346 }
void SetupAfterColdResetWakeupFromShutDownCfg3(uint32_t ccfg_ModeConfReg)
Third part of configuration required when waking up from shutdown.
Definition: setup_rom.c:283
#define AUX_WUC_POWER_DOWN
Definition: aux_wuc.h:95
void AUXWUCPowerCtrl(uint32_t ui32PowerMode)
Control the power to the AUX domain.
Definition: aux_wuc.c:254
void SetupAfterColdResetWakeupFromShutDownCfg1(uint32_t ccfg_ModeConfReg)
First part of configuration required when waking up from shutdown.
Definition: setup_rom.c:123
void SetupAfterColdResetWakeupFromShutDownCfg2(uint32_t ui32Fcfg1Revision, uint32_t ccfg_ModeConfReg)
Second part of configuration required when waking up from shutdown.
Definition: setup_rom.c:178
static void AONWUCJtagPowerOff(void)
Request power off of the JTAG domain.
Definition: aon_wuc.h:792

Here is the call graph for this function:

static void TrimAfterColdResetWakeupFromShutDownWakeupFromPowerDown ( void  )
static

Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET).

Returns
None

Referenced by SetupTrimDevice().

236 {
237  // Currently no specific trim for Powerdown
238 }