SPI Data Transfer¶
Description¶
SPI master clock and data (SCLK, MOSI and MISO)
This resource implements Serial Peripheral Interface (SPI) master clock and data lines, which allows Sensor Controller task code to perform SPI data transfers.
- CC13x0/CC26x0: Uses bit-banging.
- CC13x2/CC26x2 and CC13x4/CC26x4: Uses the AUX SPI Master peripheral.
The interface consists of the following signals:
- SCLK output - Serial clock
- MOSI output - Master output / slave input
- MISO input - Master input / slave output
The pins are mapped in the I/O Mapping Panel .
One or more usages of the SPI Chip Select resource must be used to implement chip select (CSN).
General features:
- 8-bit and 16-bit data transfers
- Most significant bit is shifted out first
- Configurable polarity and phase
- Configurable bit rate division between 1 and 64.
- For a division factor
N, the SCLK frequency is the Sensor Controller clock frequency divided by2 * N. - Due to delay in the digital I/O pads, the maximum supported SCLK frequency is 6 MHz.
- For a division factor
It is assumed that the SPI signals are not shared with another, external SPI master. The SCLK and MOSI lines are driven while CSN is deasserted to prevent these lines from floating. The MISO line can be configured as no pull, pull-up or pull-down. Note that the MISO input buffer is disabled while CSN is deasserted, and will not cause leakage if the pin is left floating in this state (with no pull).
Examples¶
Write Multiple SPI Device Configuration Registers¶
// MACRO: Writes an 8-bit value to an accelerometer register with 8-bit address
macro spiWriteAccelReg(addr, value) {
spiBegin(AUXIO_SPI_CSN_ACCEL);
spiTx8bit(ACCEL_SPI_WRITE);
spiTx8bit(addr);
spiTx8bit(value);
spiEnd(AUXIO_SPI_CSN_ACCEL);
}
// Configure the SPI peripheral
spiCfg(SPI_POL0_PHA0, 1);
// Perform soft reset of the accelerometer, and wait for 50 ms
spiWriteAccelReg(ACCEL_REG_SOFT_RESET, ACCEL_SR_KEY);
fwDelayUs(50000);
// Perform one-time configuration of the accelerometer
spiWriteAccelReg(ACCEL_REG_INTMAP1, ACCEL_IM_DATA_READY);
spiWriteAccelReg(ACCEL_REG_POWER_CTL, ACCEL_PC_LOW_NOISE_0 | ACCEL_PC_MEASURE_ON);
Read Array of SPI Device Registers¶
// Read accelerometer data:
// - Write 8-bit register address
// - Read 16-bit value for each axis, most significant byte first (no need to swap endianess)
spiCfg(SPI_POL0_PHA0, 6);
spiBegin(AUXIO_SPI_CSN_ACCEL);
spiTx8bit(0x42);
spiRx16bit(output.x);
spiRx16bit(output.y);
spiRx16bit(output.z);
spiEnd(AUXIO_SPI_CSN_ACCEL);
Read Array of SPI Device Registers with Endianess Conversion¶
// MACRO: Reads a 16-bit value over SPI, and swaps endianess (LSB is received before MSB)
macro spiRx16bitSwapEndianess(value) {
U16 valueLsbFirst;
spiRx16bit(valueLsbFirst);
utilSwapEndianess(valueLsbFirst; value);
}
// Read accelerometer data:
// - Write 8-bit register address
// - Read 16-bit value for each axis, least significant byte first (need to swap endianess)
spiCfg(SPI_POL0_PHA0, 6);
spiBegin(AUXIO_SPI_CSN_ACCEL);
spiTx8bit(0x42);
spiRx16bitSwapEndianess(output.x);
spiRx16bitSwapEndianess(output.y);
spiRx16bitSwapEndianess(output.z);
spiEnd(AUXIO_SPI_CSN_ACCEL);
Procedures Overview¶
| Name | Brief description |
spiCfg() |
Configures the SPI Master peripheral before operation. More … |
spiClearMosi() |
Clears the SPI MOSI pin (the pin is set to low level). More … |
spiRx16bit() |
Transmits 0x0000 over SPI, and returns the received 16-bit value (big-endian). More … |
spiRx8bit() |
Transmits 0x00 over SPI, and returns the received 8-bit value. More … |
spiSetMosi() |
Sets the SPI MOSI pin (the pin is set to high level). More … |
spiTx16bit() |
Transmits a 16-bit value over SPI (big-endian). More … |
spiTx8bit() |
Transmits an 8-bit value over SPI. More … |
spiTxRx16bit() |
Transmits a 16-bit value over SPI (big-endian), and returns the received 16-bit value (big-endian). More … |
spiTxRx8bit() |
Transmits an 8-bit value over SPI, and returns the received 8-bit value. More … |
Constants¶
| Name | Description |
SPI_POL0_PHA0 |
First edge of SCLK is rising, MOSI/MISO sampled at first edge of SCLK |
SPI_POL0_PHA1 |
First edge of SCLK is rising, MOSI/MISO propagated at first edge of SCLK |
SPI_POL1_PHA0 |
First edge of SCLK is falling, MOSI/MISO sampled at first edge of SCLK |
SPI_POL1_PHA1 |
First edge of SCLK is falling, MOSI/MISO propagated at first edge of SCLK |
Global Variables¶
None.
Procedures¶
spiCfg¶
Prototype: spiCfg(polPha, div)
Configures the SPI Master peripheral before operation.
Parameter value(s)¶
- polPha : SCLK polarity and phase configuration (SPI_POLx_PHAy)
- div : SCLK rate division factor (1 to 64)
spiRx16bit¶
Prototype: spiRx16bit(rxValue)
Transmits 0x0000 over SPI, and returns the received 16-bit value (big-endian).
Return value(s)¶
- rxValue : The received 16-bit value ([15:8] = first byte, [7:0] = second byte)
spiRx8bit¶
Prototype: spiRx8bit(rxValue)
Transmits 0x00 over SPI, and returns the received 8-bit value.
Return value(s)¶
- rxValue : The received 8-bit value
spiTx16bit¶
Prototype: spiTx16bit(txValue)
Transmits a 16-bit value over SPI (big-endian). The received bytes are ignored.
The procedure returns immediately. Any following SPI operation, including spiEnd() , will wait for the operation to finish.
Parameter value(s)¶
- txValue : The 16-bit value to be transmitted ([15:8] = first byte, [7:0] = second byte)
spiTx8bit¶
Prototype: spiTx8bit(txValue)
Transmits an 8-bit value over SPI. The received byte is ignored.
The procedure returns immediately. Any following SPI operation, including spiEnd() , will wait for the operation to finish.
Parameter value(s)¶
- txValue : The 8-bit value to be transmitted
spiTxRx16bit¶
Prototype: spiTxRx16bit(txValue; rxValue)
Transmits a 16-bit value over SPI (big-endian), and returns the received 16-bit value (big-endian).
Parameter value(s)¶
- txValue : The 16-bit value to be transmitted ([15:8] = first byte, [7:0] = second byte)
Return value(s)¶
- rxValue : The received 16-bit value ([15:8] = first byte, [7:0] = second byte)