Introduction

This module explains about PMIC Interrupt driver parameters and API usage. PMIC Interrupt Driver module covers all Interrupt feature APIs, which includes Get/clear Interrupt status, extract the Interrupt status as per Interrupt hierarchy, masking/unmasking of all Interrupts and a separate API for GPIO Interrupt masking/unmasking.

Supported PMIC devices for Interrupt Module:

TPS6594x (Leo PMIC Device).
LP8764x (Hera PMIC Device).

Files
file	pmic_irq.h
	PMIC IRQ Driver API/interface file.

file	pmic_irq_tps6594x.h
	TPS6594x LEO PMIC IRQ Driver API/interface file.

file	pmic_irq_lp8764x.h
	LP8764x Hera PMIC IRQ Driver API/interface file.

Data Structures
struct	Pmic_IrqStatus_t
	PMIC Interrupt status object structure. More...

Functions
int32_t	Pmic_irqGetErrStatus (Pmic_CoreHandle_t pPmicCoreHandle, Pmic_IrqStatus_t pErrStat, const bool clearIRQ)
	API to read Error status. More...

int32_t	Pmic_irqClrErrStatus (Pmic_CoreHandle_t *pPmicCoreHandle, const uint8_t irqNum)
	API to clear Error status. More...

int32_t	Pmic_irqMaskIntr (Pmic_CoreHandle_t *pPmicCoreHandle, const uint8_t irqNum, const bool mask)
	API to mask/unmask interrupts. More...

int32_t	Pmic_getNextErrorStatus (const Pmic_CoreHandle_t pPmicCoreHandle, Pmic_IrqStatus_t pErrStat, uint8_t *pIrqNum)
	API to extract each Error status. More...

int32_t	Pmic_irqGpioMaskIntr (Pmic_CoreHandle_t *pPmicCoreHandle, const uint8_t irqGpioNum, const bool mask, const uint8_t gpioIntrType)
	API to mask/unmask GPIO interrupts. More...

int32_t	Pmic_irqGetMaskIntrStatus (Pmic_CoreHandle_t pPmicCoreHandle, const uint8_t irqNum, bool pMaskStatus)
	API to read the status of PMIC interrupts is masked or not. More...

int32_t	Pmic_irqGetGpioMaskIntr (Pmic_CoreHandle_t pPmicCoreHandle, const uint8_t irqGpioNum, const uint8_t gpioIntrType, bool pRiseIntrMaskStat, bool *pFallIntrMaskStat)
	API to read the status of PMIC GPIO interrupts is masked or not. More...

PMIC GPIO Interrupt Mask values

#define	PMIC_IRQ_GPIO_ALL_INT_MASK_NUM (12U)

PMIC IRQ flag for all Interrupts

#define	PMIC_IRQ_ALL (0xFFU)

PMIC IRQ Clear flags

#define	PMIC_IRQ_CLEAR_NONE (0U)

#define	PMIC_IRQ_CLEAR (1U)

PMIC IRQ Mask flag

#define	PMIC_IRQ_UNMASK (bool)false

#define	PMIC_IRQ_MASK (bool)true

PMIC IRQ GPIO Interrupt type

#define	PMIC_IRQ_GPIO_FALL_INT_TYPE (0x0U)

#define	PMIC_IRQ_GPIO_RISE_INT_TYPE (0x1U)

#define	PMIC_IRQ_GPIO_RISE_FALL_INT_TYPE (0x2U)

PMIC IRQ Interrupt values for tps6594x LEO PMIC device

#define	PMIC_TPS6594X_WD_RST_INT (0U)

#define	PMIC_TPS6594X_WD_FAIL_INT (1U)

#define	PMIC_TPS6594X_WD_LONGWIN_TIMEOUT_INT (2U)

#define	PMIC_TPS6594X_ESM_MCU_RST_INT (3U)

#define	PMIC_TPS6594X_ESM_MCU_FAIL_INT (4U)

#define	PMIC_TPS6594X_ESM_MCU_PIN_INT (5U)

#define	PMIC_TPS6594X_ESM_SOC_RST_INT (6U)

#define	PMIC_TPS6594X_ESM_SOC_FAIL_INT (7U)

#define	PMIC_TPS6594X_ESM_SOC_PIN_INT (8U)

#define	PMIC_TPS6594X_NRSTOUT_SOC_READBACK_INT (9U)

#define	PMIC_TPS6594X_EN_DRV_READBACK_INT (10U)

#define	PMIC_TPS6594X_I2C2_ADR_ERR_INT (11U)

#define	PMIC_TPS6594X_I2C2_CRC_ERR_INT (12U)

#define	PMIC_TPS6594X_COMM_ADR_ERR_INT (13U)

#define	PMIC_TPS6594X_COMM_CRC_ERR_INT (14U)

#define	PMIC_TPS6594X_COMM_FRM_ERR_INT (15U)

#define	PMIC_TPS6594X_SOC_PWR_ERR_INT (16U)

#define	PMIC_TPS6594X_MCU_PWR_ERR_INT (17U)

#define	PMIC_TPS6594X_ORD_SHUTDOWN_INT (18U)

#define	PMIC_TPS6594X_IMM_SHUTOWN_INT (19U)

#define	PMIC_TPS6594X_PFSM_ERR_INT (20U)

#define	PMIC_TPS6594X_VCCA_OVP_INT (21U)

#define	PMIC_TPS6594X_TSD_IMM_INT (22U)

#define	PMIC_TPS6594X_NRSTOUT_READBACK_INT (23U)

#define	PMIC_TPS6594X_NINT_READBACK_INT (24U)

#define	PMIC_TPS6594X_NPWRON_LONG_INT (25U)

#define	PMIC_TPS6594X_SPMI_ERR_INT (26U)

#define	PMIC_TPS6594X_RECOV_CNT_INT (27U)

#define	PMIC_TPS6594X_REG_CRC_ERR_INT (28U)

#define	PMIC_TPS6594X_BIST_FAIL_INT (29U)

#define	PMIC_TPS6594X_TSD_ORD_INT (30U)

#define	PMIC_TPS6594X_TWARN_INT (31U)

#define	PMIC_TPS6594X_EXT_CLK_INT (32U)

#define	PMIC_TPS6594X_BIST_PASS_INT (33U)

#define	PMIC_TPS6594X_FSD_INT (34U)

#define	PMIC_TPS6594X_RTC_ALARM_INT (35U)

#define	PMIC_TPS6594X_RTC_TIMER_INT (36U)

#define	PMIC_TPS6594X_ENABLE_INT (37U)

#define	PMIC_TPS6594X_NPWRON_START_INT (38U)

#define	PMIC_TPS6594X_GPIO8_INT (39U)

#define	PMIC_TPS6594X_GPIO7_INT (40U)

#define	PMIC_TPS6594X_GPIO6_INT (41U)

#define	PMIC_TPS6594X_GPIO5_INT (42U)

#define	PMIC_TPS6594X_GPIO4_INT (43U)

#define	PMIC_TPS6594X_GPIO3_INT (44U)

#define	PMIC_TPS6594X_GPIO2_INT (45U)

#define	PMIC_TPS6594X_GPIO1_INT (46U)

#define	PMIC_TPS6594X_GPIO11_INT (47U)

#define	PMIC_TPS6594X_GPIO10_INT (48U)

#define	PMIC_TPS6594X_GPIO9_INT (49U)

#define	PMIC_TPS6594X_VCCA_UV_INT (50U)

#define	PMIC_TPS6594X_VCCA_OV_INT (51U)

#define	PMIC_TPS6594X_LDO4_ILIM_INT (52U)

#define	PMIC_TPS6594X_LDO4_SC_INT (53U)

#define	PMIC_TPS6594X_LDO4_UV_INT (54U)

#define	PMIC_TPS6594X_LDO4_OV_INT (55U)

#define	PMIC_TPS6594X_LDO3_ILIM_INT (56U)

#define	PMIC_TPS6594X_LDO3_SC_INT (57U)

#define	PMIC_TPS6594X_LDO3_UV_INT (58U)

#define	PMIC_TPS6594X_LDO3_OV_INT (59U)

#define	PMIC_TPS6594X_LDO2_ILIM_INT (60U)

#define	PMIC_TPS6594X_LDO2_SC_INT (61U)

#define	PMIC_TPS6594X_LDO2_UV_INT (62U)

#define	PMIC_TPS6594X_LDO2_OV_INT (63U)

#define	PMIC_TPS6594X_LDO1_ILIM_INT (64U)

#define	PMIC_TPS6594X_LDO1_SC_INT (65U)

#define	PMIC_TPS6594X_LDO1_UV_INT (66U)

#define	PMIC_TPS6594X_LDO1_OV_INT (67U)

#define	PMIC_TPS6594X_BUCK5_ILIM_INT (68U)

#define	PMIC_TPS6594X_BUCK5_SC_INT (69U)

#define	PMIC_TPS6594X_BUCK5_UV_INT (70U)

#define	PMIC_TPS6594X_BUCK5_OV_INT (71U)

#define	PMIC_TPS6594X_BUCK4_ILIM_INT (72U)

#define	PMIC_TPS6594X_BUCK4_SC_INT (73U)

#define	PMIC_TPS6594X_BUCK4_UV_INT (74U)

#define	PMIC_TPS6594X_BUCK4_OV_INT (75U)

#define	PMIC_TPS6594X_BUCK3_ILIM_INT (76U)

#define	PMIC_TPS6594X_BUCK3_SC_INT (77U)

#define	PMIC_TPS6594X_BUCK3_UV_INT (78U)

#define	PMIC_TPS6594X_BUCK3_OV_INT (79U)

#define	PMIC_TPS6594X_BUCK2_ILIM_INT (80U)

#define	PMIC_TPS6594X_BUCK2_SC_INT (81U)

#define	PMIC_TPS6594X_BUCK2_UV_INT (82U)

#define	PMIC_TPS6594X_BUCK2_OV_INT (83U)

#define	PMIC_TPS6594X_BUCK1_ILIM_INT (84U)

#define	PMIC_TPS6594X_BUCK1_SC_INT (85U)

#define	PMIC_TPS6594X_BUCK1_UV_INT (86U)

#define	PMIC_TPS6594X_BUCK1_OV_INT (87U)

#define	PMIC_TPS6594X_SOFT_REBOOT_INT (88U)

#define	PMIC_TPS6594X_IRQ_MAX_NUM_PG_1_0 (88U)

#define	PMIC_TPS6594X_IRQ_MAX_NUM_PG_2_0 (89U)

PMIC GPIO Interrupt Mask values for tps6594x

#define	PMIC_TPS6594X_IRQ_GPIO_1_INT_MASK_NUM (0U)

#define	PMIC_TPS6594X_IRQ_GPIO_2_INT_MASK_NUM (1U)

#define	PMIC_TPS6594X_IRQ_GPIO_3_INT_MASK_NUM (2U)

#define	PMIC_TPS6594X_IRQ_GPIO_4_INT_MASK_NUM (3U)

#define	PMIC_TPS6594X_IRQ_GPIO_5_INT_MASK_NUM (4U)

#define	PMIC_TPS6594X_IRQ_GPIO_6_INT_MASK_NUM (5U)

#define	PMIC_TPS6594X_IRQ_GPIO_7_INT_MASK_NUM (6U)

#define	PMIC_TPS6594X_IRQ_GPIO_8_INT_MASK_NUM (7U)

#define	PMIC_TPS6594X_IRQ_GPIO_9_INT_MASK_NUM (8U)

#define	PMIC_TPS6594X_IRQ_GPIO_10_INT_MASK_NUM (9U)

#define	PMIC_TPS6594X_IRQ_GPIO_11_INT_MASK_NUM (10U)

PMIC IRQ Interrupt values for LP8764x HERA PMIC Device.

#define	PMIC_LP8764X_WD_RST_INT (0U)

#define	PMIC_LP8764X_WD_FAIL_INT (1U)

#define	PMIC_LP8764X_WD_LONGWIN_TIMEOUT_INT (2U)

#define	PMIC_LP8764X_ESM_MCU_RST_INT (3U)

#define	PMIC_LP8764X_ESM_MCU_FAIL_INT (4U)

#define	PMIC_LP8764X_ESM_MCU_PIN_INT (5U)

#define	PMIC_LP8764X_NRSTOUT_SOC_READBACK_INT (6U)

#define	PMIC_LP8764X_EN_DRV_READBACK_INT (7U)

#define	PMIC_LP8764X_I2C2_ADR_ERR_INT (8U)

#define	PMIC_LP8764X_I2C2_CRC_ERR_INT (9U)

#define	PMIC_LP8764X_COMM_ADR_ERR_INT (10U)

#define	PMIC_LP8764X_COMM_CRC_ERR_INT (11U)

#define	PMIC_LP8764X_COMM_FRM_ERR_INT (12U)

#define	PMIC_LP8764X_SOC_PWR_ERR_INT (13U)

#define	PMIC_LP8764X_MCU_PWR_ERR_INT (14U)

#define	PMIC_LP8764X_ORD_SHUTDOWN_INT (15U)

#define	PMIC_LP8764X_IMM_SHUTOWN_INT (16U)

#define	PMIC_LP8764X_PFSM_ERR_INT (17U)

#define	PMIC_LP8764X_VCCA_OVP_INT (18U)

#define	PMIC_LP8764X_TSD_IMM_INT (19U)

#define	PMIC_LP8764X_NRSTOUT_READBACK_INT (20U)

#define	PMIC_LP8764X_NINT_READBACK_INT (21U)

#define	PMIC_LP8764X_SPMI_ERR_INT (22U)

#define	PMIC_LP8764X_RECOV_CNT_INT (23U)

#define	PMIC_LP8764X_REG_CRC_ERR_INT (24U)

#define	PMIC_LP8764X_BIST_FAIL_INT (25U)

#define	PMIC_LP8764X_TSD_ORD_INT (26U)

#define	PMIC_LP8764X_TWARN_INT (27U)

#define	PMIC_LP8764X_EXT_CLK_INT (28U)

#define	PMIC_LP8764X_BIST_PASS_INT (29U)

#define	PMIC_LP8764X_FSD_INT (30U)

#define	PMIC_LP8764X_ENABLE_INT (31U)

#define	PMIC_LP8764X_GPIO8_INT (32U)

#define	PMIC_LP8764X_GPIO7_INT (33U)

#define	PMIC_LP8764X_GPIO6_INT (34U)

#define	PMIC_LP8764X_GPIO5_INT (35U)

#define	PMIC_LP8764X_GPIO4_INT (36U)

#define	PMIC_LP8764X_GPIO3_INT (37U)

#define	PMIC_LP8764X_GPIO2_INT (38U)

#define	PMIC_LP8764X_GPIO1_INT (39U)

#define	PMIC_LP8764X_GPIO10_INT (40U)

#define	PMIC_LP8764X_GPIO9_INT (41U)

#define	PMIC_LP8764X_VMON2_RV_INT (42U)

#define	PMIC_LP8764X_VMON2_UV_INT (43U)

#define	PMIC_LP8764X_VMON2_OV_INT (44U)

#define	PMIC_LP8764X_VMON1_RV_INT (45U)

#define	PMIC_LP8764X_VMON1_UV_INT (46U)

#define	PMIC_LP8764X_VMON1_OV_INT (47U)

#define	PMIC_LP8764X_VCCA_UV_INT (48U)

#define	PMIC_LP8764X_VCCA_OV_INT (49U)

#define	PMIC_LP8764X_BUCK4_ILIM_INT (50U)

#define	PMIC_LP8764X_BUCK4_SC_INT (51U)

#define	PMIC_LP8764X_BUCK4_UV_INT (52U)

#define	PMIC_LP8764X_BUCK4_OV_INT (53U)

#define	PMIC_LP8764X_BUCK3_ILIM_INT (54U)

#define	PMIC_LP8764X_BUCK3_SC_INT (55U)

#define	PMIC_LP8764X_BUCK3_UV_INT (56U)

#define	PMIC_LP8764X_BUCK3_OV_INT (57U)

#define	PMIC_LP8764X_BUCK2_ILIM_INT (58U)

#define	PMIC_LP8764X_BUCK2_SC_INT (59U)

#define	PMIC_LP8764X_BUCK2_UV_INT (60U)

#define	PMIC_LP8764X_BUCK2_OV_INT (61U)

#define	PMIC_LP8764X_BUCK1_ILIM_INT (62U)

#define	PMIC_LP8764X_BUCK1_SC_INT (63U)

#define	PMIC_LP8764X_BUCK1_UV_INT (64U)

#define	PMIC_LP8764X_BUCK1_OV_INT (65U)

#define	PMIC_LP8764X_SOFT_REBOOT_INT (66U)

#define	PMIC_LP8764X_IRQ_MAX_NUM_PG_1_0 (66U)

#define	PMIC_LP8764X_IRQ_MAX_NUM_PG_2_0 (67U)

PMIC GPIO Interrupt Mask values for tps6594x.

#define	PMIC_LP8764X_IRQ_GPIO_1_INT_MASK_NUM (0U)

#define	PMIC_LP8764X_IRQ_GPIO_2_INT_MASK_NUM (1U)

#define	PMIC_LP8764X_IRQ_GPIO_3_INT_MASK_NUM (2U)

#define	PMIC_LP8764X_IRQ_GPIO_4_INT_MASK_NUM (3U)

#define	PMIC_LP8764X_IRQ_GPIO_5_INT_MASK_NUM (4U)

#define	PMIC_LP8764X_IRQ_GPIO_6_INT_MASK_NUM (5U)

#define	PMIC_LP8764X_IRQ_GPIO_7_INT_MASK_NUM (6U)

#define	PMIC_LP8764X_IRQ_GPIO_8_INT_MASK_NUM (7U)

#define	PMIC_LP8764X_IRQ_GPIO_9_INT_MASK_NUM (8U)

#define	PMIC_LP8764X_IRQ_GPIO_10_INT_MASK_NUM (9U)

Macro Definition Documentation

◆ PMIC_IRQ_GPIO_ALL_INT_MASK_NUM

#define PMIC_IRQ_GPIO_ALL_INT_MASK_NUM (12U)

◆ PMIC_IRQ_ALL

#define PMIC_IRQ_ALL (0xFFU)

◆ PMIC_IRQ_CLEAR_NONE

#define PMIC_IRQ_CLEAR_NONE (0U)

◆ PMIC_IRQ_CLEAR

#define PMIC_IRQ_CLEAR (1U)

◆ PMIC_IRQ_UNMASK

#define PMIC_IRQ_UNMASK (bool)false

◆ PMIC_IRQ_MASK

#define PMIC_IRQ_MASK (bool)true

◆ PMIC_IRQ_GPIO_FALL_INT_TYPE

#define PMIC_IRQ_GPIO_FALL_INT_TYPE (0x0U)

◆ PMIC_IRQ_GPIO_RISE_INT_TYPE

#define PMIC_IRQ_GPIO_RISE_INT_TYPE (0x1U)

◆ PMIC_IRQ_GPIO_RISE_FALL_INT_TYPE

#define PMIC_IRQ_GPIO_RISE_FALL_INT_TYPE (0x2U)

◆ PMIC_TPS6594X_WD_RST_INT

#define PMIC_TPS6594X_WD_RST_INT (0U)

PMIC WDG RESET Interrupt

◆ PMIC_TPS6594X_WD_FAIL_INT

#define PMIC_TPS6594X_WD_FAIL_INT (1U)

PMIC WDG FAIL Interrupt

◆ PMIC_TPS6594X_WD_LONGWIN_TIMEOUT_INT

#define PMIC_TPS6594X_WD_LONGWIN_TIMEOUT_INT (2U)

PMIC WDG LONG WINDOW TIMEOUT Interrupt

◆ PMIC_TPS6594X_ESM_MCU_RST_INT

#define PMIC_TPS6594X_ESM_MCU_RST_INT (3U)

PMIC ESM MCU RESET Interrupt

◆ PMIC_TPS6594X_ESM_MCU_FAIL_INT

#define PMIC_TPS6594X_ESM_MCU_FAIL_INT (4U)

PMIC ESM MCU FAIL Interrupt

◆ PMIC_TPS6594X_ESM_MCU_PIN_INT

#define PMIC_TPS6594X_ESM_MCU_PIN_INT (5U)

PMIC ESM MCU PIN Interrupt

◆ PMIC_TPS6594X_ESM_SOC_RST_INT

#define PMIC_TPS6594X_ESM_SOC_RST_INT (6U)

PMIC ESM SOC RESET Interrupt

◆ PMIC_TPS6594X_ESM_SOC_FAIL_INT

#define PMIC_TPS6594X_ESM_SOC_FAIL_INT (7U)

PMIC ESM SOC FAIL Interrupt

◆ PMIC_TPS6594X_ESM_SOC_PIN_INT

#define PMIC_TPS6594X_ESM_SOC_PIN_INT (8U)

PMIC ESM SOC PIN Interrupt

◆ PMIC_TPS6594X_NRSTOUT_SOC_READBACK_INT

#define PMIC_TPS6594X_NRSTOUT_SOC_READBACK_INT (9U)

PMIC NRSTOUT SOC READBACK Interrupt

◆ PMIC_TPS6594X_EN_DRV_READBACK_INT

#define PMIC_TPS6594X_EN_DRV_READBACK_INT (10U)

PMIC EN DRV READBACK Interrupt

◆ PMIC_TPS6594X_I2C2_ADR_ERR_INT

#define PMIC_TPS6594X_I2C2_ADR_ERR_INT (11U)

PMIC I2C2 ADDRESS ERROR Interrupt

◆ PMIC_TPS6594X_I2C2_CRC_ERR_INT

#define PMIC_TPS6594X_I2C2_CRC_ERR_INT (12U)

PMIC I2C2 CRC ERROR Interrupt

◆ PMIC_TPS6594X_COMM_ADR_ERR_INT

#define PMIC_TPS6594X_COMM_ADR_ERR_INT (13U)

PMIC I2C1/SPI COMM ADDRESS ERROR Interrupt

◆ PMIC_TPS6594X_COMM_CRC_ERR_INT

#define PMIC_TPS6594X_COMM_CRC_ERR_INT (14U)

PMIC I2C1/SPI COMM CRC ERROR Interrupt

◆ PMIC_TPS6594X_COMM_FRM_ERR_INT

#define PMIC_TPS6594X_COMM_FRM_ERR_INT (15U)

PMIC SPI COMM FRAME ERROR Interrupt

◆ PMIC_TPS6594X_SOC_PWR_ERR_INT

#define PMIC_TPS6594X_SOC_PWR_ERR_INT (16U)

PMIC SOC POWER ERR Interrupt

◆ PMIC_TPS6594X_MCU_PWR_ERR_INT

#define PMIC_TPS6594X_MCU_PWR_ERR_INT (17U)

PMIC MCU POWER ERR Interrupt

◆ PMIC_TPS6594X_ORD_SHUTDOWN_INT

#define PMIC_TPS6594X_ORD_SHUTDOWN_INT (18U)

PMIC ORDERLY SHUTDOWN Interrupt

◆ PMIC_TPS6594X_IMM_SHUTOWN_INT

#define PMIC_TPS6594X_IMM_SHUTOWN_INT (19U)

PMIC IMMEDIATE SHUTDOWN Interrupt

◆ PMIC_TPS6594X_PFSM_ERR_INT

#define PMIC_TPS6594X_PFSM_ERR_INT (20U)

PMIC PFSM ERROR Interrupt

◆ PMIC_TPS6594X_VCCA_OVP_INT

#define PMIC_TPS6594X_VCCA_OVP_INT (21U)

PMIC VCCA Over-Voltage Interrupt

◆ PMIC_TPS6594X_TSD_IMM_INT

#define PMIC_TPS6594X_TSD_IMM_INT (22U)

PMIC Thermal Threshold Immediate Shutdown Interrupt

◆ PMIC_TPS6594X_NRSTOUT_READBACK_INT

#define PMIC_TPS6594X_NRSTOUT_READBACK_INT (23U)

PMIC NRSTOUT Readback Error Interrupt

◆ PMIC_TPS6594X_NINT_READBACK_INT

#define PMIC_TPS6594X_NINT_READBACK_INT (24U)

PMIC NINT Readback Error Interrupt

◆ PMIC_TPS6594X_NPWRON_LONG_INT

#define PMIC_TPS6594X_NPWRON_LONG_INT (25U)

PMIC NPWRON Long Press Error Interrupt

◆ PMIC_TPS6594X_SPMI_ERR_INT

#define PMIC_TPS6594X_SPMI_ERR_INT (26U)

PMIC SPMI Interface Error Interrupt

◆ PMIC_TPS6594X_RECOV_CNT_INT

#define PMIC_TPS6594X_RECOV_CNT_INT (27U)

PMIC RECOV_CNT Threshold Interrupt

◆ PMIC_TPS6594X_REG_CRC_ERR_INT

#define PMIC_TPS6594X_REG_CRC_ERR_INT (28U)

PMIC Register CRC Error Interrupt

◆ PMIC_TPS6594X_BIST_FAIL_INT

#define PMIC_TPS6594X_BIST_FAIL_INT (29U)

PMIC LBIST/ABIST Error Interrupt

◆ PMIC_TPS6594X_TSD_ORD_INT

#define PMIC_TPS6594X_TSD_ORD_INT (30U)

PMIC Thermal Shutdown Orderly Interrupt

◆ PMIC_TPS6594X_TWARN_INT

#define PMIC_TPS6594X_TWARN_INT (31U)

PMIC Thermal Warning Interrupt

◆ PMIC_TPS6594X_EXT_CLK_INT

#define PMIC_TPS6594X_EXT_CLK_INT (32U)

PMIC External Clock Interrupt

◆ PMIC_TPS6594X_BIST_PASS_INT

#define PMIC_TPS6594X_BIST_PASS_INT (33U)

PMIC BIST PASS Interrupt

◆ PMIC_TPS6594X_FSD_INT

#define PMIC_TPS6594X_FSD_INT (34U)

PMIC First Supply Detection Interrupt

◆ PMIC_TPS6594X_RTC_ALARM_INT

#define PMIC_TPS6594X_RTC_ALARM_INT (35U)

PMIC RTC ALARM Interrupt

◆ PMIC_TPS6594X_RTC_TIMER_INT

#define PMIC_TPS6594X_RTC_TIMER_INT (36U)

PMIC RTC TIMER Interrupt

◆ PMIC_TPS6594X_ENABLE_INT

#define PMIC_TPS6594X_ENABLE_INT (37U)

PMIC ENABLE Interrupt

◆ PMIC_TPS6594X_NPWRON_START_INT

#define PMIC_TPS6594X_NPWRON_START_INT (38U)

PMIC NPWRON Startup Interrupt

◆ PMIC_TPS6594X_GPIO8_INT

#define PMIC_TPS6594X_GPIO8_INT (39U)

PMIC GPIO PIN 8 Interrupt

◆ PMIC_TPS6594X_GPIO7_INT

#define PMIC_TPS6594X_GPIO7_INT (40U)

PMIC GPIO PIN 7 Interrupt

◆ PMIC_TPS6594X_GPIO6_INT

#define PMIC_TPS6594X_GPIO6_INT (41U)

PMIC GPIO PIN 6 Interrupt

◆ PMIC_TPS6594X_GPIO5_INT

#define PMIC_TPS6594X_GPIO5_INT (42U)

PMIC GPIO PIN 5 Interrupt

◆ PMIC_TPS6594X_GPIO4_INT

#define PMIC_TPS6594X_GPIO4_INT (43U)

PMIC GPIO PIN 4 Interrupt

◆ PMIC_TPS6594X_GPIO3_INT

#define PMIC_TPS6594X_GPIO3_INT (44U)

PMIC GPIO PIN 3 Interrupt

◆ PMIC_TPS6594X_GPIO2_INT

#define PMIC_TPS6594X_GPIO2_INT (45U)

PMIC GPIO PIN 2 Interrupt

◆ PMIC_TPS6594X_GPIO1_INT

#define PMIC_TPS6594X_GPIO1_INT (46U)

PMIC GPIO PIN 1 Interrupt

◆ PMIC_TPS6594X_GPIO11_INT

#define PMIC_TPS6594X_GPIO11_INT (47U)

PMIC GPIO PIN 11 Interrupt

◆ PMIC_TPS6594X_GPIO10_INT

#define PMIC_TPS6594X_GPIO10_INT (48U)

PMIC GPIO PIN 10 Interrupt

◆ PMIC_TPS6594X_GPIO9_INT

#define PMIC_TPS6594X_GPIO9_INT (49U)

PMIC GPIO PIN 9 Interrupt

◆ PMIC_TPS6594X_VCCA_UV_INT

#define PMIC_TPS6594X_VCCA_UV_INT (50U)

PMIC VCCA Under-Voltage Interrupt

◆ PMIC_TPS6594X_VCCA_OV_INT

#define PMIC_TPS6594X_VCCA_OV_INT (51U)

PMIC VCCA Over-Voltage Interrupt

◆ PMIC_TPS6594X_LDO4_ILIM_INT

#define PMIC_TPS6594X_LDO4_ILIM_INT (52U)

PMIC LDO4 Current Limit Interrupt

◆ PMIC_TPS6594X_LDO4_SC_INT

#define PMIC_TPS6594X_LDO4_SC_INT (53U)

PMIC LDO4 SC Interrupt

◆ PMIC_TPS6594X_LDO4_UV_INT

#define PMIC_TPS6594X_LDO4_UV_INT (54U)

PMIC LDO4 Under-Voltage Interrupt

◆ PMIC_TPS6594X_LDO4_OV_INT

#define PMIC_TPS6594X_LDO4_OV_INT (55U)

PMIC LDO4 Over-Voltage Interrupt

◆ PMIC_TPS6594X_LDO3_ILIM_INT

#define PMIC_TPS6594X_LDO3_ILIM_INT (56U)

PMIC LDO3 Current Limit Interrupt

◆ PMIC_TPS6594X_LDO3_SC_INT

#define PMIC_TPS6594X_LDO3_SC_INT (57U)

PMIC LDO3 SC Interrupt

◆ PMIC_TPS6594X_LDO3_UV_INT

#define PMIC_TPS6594X_LDO3_UV_INT (58U)

PMIC LDO3 Under-Voltage Interrupt

◆ PMIC_TPS6594X_LDO3_OV_INT

#define PMIC_TPS6594X_LDO3_OV_INT (59U)

PMIC LDO3 Over-Voltage Interrupt

◆ PMIC_TPS6594X_LDO2_ILIM_INT

#define PMIC_TPS6594X_LDO2_ILIM_INT (60U)

PMIC LDO2 Current Limit Interrupt

◆ PMIC_TPS6594X_LDO2_SC_INT

#define PMIC_TPS6594X_LDO2_SC_INT (61U)

PMIC LDO2 SC Interrupt

◆ PMIC_TPS6594X_LDO2_UV_INT

#define PMIC_TPS6594X_LDO2_UV_INT (62U)

PMIC LDO2 Under-Voltage Interrupt

◆ PMIC_TPS6594X_LDO2_OV_INT

#define PMIC_TPS6594X_LDO2_OV_INT (63U)

PMIC LDO2 Over-Voltage Interrupt

◆ PMIC_TPS6594X_LDO1_ILIM_INT

#define PMIC_TPS6594X_LDO1_ILIM_INT (64U)

PMIC LDO1 Current Limit Interrupt

◆ PMIC_TPS6594X_LDO1_SC_INT

#define PMIC_TPS6594X_LDO1_SC_INT (65U)

PMIC LDO1 SC Interrupt

◆ PMIC_TPS6594X_LDO1_UV_INT

#define PMIC_TPS6594X_LDO1_UV_INT (66U)

PMIC LDO1 Under-Voltage Interrupt

◆ PMIC_TPS6594X_LDO1_OV_INT

#define PMIC_TPS6594X_LDO1_OV_INT (67U)

PMIC LDO1 Over-Voltage Interrupt

◆ PMIC_TPS6594X_BUCK5_ILIM_INT

#define PMIC_TPS6594X_BUCK5_ILIM_INT (68U)

PMIC BUCK5 Current Limit Interrupt

◆ PMIC_TPS6594X_BUCK5_SC_INT

#define PMIC_TPS6594X_BUCK5_SC_INT (69U)

PMIC BUCK5 SC Interrupt

◆ PMIC_TPS6594X_BUCK5_UV_INT

#define PMIC_TPS6594X_BUCK5_UV_INT (70U)

PMIC BUCK5 Under-Voltage Interrupt

◆ PMIC_TPS6594X_BUCK5_OV_INT

#define PMIC_TPS6594X_BUCK5_OV_INT (71U)

PMIC BUCK5 Over-Voltage Interrupt

◆ PMIC_TPS6594X_BUCK4_ILIM_INT

#define PMIC_TPS6594X_BUCK4_ILIM_INT (72U)

PMIC BUCK4 Current Limit Interrupt

◆ PMIC_TPS6594X_BUCK4_SC_INT

#define PMIC_TPS6594X_BUCK4_SC_INT (73U)

PMIC BUCK4 SC Interrupt

◆ PMIC_TPS6594X_BUCK4_UV_INT

#define PMIC_TPS6594X_BUCK4_UV_INT (74U)

PMIC BUCK4 Under-Voltage Interrupt

◆ PMIC_TPS6594X_BUCK4_OV_INT

#define PMIC_TPS6594X_BUCK4_OV_INT (75U)

PMIC BUCK4 Over-Voltage Interrupt

◆ PMIC_TPS6594X_BUCK3_ILIM_INT

#define PMIC_TPS6594X_BUCK3_ILIM_INT (76U)

PMIC BUCK3 Current Limit Interrupt

◆ PMIC_TPS6594X_BUCK3_SC_INT

#define PMIC_TPS6594X_BUCK3_SC_INT (77U)

PMIC BUCK3 SC Interrupt

◆ PMIC_TPS6594X_BUCK3_UV_INT

#define PMIC_TPS6594X_BUCK3_UV_INT (78U)

PMIC BUCK3 Under-Voltage Interrupt

◆ PMIC_TPS6594X_BUCK3_OV_INT

#define PMIC_TPS6594X_BUCK3_OV_INT (79U)

PMIC BUCK3 Over-Voltage Interrupt

◆ PMIC_TPS6594X_BUCK2_ILIM_INT

#define PMIC_TPS6594X_BUCK2_ILIM_INT (80U)

PMIC BUCK2 Current Limit Interrupt

◆ PMIC_TPS6594X_BUCK2_SC_INT

#define PMIC_TPS6594X_BUCK2_SC_INT (81U)

PMIC BUCK2 SC Interrupt

◆ PMIC_TPS6594X_BUCK2_UV_INT

#define PMIC_TPS6594X_BUCK2_UV_INT (82U)

PMIC BUCK2 Under-Voltage Interrupt

◆ PMIC_TPS6594X_BUCK2_OV_INT

#define PMIC_TPS6594X_BUCK2_OV_INT (83U)

PMIC BUCK2 Over-Voltage Interrupt

◆ PMIC_TPS6594X_BUCK1_ILIM_INT

#define PMIC_TPS6594X_BUCK1_ILIM_INT (84U)

PMIC BUCK1 Current Limit Interrupt

◆ PMIC_TPS6594X_BUCK1_SC_INT

#define PMIC_TPS6594X_BUCK1_SC_INT (85U)

PMIC BUCK1 SC Interrupt

◆ PMIC_TPS6594X_BUCK1_UV_INT

#define PMIC_TPS6594X_BUCK1_UV_INT (86U)

PMIC BUCK1 Under-Voltage Interrupt

◆ PMIC_TPS6594X_BUCK1_OV_INT

#define PMIC_TPS6594X_BUCK1_OV_INT (87U)

PMIC BUCK1 Over-Voltage Interrupt

◆ PMIC_TPS6594X_SOFT_REBOOT_INT

#define PMIC_TPS6594X_SOFT_REBOOT_INT (88U)

PMIC SOFT REBOOT Startup Interrupt

◆ PMIC_TPS6594X_IRQ_MAX_NUM_PG_1_0

#define PMIC_TPS6594X_IRQ_MAX_NUM_PG_1_0 (88U)

PMIC Max Interrupt Number on PG1.0

◆ PMIC_TPS6594X_IRQ_MAX_NUM_PG_2_0

#define PMIC_TPS6594X_IRQ_MAX_NUM_PG_2_0 (89U)

PMIC Max Interrupt Number on PG2.0

◆ PMIC_TPS6594X_IRQ_GPIO_1_INT_MASK_NUM

#define PMIC_TPS6594X_IRQ_GPIO_1_INT_MASK_NUM (0U)

◆ PMIC_TPS6594X_IRQ_GPIO_2_INT_MASK_NUM

#define PMIC_TPS6594X_IRQ_GPIO_2_INT_MASK_NUM (1U)

◆ PMIC_TPS6594X_IRQ_GPIO_3_INT_MASK_NUM

#define PMIC_TPS6594X_IRQ_GPIO_3_INT_MASK_NUM (2U)

◆ PMIC_TPS6594X_IRQ_GPIO_4_INT_MASK_NUM

#define PMIC_TPS6594X_IRQ_GPIO_4_INT_MASK_NUM (3U)

◆ PMIC_TPS6594X_IRQ_GPIO_5_INT_MASK_NUM

#define PMIC_TPS6594X_IRQ_GPIO_5_INT_MASK_NUM (4U)

◆ PMIC_TPS6594X_IRQ_GPIO_6_INT_MASK_NUM

#define PMIC_TPS6594X_IRQ_GPIO_6_INT_MASK_NUM (5U)

◆ PMIC_TPS6594X_IRQ_GPIO_7_INT_MASK_NUM

#define PMIC_TPS6594X_IRQ_GPIO_7_INT_MASK_NUM (6U)

◆ PMIC_TPS6594X_IRQ_GPIO_8_INT_MASK_NUM

#define PMIC_TPS6594X_IRQ_GPIO_8_INT_MASK_NUM (7U)

◆ PMIC_TPS6594X_IRQ_GPIO_9_INT_MASK_NUM

#define PMIC_TPS6594X_IRQ_GPIO_9_INT_MASK_NUM (8U)

◆ PMIC_TPS6594X_IRQ_GPIO_10_INT_MASK_NUM

#define PMIC_TPS6594X_IRQ_GPIO_10_INT_MASK_NUM (9U)

◆ PMIC_TPS6594X_IRQ_GPIO_11_INT_MASK_NUM

#define PMIC_TPS6594X_IRQ_GPIO_11_INT_MASK_NUM (10U)

◆ PMIC_LP8764X_WD_RST_INT

#define PMIC_LP8764X_WD_RST_INT (0U)

PMIC WDG RESET Interrupt

◆ PMIC_LP8764X_WD_FAIL_INT

#define PMIC_LP8764X_WD_FAIL_INT (1U)

PMIC WDG FAIL Interrupt

◆ PMIC_LP8764X_WD_LONGWIN_TIMEOUT_INT

#define PMIC_LP8764X_WD_LONGWIN_TIMEOUT_INT (2U)

PMIC WDG LONG WINDOW TIMEOUT Interrupt

◆ PMIC_LP8764X_ESM_MCU_RST_INT

#define PMIC_LP8764X_ESM_MCU_RST_INT (3U)

PMIC ESM MCU RESET Interrupt

◆ PMIC_LP8764X_ESM_MCU_FAIL_INT

#define PMIC_LP8764X_ESM_MCU_FAIL_INT (4U)

PMIC ESM MCU FAIL Interrupt

◆ PMIC_LP8764X_ESM_MCU_PIN_INT

#define PMIC_LP8764X_ESM_MCU_PIN_INT (5U)

PMIC ESM MCU PIN Interrupt

◆ PMIC_LP8764X_NRSTOUT_SOC_READBACK_INT

#define PMIC_LP8764X_NRSTOUT_SOC_READBACK_INT (6U)

PMIC NRSTOUT SOC READBACK Interrupt

◆ PMIC_LP8764X_EN_DRV_READBACK_INT

#define PMIC_LP8764X_EN_DRV_READBACK_INT (7U)

PMIC EN DRV READBACK Interrupt

◆ PMIC_LP8764X_I2C2_ADR_ERR_INT

#define PMIC_LP8764X_I2C2_ADR_ERR_INT (8U)

PMIC I2C2 ADDRESS ERROR Interrupt

◆ PMIC_LP8764X_I2C2_CRC_ERR_INT

#define PMIC_LP8764X_I2C2_CRC_ERR_INT (9U)

PMIC I2C2 CRC ERROR Interrupt

◆ PMIC_LP8764X_COMM_ADR_ERR_INT

#define PMIC_LP8764X_COMM_ADR_ERR_INT (10U)

PMIC I2C1/SPI COMM ADDRESS ERROR Interrupt

◆ PMIC_LP8764X_COMM_CRC_ERR_INT

#define PMIC_LP8764X_COMM_CRC_ERR_INT (11U)

PMIC I2C1/SPI COMM CRC ERROR Interrupt

◆ PMIC_LP8764X_COMM_FRM_ERR_INT

#define PMIC_LP8764X_COMM_FRM_ERR_INT (12U)

PMIC SPI COMM FRAME ERROR Interrupt

◆ PMIC_LP8764X_SOC_PWR_ERR_INT

#define PMIC_LP8764X_SOC_PWR_ERR_INT (13U)

PMIC SOC POWER ERR Interrupt

◆ PMIC_LP8764X_MCU_PWR_ERR_INT

#define PMIC_LP8764X_MCU_PWR_ERR_INT (14U)

PMIC MCU POWER ERR Interrupt

◆ PMIC_LP8764X_ORD_SHUTDOWN_INT

#define PMIC_LP8764X_ORD_SHUTDOWN_INT (15U)

PMIC ORDERLY SHUTDOWN Interrupt

◆ PMIC_LP8764X_IMM_SHUTOWN_INT

#define PMIC_LP8764X_IMM_SHUTOWN_INT (16U)

PMIC IMMEDIATE SHUTDOWN Interrupt

◆ PMIC_LP8764X_PFSM_ERR_INT

#define PMIC_LP8764X_PFSM_ERR_INT (17U)

PMIC PFSM ERROR Interrupt

◆ PMIC_LP8764X_VCCA_OVP_INT

#define PMIC_LP8764X_VCCA_OVP_INT (18U)

PMIC VCCA Over-Voltage Interrupt

◆ PMIC_LP8764X_TSD_IMM_INT

#define PMIC_LP8764X_TSD_IMM_INT (19U)

PMIC Thermal Threshold Immediate Shutdown Interrupt

◆ PMIC_LP8764X_NRSTOUT_READBACK_INT

#define PMIC_LP8764X_NRSTOUT_READBACK_INT (20U)

PMIC NRSTOUT Readback Error Interrupt

◆ PMIC_LP8764X_NINT_READBACK_INT

#define PMIC_LP8764X_NINT_READBACK_INT (21U)

PMIC NINT Readback Error Interrupt

◆ PMIC_LP8764X_SPMI_ERR_INT

#define PMIC_LP8764X_SPMI_ERR_INT (22U)

PMIC SPMI Interface Error Interrupt

◆ PMIC_LP8764X_RECOV_CNT_INT

#define PMIC_LP8764X_RECOV_CNT_INT (23U)

PMIC RECOV_CNT Threshold Interrupt

◆ PMIC_LP8764X_REG_CRC_ERR_INT

#define PMIC_LP8764X_REG_CRC_ERR_INT (24U)

PMIC Register CRC Error Interrupt

◆ PMIC_LP8764X_BIST_FAIL_INT

#define PMIC_LP8764X_BIST_FAIL_INT (25U)

PMIC LBIST/ABIST Error Interrupt

◆ PMIC_LP8764X_TSD_ORD_INT

#define PMIC_LP8764X_TSD_ORD_INT (26U)

PMIC Thermal Shutdown Orderly Interrupt

◆ PMIC_LP8764X_TWARN_INT

#define PMIC_LP8764X_TWARN_INT (27U)

PMIC Thermal Warning Interrupt

◆ PMIC_LP8764X_EXT_CLK_INT

#define PMIC_LP8764X_EXT_CLK_INT (28U)

PMIC External Clock Interrupt

◆ PMIC_LP8764X_BIST_PASS_INT

#define PMIC_LP8764X_BIST_PASS_INT (29U)

PMIC BIST PASS Interrupt

◆ PMIC_LP8764X_FSD_INT

#define PMIC_LP8764X_FSD_INT (30U)

PMIC First Supply Detection Interrupt

◆ PMIC_LP8764X_ENABLE_INT

#define PMIC_LP8764X_ENABLE_INT (31U)

PMIC ENABLE Interrupt

◆ PMIC_LP8764X_GPIO8_INT

#define PMIC_LP8764X_GPIO8_INT (32U)

PMIC GPIO PIN 8 Interrupt

◆ PMIC_LP8764X_GPIO7_INT

#define PMIC_LP8764X_GPIO7_INT (33U)

PMIC GPIO PIN 7 Interrupt

◆ PMIC_LP8764X_GPIO6_INT

#define PMIC_LP8764X_GPIO6_INT (34U)

PMIC GPIO PIN 6 Interrupt

◆ PMIC_LP8764X_GPIO5_INT

#define PMIC_LP8764X_GPIO5_INT (35U)

PMIC GPIO PIN 5 Interrupt

◆ PMIC_LP8764X_GPIO4_INT

#define PMIC_LP8764X_GPIO4_INT (36U)

PMIC GPIO PIN 4 Interrupt

◆ PMIC_LP8764X_GPIO3_INT

#define PMIC_LP8764X_GPIO3_INT (37U)

PMIC GPIO PIN 3 Interrupt

◆ PMIC_LP8764X_GPIO2_INT

#define PMIC_LP8764X_GPIO2_INT (38U)

PMIC GPIO PIN 2 Interrupt

◆ PMIC_LP8764X_GPIO1_INT

#define PMIC_LP8764X_GPIO1_INT (39U)

PMIC GPIO PIN 1 Interrupt

◆ PMIC_LP8764X_GPIO10_INT

#define PMIC_LP8764X_GPIO10_INT (40U)

PMIC GPIO PIN 10 Interrupt

◆ PMIC_LP8764X_GPIO9_INT

#define PMIC_LP8764X_GPIO9_INT (41U)

PMIC GPIO PIN 9 Interrupt

◆ PMIC_LP8764X_VMON2_RV_INT

#define PMIC_LP8764X_VMON2_RV_INT (42U)

PMIC VMON2 Residual Voltage Threshold Interrupt

◆ PMIC_LP8764X_VMON2_UV_INT

#define PMIC_LP8764X_VMON2_UV_INT (43U)

PMIC VMON2 Under-Voltage Interrupt

◆ PMIC_LP8764X_VMON2_OV_INT

#define PMIC_LP8764X_VMON2_OV_INT (44U)

PMIC VMON2 Over-Voltage Interrupt

◆ PMIC_LP8764X_VMON1_RV_INT

#define PMIC_LP8764X_VMON1_RV_INT (45U)

PMIC VMON1 Residual Voltage Threshold Interrupt

◆ PMIC_LP8764X_VMON1_UV_INT

#define PMIC_LP8764X_VMON1_UV_INT (46U)

PMIC VMON1 Under-Voltage Interrupt

◆ PMIC_LP8764X_VMON1_OV_INT

#define PMIC_LP8764X_VMON1_OV_INT (47U)

PMIC VMON1 Over-Voltage Interrupt

◆ PMIC_LP8764X_VCCA_UV_INT

#define PMIC_LP8764X_VCCA_UV_INT (48U)

PMIC VCCA Under-Voltage Interrupt

◆ PMIC_LP8764X_VCCA_OV_INT

#define PMIC_LP8764X_VCCA_OV_INT (49U)

PMIC VCCA Over-Voltage Interrupt

◆ PMIC_LP8764X_BUCK4_ILIM_INT

#define PMIC_LP8764X_BUCK4_ILIM_INT (50U)

PMIC BUCK4 Current Limit Interrupt

◆ PMIC_LP8764X_BUCK4_SC_INT

#define PMIC_LP8764X_BUCK4_SC_INT (51U)

PMIC BUCK4 SC Interrupt

◆ PMIC_LP8764X_BUCK4_UV_INT

#define PMIC_LP8764X_BUCK4_UV_INT (52U)

PMIC BUCK4 Under-Voltage Interrupt

◆ PMIC_LP8764X_BUCK4_OV_INT

#define PMIC_LP8764X_BUCK4_OV_INT (53U)

PMIC BUCK4 Over-Voltage Interrupt

◆ PMIC_LP8764X_BUCK3_ILIM_INT

#define PMIC_LP8764X_BUCK3_ILIM_INT (54U)

PMIC BUCK3 Current Limit Interrupt

◆ PMIC_LP8764X_BUCK3_SC_INT

#define PMIC_LP8764X_BUCK3_SC_INT (55U)

PMIC BUCK3 SC Interrupt

◆ PMIC_LP8764X_BUCK3_UV_INT

#define PMIC_LP8764X_BUCK3_UV_INT (56U)

PMIC BUCK3 Under-Voltage Interrupt

◆ PMIC_LP8764X_BUCK3_OV_INT

#define PMIC_LP8764X_BUCK3_OV_INT (57U)

PMIC BUCK4 Over-Voltage Interrupt

◆ PMIC_LP8764X_BUCK2_ILIM_INT

#define PMIC_LP8764X_BUCK2_ILIM_INT (58U)

PMIC BUCK2 Current Limit Interrupt

◆ PMIC_LP8764X_BUCK2_SC_INT

#define PMIC_LP8764X_BUCK2_SC_INT (59U)

PMIC BUCK2 SC Interrupt

◆ PMIC_LP8764X_BUCK2_UV_INT

#define PMIC_LP8764X_BUCK2_UV_INT (60U)

PMIC BUCK2 Under-Voltage Interrupt

◆ PMIC_LP8764X_BUCK2_OV_INT

#define PMIC_LP8764X_BUCK2_OV_INT (61U)

PMIC BUCK2 Over-Voltage Interrupt

◆ PMIC_LP8764X_BUCK1_ILIM_INT

#define PMIC_LP8764X_BUCK1_ILIM_INT (62U)

PMIC BUCK1 Current Limit Interrupt

◆ PMIC_LP8764X_BUCK1_SC_INT

#define PMIC_LP8764X_BUCK1_SC_INT (63U)

PMIC BUCK1 SC Interrupt

◆ PMIC_LP8764X_BUCK1_UV_INT

#define PMIC_LP8764X_BUCK1_UV_INT (64U)

PMIC BUCK1 Under-Voltage Interrupt

◆ PMIC_LP8764X_BUCK1_OV_INT

#define PMIC_LP8764X_BUCK1_OV_INT (65U)

PMIC BUCK1 Over-Voltage Interrupt

◆ PMIC_LP8764X_SOFT_REBOOT_INT

#define PMIC_LP8764X_SOFT_REBOOT_INT (66U)

PMIC SOFT REBOOT Startup Interrupt

◆ PMIC_LP8764X_IRQ_MAX_NUM_PG_1_0

#define PMIC_LP8764X_IRQ_MAX_NUM_PG_1_0 (66U)

PMIC Max Interrupt Number on PG1.0

◆ PMIC_LP8764X_IRQ_MAX_NUM_PG_2_0

#define PMIC_LP8764X_IRQ_MAX_NUM_PG_2_0 (67U)

PMIC Max Interrupt Number on PG2.0

◆ PMIC_LP8764X_IRQ_GPIO_1_INT_MASK_NUM

#define PMIC_LP8764X_IRQ_GPIO_1_INT_MASK_NUM (0U)

◆ PMIC_LP8764X_IRQ_GPIO_2_INT_MASK_NUM

#define PMIC_LP8764X_IRQ_GPIO_2_INT_MASK_NUM (1U)

◆ PMIC_LP8764X_IRQ_GPIO_3_INT_MASK_NUM

#define PMIC_LP8764X_IRQ_GPIO_3_INT_MASK_NUM (2U)

◆ PMIC_LP8764X_IRQ_GPIO_4_INT_MASK_NUM

#define PMIC_LP8764X_IRQ_GPIO_4_INT_MASK_NUM (3U)

◆ PMIC_LP8764X_IRQ_GPIO_5_INT_MASK_NUM

#define PMIC_LP8764X_IRQ_GPIO_5_INT_MASK_NUM (4U)

◆ PMIC_LP8764X_IRQ_GPIO_6_INT_MASK_NUM

#define PMIC_LP8764X_IRQ_GPIO_6_INT_MASK_NUM (5U)

◆ PMIC_LP8764X_IRQ_GPIO_7_INT_MASK_NUM

#define PMIC_LP8764X_IRQ_GPIO_7_INT_MASK_NUM (6U)

◆ PMIC_LP8764X_IRQ_GPIO_8_INT_MASK_NUM

#define PMIC_LP8764X_IRQ_GPIO_8_INT_MASK_NUM (7U)

◆ PMIC_LP8764X_IRQ_GPIO_9_INT_MASK_NUM

#define PMIC_LP8764X_IRQ_GPIO_9_INT_MASK_NUM (8U)

◆ PMIC_LP8764X_IRQ_GPIO_10_INT_MASK_NUM

#define PMIC_LP8764X_IRQ_GPIO_10_INT_MASK_NUM (9U)

Function Documentation

◆ Pmic_irqGetErrStatus()

int32_t Pmic_irqGetErrStatus	(	Pmic_CoreHandle_t *	pPmicCoreHandle,
		Pmic_IrqStatus_t *	pErrStat,
		const bool	clearIRQ
	)

API to read Error status.

Requirement: REQ_TAG(PDK-5805), REQ_TAG(PDK-5842), REQ_TAG(PDK-5832), REQ_TAG(PDK-5838), REQ_TAG(PDK-5852), REQ_TAG(PDK-5834), REQ_TAG(PDK-5806), REQ_TAG(PDK-5828), REQ_TAG(PDK-5807), REQ_TAG(PDK-5846), REQ_TAG(PDK-5812), REQ_TAG(PDK-5830), REQ_TAG(PDK-5835), REQ_TAG(PDK-5836), REQ_TAG(PDK-5845), REQ_TAG(PDK-9147), REQ_TAG(PDK-9148), REQ_TAG(PDK-9149), REQ_TAG(PDK-9113), REQ_TAG(PDK-9120), REQ_TAG(PDK-9122), REQ_TAG(PDK-9159), REQ_TAG(PDK-9329) Design: did_pmic_irq_cfg_readback Architecture: aid_pmic_irq_cfg

     This function does the following:
        1. This function gets the interrupt status by reading pmic
           IRQ register as per IRQ hierarchy defined in device TRM.
        2. Decipher error from top register to actual error code.
        3. Store the status of all Interrupts.
        4. Support clearing interrupts depends on clearIRQ flag.
     Note: Application has to ensure to clear the interrupts after the
           interrupt has been serviced. If the interrupts are not cleared
           after the interrupt had been serviced then Application will
           not get any further interrupts which results in event miss

Parameters

pPmicCoreHandle	[IN] PMIC Interface Handle.
pErrStat	[OUT] Pointer to store Error status.
clearIRQ	[IN] Flag to clear Interrupt status after deciphering the interrupt status. For valid values: Pmic_IrqClearFlag.

Return values

PMIC_ST_SUCCESS in case of success or appropriate error code. For valid values: Pmic_ErrorCodes.

◆ Pmic_irqClrErrStatus()

int32_t Pmic_irqClrErrStatus	(	Pmic_CoreHandle_t *	pPmicCoreHandle,
		const uint8_t	irqNum
	)

API to clear Error status.

Requirement: REQ_TAG(PDK-5805), REQ_TAG(PDK-9113), REQ_TAG(PDK-9120) Design: did_pmic_irq_cfg_readback Architecture: aid_pmic_irq_cfg

     This function does the following:
     1. This function clears the IRQ status in PMIC register for a given
        IRQ Number.
     2. Validates given IRQ Number and find the IRQ register that is
        to be cleared.
     3. Expected to be called after an IRQ status is deciphered by
        Pmic_irqGetErrStatus().

Parameters

pPmicCoreHandle	[IN] PMIC Interface Handle.
irqNum	[IN] Interrupt number to clear the status. For Valid values: Pmic_tps6594x_IrqNum for TPS6594x LEO PMIC, Pmic_lp8764x_IrqNum for LP8764x HERA PMIC, Pmic_IrqNum for all interrupts except gpio.

Return values

PMIC_ST_SUCCESS in case of success or appropriate error code. For valid values: Pmic_ErrorCodes.

◆ Pmic_irqMaskIntr()

int32_t Pmic_irqMaskIntr	(	Pmic_CoreHandle_t *	pPmicCoreHandle,
		const uint8_t	irqNum,
		const bool	mask
	)

API to mask/unmask interrupts.

Requirement: REQ_TAG(PDK-5805) Design: did_pmic_irq_cfg_readback Architecture: aid_pmic_irq_cfg

     This function does the following:
     1. This function mask/unmask the given IRQ Number.
     2. Validates given IRQ Number and find the IRQ register that
        is to be masked/unmasked.

Parameters

pPmicCoreHandle	[IN] PMIC Interface Handle.
irqNum	[IN] Interrupt number to be masked. For Valid values: Pmic_tps6594x_IrqNum for TPS6594x LEO PMIC, Pmic_lp8764x_IrqNum for LP8764x HERA PMIC, Pmic_IrqNum for all interrupts except gpio.
mask	[IN] Parameter to mask/unmask INTR. For valid values: Pmic_IrqMaskFlag.

Return values

PMIC_ST_SUCCESS in case of success or appropriate error code. For valid values: Pmic_ErrorCodes.

◆ Pmic_getNextErrorStatus()

int32_t Pmic_getNextErrorStatus	(	const Pmic_CoreHandle_t *	pPmicCoreHandle,
		Pmic_IrqStatus_t *	pErrStat,
		uint8_t *	pIrqNum
	)

API to extract each Error status.

Requirement: REQ_TAG(PDK-5805) Design: did_pmic_irq_cfg_readback Architecture: aid_pmic_irq_cfg

     This function is used to extract each Error status from pErrStat
     as per the hierarchy given in the TRM. This function clears the
     Error status after the status is extracted. This API is expected to
     be called after Pmic_irqGetErrStatus.

Parameters

pPmicCoreHandle	[IN] PMIC Interface Handle.
pErrStat	[IN] Pointer containing Error Status.
pIrqNum	[OUT] Pointer to store the IRQ Number extracted For TPS6594x LEO: Pmic_tps6594x_IrqNum. For LP8764x HERA: Pmic_lp8764x_IrqNum.

Return values

PMIC_ST_SUCCESS in case of success or appropriate error code. For valid values Pmic_ErrorCodes.

◆ Pmic_irqGpioMaskIntr()

int32_t Pmic_irqGpioMaskIntr	(	Pmic_CoreHandle_t *	pPmicCoreHandle,
		const uint8_t	irqGpioNum,
		const bool	mask,
		const uint8_t	gpioIntrType
	)

API to mask/unmask GPIO interrupts.

Requirement: REQ_TAG(PDK-5812) Design: did_pmic_irq_cfg_readback Architecture: aid_pmic_irq_cfg

     This function is used to Mask or Unmask GPIO Rise and Fall
     Interrupts based on the GPIO IRQ Number.

Parameters

pPmicCoreHandle	[IN] PMIC Interface Handle.
irqGpioNum	[IN] GPIO Interrupt to be masked/unmasked. For Valid values: Pmic_tps6594x_IrqGpioNum for TPS6594x LEO PMIC, Pmic_lp8764x_IrqGpioNum for LP8764x HERA PMIC, Pmic_IrqGpioNum for all gpio interrupts.
mask	[IN] Parameter to mask/unmask INTR. Valid values: Pmic_IrqMaskFlag.
gpioIntrType	[IN] Parameter to mask GPIO RISE and FALL Interrupt. Valid values: Pmic_IrqGpioIntrType.

Return values

PMIC_ST_SUCCESS in case of success or appropriate error code. For valid values Pmic_ErrorCodes.

◆ Pmic_irqGetMaskIntrStatus()

int32_t Pmic_irqGetMaskIntrStatus	(	Pmic_CoreHandle_t *	pPmicCoreHandle,
		const uint8_t	irqNum,
		bool *	pMaskStatus
	)

API to read the status of PMIC interrupts is masked or not.

Requirement: REQ_TAG(PDK-9153) Design: did_pmic_irq_mask_status Architecture: aid_pmic_irq_cfg

     This function does the following:
     1. This function reads the status of interrupt is masked or not for
        the given IRQ Number.
     2. Validates given IRQ Number and find the IRQ register to check
        the status of interrupt is masked or not

Parameters

pPmicCoreHandle	[IN] PMIC Interface Handle.
irqNum	[IN] Interrupt number to be masked. For Valid values: Pmic_tps6594x_IrqNum for TPS6594x LEO PMIC, Pmic_lp8764x_IrqNum for LP8764x HERA PMIC,
pMaskStatus	[OUT] Pointer to hold the status of interrupt is masked or not For Valid values: Pmic_IrqMaskFlag

Return values

PMIC_ST_SUCCESS in case of success or appropriate error code. For valid values: Pmic_ErrorCodes.

◆ Pmic_irqGetGpioMaskIntr()

int32_t Pmic_irqGetGpioMaskIntr	(	Pmic_CoreHandle_t *	pPmicCoreHandle,
		const uint8_t	irqGpioNum,
		const uint8_t	gpioIntrType,
		bool *	pRiseIntrMaskStat,
		bool *	pFallIntrMaskStat
	)

API to read the status of PMIC GPIO interrupts is masked or not.

Requirement: REQ_TAG(PDK-9152) Design: did_pmic_irq_mask_status Architecture: aid_pmic_irq_cfg

     This function reads the status of GPIO Rise and Fall interrupt is
     masked or not for the given GPIO IRQ Number

Parameters

pPmicCoreHandle	[IN] PMIC Interface Handle.
irqGpioNum	[IN] GPIO Interrupt to be masked/unmasked. For Valid values: Pmic_tps6594x_IrqGpioNum for TPS6594x LEO PMIC, Pmic_lp8764x_IrqGpioNum for LP8764x HERA PMIC,
gpioIntrType	[IN] Parameter to mask GPIO RISE and FALL Interrupt. Valid values: Pmic_IrqGpioIntrType.
pRiseIntrMaskStat	[OUT] Pointer to hold status of GPIO Rise Interrupt is masked or not Valid only when gpioIntrType is PMIC_IRQ_GPIO_RISE_INT_TYPE or PMIC_IRQ_GPIO_RISE_FALL_INT_TYPE For Valid values: Pmic_IrqMaskFlag
pFallIntrMaskStat	[OUT] Pointer to hold status of GPIO Fall Interrupt is masked or not Valid only when gpioIntrType is PMIC_IRQ_GPIO_FALL_INT_TYPE or PMIC_IRQ_GPIO_RISE_FALL_INT_TYPE For Valid values: Pmic_IrqMaskFlag

Return values

PMIC_ST_SUCCESS in case of success or appropriate error code. For valid values Pmic_ErrorCodes.

Introduction

Files

Data Structures

Functions

PMIC GPIO Interrupt Mask values

PMIC IRQ flag for all Interrupts

PMIC IRQ Clear flags

PMIC IRQ Mask flag

PMIC IRQ GPIO Interrupt type

PMIC IRQ Interrupt values for tps6594x LEO PMIC device

PMIC GPIO Interrupt Mask values for tps6594x

PMIC IRQ Interrupt values for LP8764x HERA PMIC Device.

PMIC GPIO Interrupt Mask values for tps6594x.

Macro Definition Documentation

◆ PMIC_IRQ_GPIO_ALL_INT_MASK_NUM

◆ PMIC_IRQ_ALL

◆ PMIC_IRQ_CLEAR_NONE

◆ PMIC_IRQ_CLEAR

◆ PMIC_IRQ_UNMASK

◆ PMIC_IRQ_MASK

◆ PMIC_IRQ_GPIO_FALL_INT_TYPE

◆ PMIC_IRQ_GPIO_RISE_INT_TYPE

◆ PMIC_IRQ_GPIO_RISE_FALL_INT_TYPE

◆ PMIC_TPS6594X_WD_RST_INT

◆ PMIC_TPS6594X_WD_FAIL_INT

◆ PMIC_TPS6594X_WD_LONGWIN_TIMEOUT_INT

◆ PMIC_TPS6594X_ESM_MCU_RST_INT

◆ PMIC_TPS6594X_ESM_MCU_FAIL_INT

◆ PMIC_TPS6594X_ESM_MCU_PIN_INT

◆ PMIC_TPS6594X_ESM_SOC_RST_INT

◆ PMIC_TPS6594X_ESM_SOC_FAIL_INT

◆ PMIC_TPS6594X_ESM_SOC_PIN_INT

◆ PMIC_TPS6594X_NRSTOUT_SOC_READBACK_INT

◆ PMIC_TPS6594X_EN_DRV_READBACK_INT

◆ PMIC_TPS6594X_I2C2_ADR_ERR_INT

◆ PMIC_TPS6594X_I2C2_CRC_ERR_INT

◆ PMIC_TPS6594X_COMM_ADR_ERR_INT

◆ PMIC_TPS6594X_COMM_CRC_ERR_INT

◆ PMIC_TPS6594X_COMM_FRM_ERR_INT

◆ PMIC_TPS6594X_SOC_PWR_ERR_INT

◆ PMIC_TPS6594X_MCU_PWR_ERR_INT

◆ PMIC_TPS6594X_ORD_SHUTDOWN_INT

◆ PMIC_TPS6594X_IMM_SHUTOWN_INT

◆ PMIC_TPS6594X_PFSM_ERR_INT

◆ PMIC_TPS6594X_VCCA_OVP_INT

◆ PMIC_TPS6594X_TSD_IMM_INT

◆ PMIC_TPS6594X_NRSTOUT_READBACK_INT

◆ PMIC_TPS6594X_NINT_READBACK_INT

◆ PMIC_TPS6594X_NPWRON_LONG_INT

◆ PMIC_TPS6594X_SPMI_ERR_INT

◆ PMIC_TPS6594X_RECOV_CNT_INT

◆ PMIC_TPS6594X_REG_CRC_ERR_INT

◆ PMIC_TPS6594X_BIST_FAIL_INT

◆ PMIC_TPS6594X_TSD_ORD_INT

◆ PMIC_TPS6594X_TWARN_INT

◆ PMIC_TPS6594X_EXT_CLK_INT

◆ PMIC_TPS6594X_BIST_PASS_INT

◆ PMIC_TPS6594X_FSD_INT

◆ PMIC_TPS6594X_RTC_ALARM_INT

◆ PMIC_TPS6594X_RTC_TIMER_INT

◆ PMIC_TPS6594X_ENABLE_INT

◆ PMIC_TPS6594X_NPWRON_START_INT

◆ PMIC_TPS6594X_GPIO8_INT

◆ PMIC_TPS6594X_GPIO7_INT

◆ PMIC_TPS6594X_GPIO6_INT

◆ PMIC_TPS6594X_GPIO5_INT

◆ PMIC_TPS6594X_GPIO4_INT

◆ PMIC_TPS6594X_GPIO3_INT

◆ PMIC_TPS6594X_GPIO2_INT

◆ PMIC_TPS6594X_GPIO1_INT

◆ PMIC_TPS6594X_GPIO11_INT

◆ PMIC_TPS6594X_GPIO10_INT

◆ PMIC_TPS6594X_GPIO9_INT

◆ PMIC_TPS6594X_VCCA_UV_INT

◆ PMIC_TPS6594X_VCCA_OV_INT

◆ PMIC_TPS6594X_LDO4_ILIM_INT

◆ PMIC_TPS6594X_LDO4_SC_INT

◆ PMIC_TPS6594X_LDO4_UV_INT

◆ PMIC_TPS6594X_LDO4_OV_INT

◆ PMIC_TPS6594X_LDO3_ILIM_INT