Introduction

Functions
void	SDL_R5PMU_cfg (uint32_t cycleCntDiv, uint32_t exportEvents, uint32_t userEnable)
	Configure the Performance Management Unit (PMU) More...

int32_t	SDL_R5PMU_verifyCfg (uint32_t cycleCntDiv, uint32_t exportEvents)
	Configure the Performance Management Unit (PMU) More...

void	SDL_R5PMU_enableAllCntrs (uint32_t enable)
	Enable/disable all PMU counters. More...

uint32_t	SDL_R5PMU_getNumCntrs (void)
	Get the number of PMU counters supported. More...

void	SDL_R5PMU_cfgCntr (uint32_t cntrNum, SDL_R5PmuEventType eventType)
	Configure a PMU counter. More...

void	SDL_R5PMU_enableCntrOverflowIntr (uint32_t cntrNum, uint32_t enable)
	Enable/disable overflow interrupt generation for a PMU counter. More...

void	SDL_R5PMU_enableCntr (uint32_t cntrNum, uint32_t enable)
	Enable/disable a PMU counter. More...

uint32_t	SDL_R5PMU_readCntr (uint32_t cntrNum)
	Read a PMU counter. More...

void	SDL_R5PMU_setResetCntr (uint32_t cntrNum, uint32_t cntrVal)
	Set a PMU counter. More...

uint32_t	SDL_R5PMU_readCntrOverflowStatus (void)
	Read the overflow status for all of the counters. More...

void	SDL_R5PMU_clearCntrOverflowStatus (uint32_t cntrMask)
	Clear the overflow flag for the specified counter(s) More...

void	SDL_R5PMU_resetCycleCnt (void)
	Reset the cycle counter to zero. More...

void	SDL_R5PMU_resetCntrs (void)
	Reset all counters to zero. More...

void	SDL_R5PMU_readStaticRegisters (SDL_PMU_staticRegs *pStaticRegs)
	PMU API to Read the Static Registers. This function reads the values of the static registers such as cycleCntDiv, exportEvents and userEnable status. More...

Function Documentation

◆ SDL_R5PMU_cfg()

void SDL_R5PMU_cfg	(	uint32_t	cycleCntDiv,
		uint32_t	exportEvents,
		uint32_t	userEnable
	)

Configure the Performance Management Unit (PMU)

This function is used to configure the PMU.

The value arguments provided to this function are directly written into the corresponding R5 system register. As a result, the values must be constructed per the expected register format.

See the "MPU memory region programming registers" section of the ARM Cortex R5 TRM for more information.

Parameters

cycleCntDiv	[IN] Cycle count divider: 0=Counts every processor clock cycle, otherwise counts every 64th processor clock cycle
exportEvents	[IN] Export of the events to the event bus for an external monitoring block: 0=Export disabled, otherwise export is enabled.
userEnable	[IN] User mode access to performance monitor and validation registers: 0=disabled, otherwise enabled.

Returns: None

◆ SDL_R5PMU_verifyCfg()

int32_t SDL_R5PMU_verifyCfg	(	uint32_t	cycleCntDiv,
		uint32_t	exportEvents
	)

Configure the Performance Management Unit (PMU)

This function is used to verify the configuration of the PMU.

The value arguments provided to this function are directly written into the corresponding R5 system register. As a result, the values must be constructed per the expected register format.

See the "MPU memory region programming registers" section of the ARM Cortex R5 TRM for more information.

Parameters

cycleCntDiv	[IN] Cycle count divider: 0=Counts every processor clock cycle, otherwise counts every 64th processor clock cycle
exportEvents	[IN] Export of the events to the event bus for an external monitoring block: 0=Export disabled, otherwise export is enabled.

Returns: None

◆ SDL_R5PMU_enableAllCntrs()

void SDL_R5PMU_enableAllCntrs ( uint32_t enable )

Enable/disable all PMU counters.

This function is used to enable or disable all of the PMU counters. Note that to enable a specific counter, both this function and the SDL_R5PMU_enableCntr function must be called.

Parameters

enable [IN] 0=All counters are disabled, otherwise they are enabled

Returns: None

◆ SDL_R5PMU_getNumCntrs()

uint32_t SDL_R5PMU_getNumCntrs ( void )

Get the number of PMU counters supported.

This function is used to get the number of PMU counters supported.

Returns: The number of PMU counters supported

◆ SDL_R5PMU_cfgCntr()

void SDL_R5PMU_cfgCntr	(	uint32_t	cntrNum,
		SDL_R5PmuEventType	eventType
	)

Configure a PMU counter.

This function is used to configure a PMU counter.

Parameters

cntrNum	[IN] Counter number (0..(SDL_R5PMU_getNumCntrs()-1))
eventType	[IN] Event type to count. See SDL_R5PmuEventType for available event types.

Returns: None

◆ SDL_R5PMU_enableCntrOverflowIntr()

void SDL_R5PMU_enableCntrOverflowIntr	(	uint32_t	cntrNum,
		uint32_t	enable
	)

Enable/disable overflow interrupt generation for a PMU counter.

This function is used to enable or disable overflow interrupt generation for the specified PMU counter.

Parameters

cntrNum	[IN] Counter number (0..(SDL_R5PMU_getNumCntrs()-1)) or SDL_ARM_R5_PMU_CYCLE_COUNTER_NUM)
enable	[IN] 0=Overflow interrupt generation is disabled, otherwise it is enabled

Returns: None

◆ SDL_R5PMU_enableCntr()

void SDL_R5PMU_enableCntr	(	uint32_t	cntrNum,
		uint32_t	enable
	)

Enable/disable a PMU counter.

This function is used to enable or disable the specified PMU counter. Note that to enable a specific counter, both this function and the SDL_R5PMU_enableAllCntrs function must be called.

Parameters

cntrNum	[IN] Counter number (0..(SDL_R5PMU_getNumCntrs()-1)) or SDL_ARM_R5_PMU_CYCLE_COUNTER_NUM)
enable	[IN] 0=Disable counter, otherwise it is enabled

Returns: None

◆ SDL_R5PMU_readCntr()

uint32_t SDL_R5PMU_readCntr ( uint32_t cntrNum )

Read a PMU counter.

This function is used to read the specified PMU counter.

Parameters

cntrNum [IN] Counter number (0..(SDL_R5PMU_getNumCntrs()-1)) or SDL_ARM_R5_PMU_CYCLE_COUNTER_NUM)

Returns: The current count associated with the specified PMU counter

◆ SDL_R5PMU_setResetCntr()

void SDL_R5PMU_setResetCntr	(	uint32_t	cntrNum,
		uint32_t	cntrVal
	)

Set a PMU counter.

This function is used to set the specified PMU counter.

Parameters

cntrNum	[IN] Counter number (0..(SDL_R5PMU_getNumCntrs()-1)) or SDL_ARM_R5_PMU_CYCLE_COUNTER_NUM)
cntrVal	[IN] Counter Value to be set

Returns: None

◆ SDL_R5PMU_readCntrOverflowStatus()

uint32_t SDL_R5PMU_readCntrOverflowStatus ( void )

Read the overflow status for all of the counters.

This function is used to read the overflow status for all of the counters. A bit-mask is returned where bits set to '1' indicate overflow occurred for the corresponding counter. See the 'Overflow Flag Status Register' description in the ARM R5 TRM for the format of this bitmask.

Returns: the value of PMOVSR register

◆ SDL_R5PMU_clearCntrOverflowStatus()

void SDL_R5PMU_clearCntrOverflowStatus ( uint32_t cntrMask )

Clear the overflow flag for the specified counter(s)

This function is used to clear the overflow flag for the specified counter(s). The cntrMask argument is a bit-mask where bits set to '1' indicate which counter(s)' overflow flag to clear. See the 'Overflow Flag Status Register' description in the ARM R5 TRM for the format of this bitmask.

Parameters

cntrMask [IN] Bit-mask indicating which counter(s)' overflow flag to clear

Returns: None

◆ SDL_R5PMU_resetCycleCnt()

void SDL_R5PMU_resetCycleCnt ( void )

Reset the cycle counter to zero.

This function resets the cycle counter to zero.

Returns: None

◆ SDL_R5PMU_resetCntrs()

void SDL_R5PMU_resetCntrs ( void )

Reset all counters to zero.

This function resets all event counters to zero.

Returns: None

◆ SDL_R5PMU_readStaticRegisters()

void SDL_R5PMU_readStaticRegisters ( SDL_PMU_staticRegs * pStaticRegs )

PMU API to Read the Static Registers. This function reads the values of the static registers such as cycleCntDiv, exportEvents and userEnable status.

Parameters

pStaticRegs Pointer to the static registers structure

Returns: None

Introduction

Functions

Function Documentation

◆ SDL_R5PMU_cfg()

◆ SDL_R5PMU_verifyCfg()

◆ SDL_R5PMU_enableAllCntrs()

◆ SDL_R5PMU_getNumCntrs()

◆ SDL_R5PMU_cfgCntr()

◆ SDL_R5PMU_enableCntrOverflowIntr()

◆ SDL_R5PMU_enableCntr()

◆ SDL_R5PMU_readCntr()

◆ SDL_R5PMU_setResetCntr()

◆ SDL_R5PMU_readCntrOverflowStatus()

◆ SDL_R5PMU_clearCntrOverflowStatus()

◆ SDL_R5PMU_resetCycleCnt()

◆ SDL_R5PMU_resetCntrs()

◆ SDL_R5PMU_readStaticRegisters()