PDK API Guide for J721E
IcssgTimeSync_Cfg Struct Reference

Detailed Description

TimeSync configuration parameters.

Data Fields

bool enable
 
IcssgTimeSync_ClkType clkType
 
uint32_t syncOut_start_WC
 
uint32_t syncOut_pwidth_WC
 

Field Documentation

◆ enable

bool IcssgTimeSync_Cfg::enable

Whether TimeSync will be enabled or not.

In case of Dual-MAC, only one port can use TimeSync at a time, so it should be disabled via this config parameter. This parameter will be overwritten (to false) if it's detected that TimeSync is already is use for another Dual-MAC port.

There is no limitation in ICSSG Switch, it can be kept enabled.

◆ clkType

IcssgTimeSync_ClkType IcssgTimeSync_Cfg::clkType

Control variable for set/get operations

◆ syncOut_start_WC

uint32_t IcssgTimeSync_Cfg::syncOut_start_WC

Working clock SyncOut start time within the cycle

◆ syncOut_pwidth_WC

uint32_t IcssgTimeSync_Cfg::syncOut_pwidth_WC

Working clock SyncOut pulse width