![]() |
PDK API Guide for J721E
|
Configuration register to set the physical/logical DPHY lane mapping, the number of lanes being used and external DPHY selection. This register should be set prior to enabling the streams and must not be updated when the stream is running.
Data Fields | |
uint8_t | dlMap [CSIRX_MAX_NUM_OF_STREAMS] |
uint8_t | laneNb |
uint8_t | sel |
uint8_t | enable2p0Support |
uint8_t CSIRX_StaticCfg::dlMap[CSIRX_MAX_NUM_OF_STREAMS] |
physical mapping of logical data lanes
uint8_t CSIRX_StaticCfg::laneNb |
number of lanes being used
uint8_t CSIRX_StaticCfg::sel |
selection of DPHY used as input of CSIRX module
uint8_t CSIRX_StaticCfg::enable2p0Support |
enable CSI ver2.0 support for CSIRX module