PDK API Guide for J721E
ipc_soc.h
Go to the documentation of this file.
1 /*
2  * Copyright (c) Texas Instruments Incorporated 2018
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  *
12  * Redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the
15  * distribution.
16  *
17  * Neither the name of Texas Instruments Incorporated nor the names of
18  * its contributors may be used to endorse or promote products derived
19  * from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
47 #ifndef IPC_SOC_V1_H_
48 #define IPC_SOC_V1_H_
49 
50 #include <ti/drv/ipc/include/ipc_config.h>
51 
52 #ifdef __cplusplus
53 extern "C" {
54 #endif
55 
60 #if defined (SOC_J7200)
61 #define IPC_VRING_BUFFER_SIZE (0x800000U)
62 #else
63 #define IPC_VRING_BUFFER_SIZE (0x1C00000U)
64 #endif
65 
66 /*
67  * For VLAB toolbox 0.14.5.snapshot2 onward,
68  * this must be defined for C66x interrupt to work
69  * properly.
70  */
71 #define SUPPORT_C66X_BIT0
72 
74 #define IPC_MPU1_0 (0U)
75 #define IPC_MCU1_0 (1U)
76 #define IPC_MCU1_1 (2U)
77 #define IPC_MCU2_0 (3U)
78 #define IPC_MCU2_1 (4U)
79 #if defined (SOC_J721E)
80 #define IPC_MCU3_0 (5U)
81 #define IPC_MCU3_1 (6U)
82 #define IPC_C66X_1 (7U)
83 #define IPC_C66X_2 (8U)
84 #define IPC_C7X_1 (9U)
85 #define IPC_MPU1_1 (10U)
86 #define IPC_MAX_PROCS (11U)
87 #elif defined (SOC_J7200)
88 #define IPC_MPU1_1 (5U)
89 #define IPC_MAX_PROCS (6U)
90 #endif
91 
92 #define IPC_MAILBOX_CLUSTER_CNT (12U)
93 #define IPC_MAILBOX_USER_CNT (4U)
94 #define MAIN_NAVSS_MAILBOX_INPUTINTR_MAX (440U)
95 #define MAIN_NAVSS_MAILBOX_OUTPUTINTR_MAX (512U)
96 
97 /* Refer to J7ES interrupt mapping table */
98 #ifndef QNX_OS
99 #define NAVSS512_MPU1_0_INPUT_MAILBOX_OFFSET (182U)
100 #else
101 #define NAVSS512_MPU1_0_INPUT_MAILBOX_OFFSET (112U)
102 #endif
103 #define NAVSS512_MCU1R5F0_INPUT_MAILBOX_OFFSET (400U)
104 #define NAVSS512_MCU1R5F1_INPUT_MAILBOX_OFFSET (404U)
105 #define NAVSS512_MCU2R5F0_INPUT_MAILBOX_OFFSET (216U)
106 #define NAVSS512_MCU2R5F1_INPUT_MAILBOX_OFFSET (248U)
107 #define NAVSS512_MCU3R5F0_INPUT_MAILBOX_OFFSET (280U)
108 #define NAVSS512_MCU3R5F1_INPUT_MAILBOX_OFFSET (312U)
109 #define NAVSS512_C66X1_INPUT_MAILBOX_OFFSET (344U) /* C66x_intrRouter_0 : 96 */
110 #define NAVSS512_C66X2_INPUT_MAILBOX_OFFSET (376U) /* C66x_intrRouter_1 : 96 */
111 #define NAVSS512_C7X1_INPUT_MAILBOX_OFFSET (188U)
112 
113 #define IPC_MCU_NAVSS0_INTR0_CFG_BASE (CSL_NAVSS_MAIN_INTR_ROUTER_CFG_REGS_0_BASE)
114 
115 /* Could not find the RAT address in CSL */
116 #define IPC_C66X_RAT_BASE (0x07ff0030U)
117 
118 /* Virtual Address used for C66x to access j7_c66_interrupt_router */
119 #define IPC_C66X_INTR_VA_BASE (0x18000000U)
120 
121 /* Sclient does not configure RAT, so it must
122  * be done C66x core
123  * RAT configuration for C66x_1 and C66x_2 */
124 #define IPC_C66X_1_INTR_PA_BASE (CSL_C66SS0_INTROUTER0_INTR_ROUTER_CFG_BASE)
125 #define IPC_C66X_2_INTR_PA_BASE (CSL_C66SS1_INTROUTER0_INTR_ROUTER_CFG_BASE)
126 #define C66X1_MBINTR_INPUT_BASE (74U)
127 #define C66X1_MBINTR_OFFSET (84U)
128 #define C66X1_MBINTR_OUTPUT_BASE (96U)
129 #define C66X2_MBINTR_INPUT_BASE (74U)
130 #define C66X2_MBINTR_OUTPUT_BASE (96U)
131 #define C66X2_MBINTR_OFFSET (84U)
132 
133 /* Request Sciclient for available resource in group2 NavSS
134  * For C7x, DMSC does not configure or map CLEC router
135  * it must be done by C7x software.
136  * StartEvent = 672 (CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_NAVSS0_INTR_ROUTER_0_OUTL_INTR_128)
137  * ClecEvent = 1664 corresponds to 672
138  */
139 #define C7X_CLEC_BASE_ADDR (CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE)
140 
141 /* Base NAVSS event from group 2 */
142 #define IPC_C7X_COMPUTE_CLUSTER_OFFSET (CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_NAVSS0_INTR_ROUTER_0_OUTL_INTR_128)
143 
144 /* CLEC event corresponding to Base NAVSS event */
145 #define C7X1_CLEC_BASE_GR2_NAVSS (1664U)
146 
147 /* User selected IRQ number */
148 #define C7X1_MBINTR_OFFSET (2U)
149 
150 /* ========================================================================== */
151 /* Include Files */
152 /* ========================================================================== */
153 
154 /* None */
155 
156 
157 /* ========================================================================== */
158 /* Macros & Typedefs */
159 /* ========================================================================== */
160 
161 
162 
163 /* @} */
164 
165 /* ========================================================================== */
166 /* Structure Declarations */
167 /* ========================================================================== */
168 /* None */
169 
170 /* ========================================================================== */
171 /* Function Declarations */
172 /* ========================================================================== */
173 
174 #if defined(BUILD_C66X_1) || defined(BUILD_C66X_2)
175 void Ipc_configC66xIntrRouter(uint32_t input);
176 #endif
177 
178 #if defined(BUILD_C7X_1)
179 void Ipc_configClecRouter(uint32_t coreEvent);
180 #endif
181 
182 #ifdef IPC_SUPPORT_SCICLIENT
183 int32_t Ipc_sciclientIrqRelease(uint16_t remoteId, uint32_t clusterId,
184  uint32_t userId, uint32_t intNumber);
185 int32_t Ipc_sciclientIrqSet(uint16_t remoteId, uint32_t clusterId,
186  uint32_t userId, uint32_t intNumber);
187 #endif
188 int32_t Ipc_getIntNumRange(uint32_t coreIndex, uint16_t *rangeStartP,
189  uint16_t *rangeNumP);
190 
191 /* ========================================================================== */
192 /* Static Function Definitions */
193 /* ========================================================================== */
194 
195 /* None */
196 
197 #ifdef __cplusplus
198 }
199 #endif
200 
201 #endif /* #ifndef IPC_SOC_V1_H_ */
202 
203 /* @} */
ipc_config.h
configurations for ipc module.
Ipc_getIntNumRange
int32_t Ipc_getIntNumRange(uint32_t coreIndex, uint16_t *rangeStartP, uint16_t *rangeNumP)