PDK API Guide for J721E
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UDMAP channel direction | |
This enumerator defines the possible channel directions | |
typedef uint32_t | CSL_UdmapChanDir |
#define | CSL_UDMAP_CHAN_DIR_TX ((uint32_t) 0U) |
#define | CSL_UDMAP_CHAN_DIR_RX ((uint32_t) 1U) |
UDMAP channel burst size | |
This enumerator defines the nominal burst size and alignment for data transfers on a TX or RX channel | |
typedef uint32_t | CSL_UdmapChanBurstSize |
#define | CSL_UDMAP_CHAN_BURST_SIZE_64_BYTES ((uint32_t) 1U) |
#define | CSL_UDMAP_CHAN_BURST_SIZE_128_BYTES ((uint32_t) 2U) |
#define | CSL_UDMAP_CHAN_BURST_SIZE_256_BYTES ((uint32_t) 3U) |
UDMAP descriptor type | |
This enumerator defines the possible descriptor types | |
typedef uint32_t | CSL_UdmapDescType |
#define | CSL_UDMAP_DESC_TYPE_HOST ((uint32_t) 0U) |
#define | CSL_UDMAP_DESC_TYPE_HOST_SB ((uint32_t) 1U) |
#define | CSL_UDMAP_DESC_TYPE_MONOLITHIC ((uint32_t) 2U) |
#define | CSL_UDMAP_DESC_TYPE_RESERVED ((uint32_t) 3U) |
UDMAP protocol-specific data location | |
This enumerator defines the ps location for the descriptor | |
typedef uint32_t | CSL_UdmapPsLoc |
#define | CSL_UDMAP_PS_LOC_DESC ((uint32_t) 0U) |
#define | CSL_UDMAP_PS_LOC_PACKET ((uint32_t) 1U) |
UDMAP address type | |
This enumerator defines the possible address types | |
typedef uint32_t | CSL_UdmapAddrType |
#define | CSL_UDMAP_ADDR_TYPE_PHYS ((uint32_t) 0U) |
#define | CSL_UDMAP_ADDR_TYPE_INTER ((uint32_t) 1U) |
#define | CSL_UDMAP_ADDR_TYPE_VIRT ((uint32_t) 2U) |
UDMAP channel type | |
This enumerator defines the possible channel types | |
typedef uint32_t | CSL_UdmapChanType |
#define | CSL_UDMAP_CHAN_TYPE_REF_PKT_RING ((uint32_t) 2U) |
#define | CSL_UDMAP_CHAN_TYPE_REF_PKTSB_QUEUE ((uint32_t) 3U) |
#define | CSL_UDMAP_CHAN_TYPE_REF_TR_RING ((uint32_t) 10U) |
#define | CSL_UDMAP_CHAN_TYPE_VAL_TR_RING ((uint32_t) 11U) |
#define | CSL_UDMAP_CHAN_TYPE_COPY_REF_TR_RING ((uint32_t) 12U) |
#define | CSL_UDMAP_CHAN_TYPE_COPY_VAL_TR_RING ((uint32_t) 13U) |
UDMAP tag select | |
This enumerator defines how tag values are determined | |
typedef uint32_t | CSL_UdmapTagSelect |
#define | CSL_UDMAP_TAG_SELECT_NO_OVERWRITE ((uint32_t) 0U) |
#define | CSL_UDMAP_TAG_SELECT_OVERWRITE_WITH_VAL ((uint32_t) 1U) |
#define | CSL_UDMAP_TAG_SELECT_OVERWRITE_WITH_FLOWID_7_0 ((uint32_t) 2U) |
#define | CSL_UDMAP_TAG_SELECT_OVERWRITE_WITH_FLOWID_15_8 ((uint32_t) 3U) |
#define | CSL_UDMAP_TAG_SELECT_OVERWRITE_WITH_TAG_7_0 ((uint32_t) 4U) |
#define | CSL_UDMAP_TAG_SELECT_OVERWRITE_WITH_TAG_15_8 ((uint32_t) 5U) |
#define | CSL_UDMAP_TAG_SELECT_INVALID ((uint32_t) 6U) |
UDMAP channel schedling priority | |
This enumerator selects which scheduling bin the channel will be placed in for bandwidth allocation of the DMA units | |
typedef uint32_t | CSL_UdmapChanSchedPri |
#define | CSL_UDMAP_CHAN_SCHED_PRI_HIGH ((uint32_t) 0U) |
#define | CSL_UDMAP_CHAN_SCHED_PRI_MED_HIGH ((uint32_t) 1U) |
#define | CSL_UDMAP_CHAN_SCHED_PRI_MED_LOW ((uint32_t) 2U) |
#define | CSL_UDMAP_CHAN_SCHED_PRI_LOW ((uint32_t) 3U) |
UDMAP VBUSM master interface identification | |
This enumerator defines the VBUSM master interfaces whose command dispatching threashold can be tuned via virtualization tuning registers. UDMAP revision 2.1.32.0 and later provides support for setting command dispatching threasholds of UDMAP VBUSM master interfaces via virtualization tuning registers. | |
typedef uint32_t | CSL_UdmapMasterInterface |
#define | CSL_UDMAP_MASTER_INTERFACE_PKTDMA_0 ((uint32_t) 0U) |
#define | CSL_UDMAP_MASTER_INTERFACE_PKTDMA_1 ((uint32_t) 1U) |
#define | CSL_UDMAP_MASTER_INTERFACE_UTC_READ ((uint32_t) 2U) |
#define | CSL_UDMAP_MASTER_INTERFACE_UTC_WRITE ((uint32_t) 3U) |
#define CSL_UDMAP_CHAN_DIR_TX ((uint32_t) 0U) |
Transmit direction
#define CSL_UDMAP_CHAN_DIR_RX ((uint32_t) 1U) |
Receive direction
#define CSL_UDMAP_CHAN_BURST_SIZE_64_BYTES ((uint32_t) 1U) |
64-byte burst size
#define CSL_UDMAP_CHAN_BURST_SIZE_128_BYTES ((uint32_t) 2U) |
128-byte burst size
#define CSL_UDMAP_CHAN_BURST_SIZE_256_BYTES ((uint32_t) 3U) |
256-byte burst size
#define CSL_UDMAP_DESC_TYPE_HOST ((uint32_t) 0U) |
Host
#define CSL_UDMAP_DESC_TYPE_HOST_SB ((uint32_t) 1U) |
Host single-buffer
#define CSL_UDMAP_DESC_TYPE_MONOLITHIC ((uint32_t) 2U) |
Monolithic
#define CSL_UDMAP_DESC_TYPE_RESERVED ((uint32_t) 3U) |
Reserved
#define CSL_UDMAP_PS_LOC_DESC ((uint32_t) 0U) |
Located in descriptor
#define CSL_UDMAP_PS_LOC_PACKET ((uint32_t) 1U) |
Located in packet
#define CSL_UDMAP_ADDR_TYPE_PHYS ((uint32_t) 0U) |
Physical addressing
#define CSL_UDMAP_ADDR_TYPE_INTER ((uint32_t) 1U) |
Intermediate addressing
#define CSL_UDMAP_ADDR_TYPE_VIRT ((uint32_t) 2U) |
Virtual addressing
#define CSL_UDMAP_CHAN_TYPE_REF_PKT_RING ((uint32_t) 2U) |
RM, Packet Mode, Pass by reference
#define CSL_UDMAP_CHAN_TYPE_REF_PKTSB_QUEUE ((uint32_t) 3U) |
QM, Packet Single Buffer Mode, Pass by reference
#define CSL_UDMAP_CHAN_TYPE_REF_TR_RING ((uint32_t) 10U) |
RM, TR Mode, Pass by reference
#define CSL_UDMAP_CHAN_TYPE_VAL_TR_RING ((uint32_t) 11U) |
RM, TR Mode, Direct 'value' mode
#define CSL_UDMAP_CHAN_TYPE_COPY_REF_TR_RING ((uint32_t) 12U) |
RM, TR Mode, Block Copy, Pass by reference
#define CSL_UDMAP_CHAN_TYPE_COPY_VAL_TR_RING ((uint32_t) 13U) |
RM, TR Mode, Block Copy, Direct 'value' mode
#define CSL_UDMAP_TAG_SELECT_NO_OVERWRITE ((uint32_t) 0U) |
Do not overwrite
#define CSL_UDMAP_TAG_SELECT_OVERWRITE_WITH_VAL ((uint32_t) 1U) |
Overwrite with value given in tag value
#define CSL_UDMAP_TAG_SELECT_OVERWRITE_WITH_FLOWID_7_0 ((uint32_t) 2U) |
Overwrite with flow_id[7:0] from back-end
#define CSL_UDMAP_TAG_SELECT_OVERWRITE_WITH_FLOWID_15_8 ((uint32_t) 3U) |
Overwrite with flow_id[15:8] from back-end
#define CSL_UDMAP_TAG_SELECT_OVERWRITE_WITH_TAG_7_0 ((uint32_t) 4U) |
Overwrite with tag[7:0] from back-end
#define CSL_UDMAP_TAG_SELECT_OVERWRITE_WITH_TAG_15_8 ((uint32_t) 5U) |
Overwrite with tag[15:8] from back-end
#define CSL_UDMAP_TAG_SELECT_INVALID ((uint32_t) 6U) |
Invalid
#define CSL_UDMAP_CHAN_SCHED_PRI_HIGH ((uint32_t) 0U) |
High priority
#define CSL_UDMAP_CHAN_SCHED_PRI_MED_HIGH ((uint32_t) 1U) |
Medium-High priority
#define CSL_UDMAP_CHAN_SCHED_PRI_MED_LOW ((uint32_t) 2U) |
Medium-Low priority
#define CSL_UDMAP_CHAN_SCHED_PRI_LOW ((uint32_t) 3U) |
Low priority
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_EDC (((uint64_t)1U)<<63) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_STATS (((uint64_t)1U)<<62) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_PROXY (((uint64_t)1U)<<61) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_PSILIF (((uint64_t)1U)<<60) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_P2P (((uint64_t)1U)<<59) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_EPSILIF (((uint64_t)1U)<<58) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_EHANDLER (((uint64_t)1U)<<57) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RINGPEND (((uint64_t)1U)<<56) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_PER_CHANNEL_FIFO (((uint64_t)1U)<<55) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_PER_CHANNEL_FIFO (((uint64_t)1U)<<54) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_PREFETCH_CFG (((uint64_t)1U)<<53) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_PREFETCH_CFG (((uint64_t)1U)<<52) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_PM_TX_PACKET_DMA_UNIT (((uint64_t)1U)<<51) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_CFG_STATE_RAM_BLK (((uint64_t)1U)<<50) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_PREFETCH_BUFFER (((uint64_t)1U)<<49) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_PREFETCH_BUFFER (((uint64_t)1U)<<48) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_FLOW_FIREWALL (((uint64_t)1U)<<47) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_EXTERNAL_CHANNEL_COHERENCY_UNIT (((uint64_t)1U)<<46) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_PACKET_COHERENCY_UNIT (((uint64_t)1U)<<45) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_PACKET_COHERENCY_UNIT (((uint64_t)1U)<<44) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_TR_COHERENCY_UNIT (((uint64_t)1U)<<43) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_TR_COHERENCY_UNIT (((uint64_t)1U)<<42) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_EVENT_COHERENCY_UNIT (((uint64_t)1U)<<41) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_EVENT_COHERENCY_UNIT (((uint64_t)1U)<<40) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_UTC_WRITE_UNIT3 (((uint64_t)1U)<<39) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_UTC_WRITE_UNIT2 (((uint64_t)1U)<<38) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_UTC_WRITE_UNIT1 (((uint64_t)1U)<<37) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_UTC_WRITE_UNIT0 (((uint64_t)1U)<<36) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_UTC_READ_UNIT3 (((uint64_t)1U)<<35) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_UTC_READ_UNIT2 (((uint64_t)1U)<<34) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_UTC_READ_UNIT1 (((uint64_t)1U)<<33) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_UTC_READ_UNIT0 (((uint64_t)1U)<<32) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_PACKET_DMA_UNIT3 (((uint64_t)1U)<<31) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_PACKET_DMA_UNIT2 (((uint64_t)1U)<<30) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_PACKET_DMA_UNIT1 (((uint64_t)1U)<<29) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_PACKET_DMA_UNIT0 (((uint64_t)1U)<<28) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_PACKET_DMA_UNIT3 (((uint64_t)1U)<<27) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_PACKET_DMA_UNIT2 (((uint64_t)1U)<<26) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_PACKET_DMA_UNIT1 (((uint64_t)1U)<<25) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_PACKET_DMA_UNIT0 (((uint64_t)1U)<<24) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_PREFETCH_UNIT3 (((uint64_t)1U)<<23) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_PREFETCH_UNIT2 (((uint64_t)1U)<<22) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_PREFETCH_UNIT1 (((uint64_t)1U)<<21) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RX_PREFETCH_UNIT0 (((uint64_t)1U)<<20) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_PREFETCH_UNIT3 (((uint64_t)1U)<<19) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_PREFETCH_UNIT2 (((uint64_t)1U)<<18) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_PREFETCH_UNIT1 (((uint64_t)1U)<<17) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_TX_PREFETCH_UNIT0 (((uint64_t)1U)<<16) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RSVD3 (((uint64_t)1U)<<15) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_READ_DECODER2 (((uint64_t)1U)<<14) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_READ_DECODER1 (((uint64_t)1U)<<13) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_READ_DECODER0 (((uint64_t)1U)<<12) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_WRITE_STATUS_DECODER3 (((uint64_t)1U)<<11) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RSVD2 (((uint64_t)1U)<<10) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_WRITE_STATUS_DECODER1 (((uint64_t)1U)<<9) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_WRITE_STATUS_DECODER0 (((uint64_t)1U)<<8) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_WRITE_ARBITER3 (((uint64_t)1U)<<7) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_RSVD1 (((uint64_t)1U)<<6) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_WRITE_ARBITER1 (((uint64_t)1U)<<5) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_WRITE_ARBITER0 (((uint64_t)1U)<<4) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_COMMAND_ARBITER3 (((uint64_t)1U)<<3) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_COMMAND_ARBITER2 (((uint64_t)1U)<<2) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_COMMAND_ARBITER1 (((uint64_t)1U)<<1) |
#define CSL_UDMAP_AUTO_CLKGATE_BLOCK_COMMAND_ARBITER0 (((uint64_t)1U)<<0) |
#define CSL_UDMAP_MASTER_INTERFACE_PKTDMA_0 ((uint32_t) 0U) |
Packet DMA Master Read/Write Interface 0
#define CSL_UDMAP_MASTER_INTERFACE_PKTDMA_1 ((uint32_t) 1U) |
Packet DMA Master Read/Write Interface 1
#define CSL_UDMAP_MASTER_INTERFACE_UTC_READ ((uint32_t) 2U) |
Unified Transfer Controller (UTC) Master Read Interface
#define CSL_UDMAP_MASTER_INTERFACE_UTC_WRITE ((uint32_t) 3U) |
Unified Transfer Controller (UTC) Master Write Interface
typedef uint32_t CSL_UdmapChanDir |
typedef uint32_t CSL_UdmapChanBurstSize |
typedef uint32_t CSL_UdmapDescType |
typedef uint32_t CSL_UdmapPsLoc |
typedef uint32_t CSL_UdmapAddrType |
typedef uint32_t CSL_UdmapChanType |
typedef uint32_t CSL_UdmapTagSelect |
typedef uint32_t CSL_UdmapChanSchedPri |
typedef uint64_t CSL_UdmapAutoClkgateBlock |
typedef uint32_t CSL_UdmapMasterInterface |