PDK API Guide for J721E
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Files | |
file | csl_clec.h |
This is the include file for the CLEC CSL-FL module. | |
Data Structures | |
struct | CSL_ClecEventConfig |
This structure contains the parameters to setup a event. More... | |
Functions | |
int32_t | CSL_clecConfigEvent (CSL_CLEC_EVTRegs *pRegs, uint32_t evtNum, const CSL_ClecEventConfig *evtCfg) |
This API sets the event configuration. More... | |
int32_t | CSL_clecSendEvent (CSL_CLEC_EVTRegs *pRegs, uint32_t evtNum) |
This API sends the event specified if the event send is enabled in the event configuration (evtSendEnable) and the output event generated depends on the rtMap, extEvtNum and c7xEvtNum. More... | |
int32_t | CSL_clecClearEvent (CSL_CLEC_EVTRegs *pRegs, uint32_t evtNum) |
This API clear any level interrupt set for the event. More... | |
int32_t | CSL_clecConfigEventLevel (CSL_CLEC_EVTRegs *pRegs, uint32_t evtNum, uint32_t is_level) |
This API does a set or clear of the is_lvl field in CLEC.MRR register. More... | |
Macros | |
#define | CSL_CLEC_MAX_EVT_IN (2047U) |
Maximum number of input events supported by CLEC. This is just the maximum registers supported for programming. The actual event supported depends on the SOC. More... | |
#define | CSL_CLEC_MAX_EXT_EVT_OUT (128U) |
Maximum external events. More... | |
#define | CSL_CLEC_MAX_C7X_EVT_OUT (64U) |
Maximum C7x events. More... | |
typedef | __attribute__ |
CLEC route map - Determines where the event will be routed. | |
Note: All the cores may not be present in a particular SOC. The CSL-FL is provided to support the IP feature and hence all possible setting is provided. Also the meaning of each core is SOC dependent. Refer to SOC information to know the exact mapping. | |
#define | CSL_CLEC_RTMAP_DISABLE ((uint32_t)((uint32_t) 0x0001U) << 0U) |
Send event to None. More... | |
#define | CSL_CLEC_RTMAP_SYS ((uint32_t)((uint32_t) 0x0001U) << 1U) |
Send event to SOC as Compute Cluster interrupt output. More... | |
#define | CSL_CLEC_RTMAP_CPU_0 ((uint32_t)((uint32_t) 0x0000U) << 2U) |
Send event to CPU 0 - Typically reserved for ARM. More... | |
#define | CSL_CLEC_RTMAP_CPU_1 ((uint32_t)((uint32_t) 0x0001U) << 2U) |
Send event to CPU 1 - Typically reserved for ARM. More... | |
#define | CSL_CLEC_RTMAP_CPU_2 ((uint32_t)((uint32_t) 0x0002U) << 2U) |
Send event to CPU 2 - Typically reserved for ARM. More... | |
#define | CSL_CLEC_RTMAP_CPU_3 ((uint32_t)((uint32_t) 0x0003U) << 2U) |
Send event to CPU 3 - Typically reserved for ARM. More... | |
#define | CSL_CLEC_RTMAP_CPU_4 ((uint32_t)((uint32_t) 0x0004U) << 2U) |
Send event to CPU 4 - Typically C7x core starts from this. More... | |
#define | CSL_CLEC_RTMAP_CPU_5 ((uint32_t)((uint32_t) 0x0005U) << 2U) |
Send event to CPU 5. More... | |
#define | CSL_CLEC_RTMAP_CPU_6 ((uint32_t)((uint32_t) 0x0006U) << 2U) |
Send event to CPU 6. More... | |
#define | CSL_CLEC_RTMAP_CPU_7 ((uint32_t)((uint32_t) 0x0007U) << 2U) |
Send event to CPU 7. More... | |
#define | CSL_CLEC_RTMAP_CPU_8 ((uint32_t)((uint32_t) 0x0008U) << 2U) |
Send event to CPU 8. More... | |
#define | CSL_CLEC_RTMAP_CPU_9 ((uint32_t)((uint32_t) 0x0009U) << 2U) |
Send event to CPU 9. More... | |
#define | CSL_CLEC_RTMAP_CPU_10 ((uint32_t)((uint32_t) 0x000AU) << 2U) |
Send event to CPU 10. More... | |
#define | CSL_CLEC_RTMAP_CPU_ALL ((uint32_t)((uint32_t) 0x000FU) << 2U) |
Send event to All CPU. More... | |
#define CSL_CLEC_MAX_EVT_IN (2047U) |
Maximum number of input events supported by CLEC. This is just the maximum registers supported for programming. The actual event supported depends on the SOC.
#define CSL_CLEC_MAX_EXT_EVT_OUT (128U) |
Maximum external events.
#define CSL_CLEC_MAX_C7X_EVT_OUT (64U) |
Maximum C7x events.
#define CSL_CLEC_RTMAP_DISABLE ((uint32_t)((uint32_t) 0x0001U) << 0U) |
Send event to None.
#define CSL_CLEC_RTMAP_SYS ((uint32_t)((uint32_t) 0x0001U) << 1U) |
Send event to SOC as Compute Cluster interrupt output.
#define CSL_CLEC_RTMAP_CPU_0 ((uint32_t)((uint32_t) 0x0000U) << 2U) |
Send event to CPU 0 - Typically reserved for ARM.
#define CSL_CLEC_RTMAP_CPU_1 ((uint32_t)((uint32_t) 0x0001U) << 2U) |
Send event to CPU 1 - Typically reserved for ARM.
#define CSL_CLEC_RTMAP_CPU_2 ((uint32_t)((uint32_t) 0x0002U) << 2U) |
Send event to CPU 2 - Typically reserved for ARM.
#define CSL_CLEC_RTMAP_CPU_3 ((uint32_t)((uint32_t) 0x0003U) << 2U) |
Send event to CPU 3 - Typically reserved for ARM.
#define CSL_CLEC_RTMAP_CPU_4 ((uint32_t)((uint32_t) 0x0004U) << 2U) |
Send event to CPU 4 - Typically C7x core starts from this.
#define CSL_CLEC_RTMAP_CPU_5 ((uint32_t)((uint32_t) 0x0005U) << 2U) |
Send event to CPU 5.
#define CSL_CLEC_RTMAP_CPU_6 ((uint32_t)((uint32_t) 0x0006U) << 2U) |
Send event to CPU 6.
#define CSL_CLEC_RTMAP_CPU_7 ((uint32_t)((uint32_t) 0x0007U) << 2U) |
Send event to CPU 7.
#define CSL_CLEC_RTMAP_CPU_8 ((uint32_t)((uint32_t) 0x0008U) << 2U) |
Send event to CPU 8.
#define CSL_CLEC_RTMAP_CPU_9 ((uint32_t)((uint32_t) 0x0009U) << 2U) |
Send event to CPU 9.
#define CSL_CLEC_RTMAP_CPU_10 ((uint32_t)((uint32_t) 0x000AU) << 2U) |
Send event to CPU 10.
#define CSL_CLEC_RTMAP_CPU_ALL ((uint32_t)((uint32_t) 0x000FU) << 2U) |
Send event to All CPU.
int32_t CSL_clecConfigEvent | ( | CSL_CLEC_EVTRegs * | pRegs, |
uint32_t | evtNum, | ||
const CSL_ClecEventConfig * | evtCfg | ||
) |
This API sets the event configuration.
pRegs | [IN] CLEC register base. |
evtNum | [IN] CLEC event number 0 to (CSL_CLEC_MAX_EVT_IN - 1). |
evtCfg | [IN] Pointer to event configuration. |
int32_t CSL_clecSendEvent | ( | CSL_CLEC_EVTRegs * | pRegs, |
uint32_t | evtNum | ||
) |
This API sends the event specified if the event send is enabled in the event configuration (evtSendEnable) and the output event generated depends on the rtMap, extEvtNum and c7xEvtNum.
pRegs | [IN] CLEC register base. |
evtNum | [IN] CLEC event number 0 to (CSL_CLEC_MAX_EVT_IN - 1). |
int32_t CSL_clecClearEvent | ( | CSL_CLEC_EVTRegs * | pRegs, |
uint32_t | evtNum | ||
) |
This API clear any level interrupt set for the event.
pRegs | [IN] CLEC register base. |
evtNum | [IN] CLEC event number 0 to (CSL_CLEC_MAX_EVT_IN - 1). |
int32_t CSL_clecConfigEventLevel | ( | CSL_CLEC_EVTRegs * | pRegs, |
uint32_t | evtNum, | ||
uint32_t | is_level | ||
) |
This API does a set or clear of the is_lvl field in CLEC.MRR register.
pRegs | [IN] CLEC register base. |
evtNum | [IN] CLEC event number 0 to (CSL_CLEC_MAX_EVT_IN - 1). |
is_level | [IN] 0: is_lvl field is set to 0, i.e pulse interrupt, 1: is_lvl field is set to 1, i.e level interrupt |