Data Structures
struct	CSL_csirxRegs

Macros
#define	CSL_CSIRX_DEVICE_CONFIG (0x00000000U)

#define	CSL_CSIRX_SOFT_RESET (0x00000004U)

#define	CSL_CSIRX_STATIC_CFG (0x00000008U)

#define	CSL_CSIRX_ERROR_BYPASS_CFG (0x00000010U)

#define	CSL_CSIRX_MONITOR_IRQS (0x00000018U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG (0x0000001CU)

#define	CSL_CSIRX_INFO_IRQS (0x00000020U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG (0x00000024U)

#define	CSL_CSIRX_ERROR_IRQS (0x00000028U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG (0x0000002CU)

#define	CSL_CSIRX_DPHY_LANE_CONTROL (0x00000040U)

#define	CSL_CSIRX_DPHY_STATUS (0x00000048U)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ (0x0000004CU)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG (0x00000050U)

#define	CSL_CSIRX_INTEGRATION_DEBUG (0x00000060U)

#define	CSL_CSIRX_ERROR_DEBUG (0x00000074U)

#define	CSL_CSIRX_TEST_GENERIC (0x00000080U)

#define	CSL_CSIRX_STREAM0_CTRL (0x00000100U)

#define	CSL_CSIRX_STREAM0_STATUS (0x00000104U)

#define	CSL_CSIRX_STREAM0_DATA_CFG (0x00000108U)

#define	CSL_CSIRX_STREAM0_CFG (0x0000010CU)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL (0x00000110U)

#define	CSL_CSIRX_STREAM0_MONITOR_FRAME (0x00000114U)

#define	CSL_CSIRX_STREAM0_MONITOR_LB (0x00000118U)

#define	CSL_CSIRX_STREAM0_TIMER (0x0000011CU)

#define	CSL_CSIRX_STREAM0_FCC_CFG (0x00000120U)

#define	CSL_CSIRX_STREAM0_FCC_CTRL (0x00000124U)

#define	CSL_CSIRX_STREAM0_FIFO_FILL_LVL (0x00000128U)

#define	CSL_CSIRX_STREAM1_CTRL (0x00000200U)

#define	CSL_CSIRX_STREAM1_STATUS (0x00000204U)

#define	CSL_CSIRX_STREAM1_DATA_CFG (0x00000208U)

#define	CSL_CSIRX_STREAM1_CFG (0x0000020CU)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL (0x00000210U)

#define	CSL_CSIRX_STREAM1_MONITOR_FRAME (0x00000214U)

#define	CSL_CSIRX_STREAM1_MONITOR_LB (0x00000218U)

#define	CSL_CSIRX_STREAM1_TIMER (0x0000021CU)

#define	CSL_CSIRX_STREAM1_FCC_CFG (0x00000220U)

#define	CSL_CSIRX_STREAM1_FCC_CTRL (0x00000224U)

#define	CSL_CSIRX_STREAM1_FIFO_FILL_LVL (0x00000228U)

#define	CSL_CSIRX_STREAM2_CTRL (0x00000300U)

#define	CSL_CSIRX_STREAM2_STATUS (0x00000304U)

#define	CSL_CSIRX_STREAM2_DATA_CFG (0x00000308U)

#define	CSL_CSIRX_STREAM2_CFG (0x0000030CU)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL (0x00000310U)

#define	CSL_CSIRX_STREAM2_MONITOR_FRAME (0x00000314U)

#define	CSL_CSIRX_STREAM2_MONITOR_LB (0x00000318U)

#define	CSL_CSIRX_STREAM2_TIMER (0x0000031CU)

#define	CSL_CSIRX_STREAM2_FCC_CFG (0x00000320U)

#define	CSL_CSIRX_STREAM2_FCC_CTRL (0x00000324U)

#define	CSL_CSIRX_STREAM2_FIFO_FILL_LVL (0x00000328U)

#define	CSL_CSIRX_STREAM3_CTRL (0x00000400U)

#define	CSL_CSIRX_STREAM3_STATUS (0x00000404U)

#define	CSL_CSIRX_STREAM3_DATA_CFG (0x00000408U)

#define	CSL_CSIRX_STREAM3_CFG (0x0000040CU)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL (0x00000410U)

#define	CSL_CSIRX_STREAM3_MONITOR_FRAME (0x00000414U)

#define	CSL_CSIRX_STREAM3_MONITOR_LB (0x00000418U)

#define	CSL_CSIRX_STREAM3_TIMER (0x0000041CU)

#define	CSL_CSIRX_STREAM3_FCC_CFG (0x00000420U)

#define	CSL_CSIRX_STREAM3_FCC_CTRL (0x00000424U)

#define	CSL_CSIRX_STREAM3_FIFO_FILL_LVL (0x00000428U)

#define	CSL_CSIRX_ASF_INT_STATUS (0x00000900U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS (0x00000904U)

#define	CSL_CSIRX_ASF_INT_MASK (0x00000908U)

#define	CSL_CSIRX_ASF_INT_TEST (0x0000090CU)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT (0x00000910U)

#define	CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS (0x00000920U)

#define	CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS (0x00000924U)

#define	CSL_CSIRX_ASF_SRAM_FAULT_STATS (0x00000928U)

#define	CSL_CSIRX_ASF_TRANS_TO_CTRL (0x00000930U)

#define	CSL_CSIRX_ASF_TRANS_TO_FAULT_MASK (0x00000934U)

#define	CSL_CSIRX_ASF_TRANS_TO_FAULT_STATUS (0x00000938U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK (0x00000940U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS (0x00000944U)

#define	CSL_CSIRX_ID_PROD_VER (0x00000FFCU)

#define	CSL_CSIRX_DEVICE_CONFIG_MAX_LANE_NB_MASK (0x00000007U)

#define	CSL_CSIRX_DEVICE_CONFIG_MAX_LANE_NB_SHIFT (0x00000000U)

#define	CSL_CSIRX_DEVICE_CONFIG_MAX_LANE_NB_MAX (0x00000007U)

#define	CSL_CSIRX_DEVICE_CONFIG_CDNS_PHY_PRESENT_MASK (0x00000008U)

#define	CSL_CSIRX_DEVICE_CONFIG_CDNS_PHY_PRESENT_SHIFT (0x00000003U)

#define	CSL_CSIRX_DEVICE_CONFIG_CDNS_PHY_PRESENT_MAX (0x00000001U)

#define	CSL_CSIRX_DEVICE_CONFIG_NUM_STREAMS_MASK (0x00000070U)

#define	CSL_CSIRX_DEVICE_CONFIG_NUM_STREAMS_SHIFT (0x00000004U)

#define	CSL_CSIRX_DEVICE_CONFIG_NUM_STREAMS_MAX (0x00000007U)

#define	CSL_CSIRX_DEVICE_CONFIG_DATAPATH_SIZE_MASK (0x00000180U)

#define	CSL_CSIRX_DEVICE_CONFIG_DATAPATH_SIZE_SHIFT (0x00000007U)

#define	CSL_CSIRX_DEVICE_CONFIG_DATAPATH_SIZE_MAX (0x00000003U)

#define	CSL_CSIRX_DEVICE_CONFIG_VCX_CONFIG_MASK (0x00000200U)

#define	CSL_CSIRX_DEVICE_CONFIG_VCX_CONFIG_SHIFT (0x00000009U)

#define	CSL_CSIRX_DEVICE_CONFIG_VCX_CONFIG_MAX (0x00000001U)

#define	CSL_CSIRX_DEVICE_CONFIG_ASF_CONFIG_MASK (0x00000400U)

#define	CSL_CSIRX_DEVICE_CONFIG_ASF_CONFIG_SHIFT (0x0000000AU)

#define	CSL_CSIRX_DEVICE_CONFIG_ASF_CONFIG_MAX (0x00000001U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM0_FIFO_MODE_MASK (0x00003000U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM0_FIFO_MODE_SHIFT (0x0000000CU)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM0_FIFO_MODE_MAX (0x00000003U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM0_NUM_PIXELS_MASK (0x0000C000U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM0_NUM_PIXELS_SHIFT (0x0000000EU)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM0_NUM_PIXELS_MAX (0x00000003U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM0_MONITOR_PRESENT_MASK (0x00010000U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM0_MONITOR_PRESENT_SHIFT (0x00000010U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM0_MONITOR_PRESENT_MAX (0x00000001U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM1_FIFO_MODE_MASK (0x00060000U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM1_FIFO_MODE_SHIFT (0x00000011U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM1_FIFO_MODE_MAX (0x00000003U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM1_NUM_PIXELS_MASK (0x00180000U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM1_NUM_PIXELS_SHIFT (0x00000013U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM1_NUM_PIXELS_MAX (0x00000003U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM1_MONITOR_PRESENT_MASK (0x00200000U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM1_MONITOR_PRESENT_SHIFT (0x00000015U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM1_MONITOR_PRESENT_MAX (0x00000001U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM2_FIFO_MODE_MASK (0x00C00000U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM2_FIFO_MODE_SHIFT (0x00000016U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM2_FIFO_MODE_MAX (0x00000003U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM2_NUM_PIXELS_MASK (0x03000000U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM2_NUM_PIXELS_SHIFT (0x00000018U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM2_NUM_PIXELS_MAX (0x00000003U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM2_MONITOR_PRESENT_MASK (0x04000000U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM2_MONITOR_PRESENT_SHIFT (0x0000001AU)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM2_MONITOR_PRESENT_MAX (0x00000001U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM3_FIFO_MODE_MASK (0x18000000U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM3_FIFO_MODE_SHIFT (0x0000001BU)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM3_FIFO_MODE_MAX (0x00000003U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM3_NUM_PIXELS_MASK (0x60000000U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM3_NUM_PIXELS_SHIFT (0x0000001DU)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM3_NUM_PIXELS_MAX (0x00000003U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM3_MONITOR_PRESENT_MASK (0x80000000U)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM3_MONITOR_PRESENT_SHIFT (0x0000001FU)

#define	CSL_CSIRX_DEVICE_CONFIG_STREAM3_MONITOR_PRESENT_MAX (0x00000001U)

#define	CSL_CSIRX_SOFT_RESET_FRONT_MASK (0x00000001U)

#define	CSL_CSIRX_SOFT_RESET_FRONT_SHIFT (0x00000000U)

#define	CSL_CSIRX_SOFT_RESET_FRONT_MAX (0x00000001U)

#define	CSL_CSIRX_SOFT_RESET_PROTOCOL_MASK (0x00000002U)

#define	CSL_CSIRX_SOFT_RESET_PROTOCOL_SHIFT (0x00000001U)

#define	CSL_CSIRX_SOFT_RESET_PROTOCOL_MAX (0x00000001U)

#define	CSL_CSIRX_STATIC_CFG_SEL_MASK (0x00000003U)

#define	CSL_CSIRX_STATIC_CFG_SEL_SHIFT (0x00000000U)

#define	CSL_CSIRX_STATIC_CFG_SEL_MAX (0x00000003U)

#define	CSL_CSIRX_STATIC_CFG_V2P0_SUPPORT_ENABLE_MASK (0x00000010U)

#define	CSL_CSIRX_STATIC_CFG_V2P0_SUPPORT_ENABLE_SHIFT (0x00000004U)

#define	CSL_CSIRX_STATIC_CFG_V2P0_SUPPORT_ENABLE_MAX (0x00000001U)

#define	CSL_CSIRX_STATIC_CFG_LANE_NB_MASK (0x00000700U)

#define	CSL_CSIRX_STATIC_CFG_LANE_NB_SHIFT (0x00000008U)

#define	CSL_CSIRX_STATIC_CFG_LANE_NB_MAX (0x00000007U)

#define	CSL_CSIRX_STATIC_CFG_DL0_MAP_MASK (0x00070000U)

#define	CSL_CSIRX_STATIC_CFG_DL0_MAP_SHIFT (0x00000010U)

#define	CSL_CSIRX_STATIC_CFG_DL0_MAP_MAX (0x00000007U)

#define	CSL_CSIRX_STATIC_CFG_DL1_MAP_MASK (0x00700000U)

#define	CSL_CSIRX_STATIC_CFG_DL1_MAP_SHIFT (0x00000014U)

#define	CSL_CSIRX_STATIC_CFG_DL1_MAP_MAX (0x00000007U)

#define	CSL_CSIRX_STATIC_CFG_DL2_MAP_MASK (0x07000000U)

#define	CSL_CSIRX_STATIC_CFG_DL2_MAP_SHIFT (0x00000018U)

#define	CSL_CSIRX_STATIC_CFG_DL2_MAP_MAX (0x00000007U)

#define	CSL_CSIRX_STATIC_CFG_DL3_MAP_MASK (0x70000000U)

#define	CSL_CSIRX_STATIC_CFG_DL3_MAP_SHIFT (0x0000001CU)

#define	CSL_CSIRX_STATIC_CFG_DL3_MAP_MAX (0x00000007U)

#define	CSL_CSIRX_ERROR_BYPASS_CFG_CRC_MASK (0x00000001U)

#define	CSL_CSIRX_ERROR_BYPASS_CFG_CRC_SHIFT (0x00000000U)

#define	CSL_CSIRX_ERROR_BYPASS_CFG_CRC_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_BYPASS_CFG_ECC_MASK (0x00000002U)

#define	CSL_CSIRX_ERROR_BYPASS_CFG_ECC_SHIFT (0x00000001U)

#define	CSL_CSIRX_ERROR_BYPASS_CFG_ECC_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_BYPASS_CFG_DATA_ID_MASK (0x00000004U)

#define	CSL_CSIRX_ERROR_BYPASS_CFG_DATA_ID_SHIFT (0x00000002U)

#define	CSL_CSIRX_ERROR_BYPASS_CFG_DATA_ID_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_TIMER_IRQ_MASK (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_TIMER_IRQ_SHIFT (0x00000000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_TIMER_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_LB_IRQ_MASK (0x00000002U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_LB_IRQ_SHIFT (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_LB_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_IRQ_MASK (0x00000004U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_IRQ_SHIFT (0x00000002U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_START_IRQ_MASK (0x00000008U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_START_IRQ_SHIFT (0x00000003U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_START_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_STOP_IRQ_MASK (0x00000010U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_STOP_IRQ_SHIFT (0x00000004U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_STOP_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_CNT_ERROR_IRQ_MASK (0x00000020U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_CNT_ERROR_IRQ_SHIFT (0x00000005U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_CNT_ERROR_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_MISMATCH_IRQ_MASK (0x00000040U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_MISMATCH_IRQ_SHIFT (0x00000006U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_MISMATCH_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_LINE_CNT_ERROR_IRQ_MASK (0x00000080U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_LINE_CNT_ERROR_IRQ_SHIFT (0x00000007U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM0_LINE_CNT_ERROR_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_TIMER_IRQ_MASK (0x00000100U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_TIMER_IRQ_SHIFT (0x00000008U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_TIMER_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_LB_IRQ_MASK (0x00000200U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_LB_IRQ_SHIFT (0x00000009U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_LB_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_IRQ_MASK (0x00000400U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_IRQ_SHIFT (0x0000000AU)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_START_IRQ_MASK (0x00000800U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_START_IRQ_SHIFT (0x0000000BU)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_START_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_STOP_IRQ_MASK (0x00001000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_STOP_IRQ_SHIFT (0x0000000CU)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_STOP_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_CNT_ERROR_IRQ_MASK (0x00002000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_CNT_ERROR_IRQ_SHIFT (0x0000000DU)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_CNT_ERROR_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_MISMATCH_IRQ_MASK (0x00004000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_MISMATCH_IRQ_SHIFT (0x0000000EU)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_MISMATCH_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_LINE_CNT_ERROR_IRQ_MASK (0x00008000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_LINE_CNT_ERROR_IRQ_SHIFT (0x0000000FU)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM1_LINE_CNT_ERROR_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_TIMER_IRQ_MASK (0x00010000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_TIMER_IRQ_SHIFT (0x00000010U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_TIMER_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_LB_IRQ_MASK (0x00020000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_LB_IRQ_SHIFT (0x00000011U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_LB_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_IRQ_MASK (0x00040000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_IRQ_SHIFT (0x00000012U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_START_IRQ_MASK (0x00080000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_START_IRQ_SHIFT (0x00000013U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_START_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_STOP_IRQ_MASK (0x00100000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_STOP_IRQ_SHIFT (0x00000014U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_STOP_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_CNT_ERROR_IRQ_MASK (0x00200000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_CNT_ERROR_IRQ_SHIFT (0x00000015U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_CNT_ERROR_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_MISMATCH_IRQ_MASK (0x00400000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_MISMATCH_IRQ_SHIFT (0x00000016U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_MISMATCH_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_LINE_CNT_ERROR_IRQ_MASK (0x00800000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_LINE_CNT_ERROR_IRQ_SHIFT (0x00000017U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM2_LINE_CNT_ERROR_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_TIMER_IRQ_MASK (0x01000000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_TIMER_IRQ_SHIFT (0x00000018U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_TIMER_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_LB_IRQ_MASK (0x02000000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_LB_IRQ_SHIFT (0x00000019U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_LB_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_IRQ_MASK (0x04000000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_IRQ_SHIFT (0x0000001AU)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_START_IRQ_MASK (0x08000000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_START_IRQ_SHIFT (0x0000001BU)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_START_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_STOP_IRQ_MASK (0x10000000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_STOP_IRQ_SHIFT (0x0000001CU)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_STOP_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_CNT_ERROR_IRQ_MASK (0x20000000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_CNT_ERROR_IRQ_SHIFT (0x0000001DU)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_CNT_ERROR_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_MISMATCH_IRQ_MASK (0x40000000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_MISMATCH_IRQ_SHIFT (0x0000001EU)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_MISMATCH_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_LINE_CNT_ERROR_IRQ_MASK (0x80000000U)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_LINE_CNT_ERROR_IRQ_SHIFT (0x0000001FU)

#define	CSL_CSIRX_MONITOR_IRQS_STREAM3_LINE_CNT_ERROR_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_TIMER_IRQM_MASK (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_TIMER_IRQM_SHIFT (0x00000000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_TIMER_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LB_IRQM_MASK (0x00000002U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LB_IRQM_SHIFT (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LB_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_IRQM_MASK (0x00000004U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_IRQM_SHIFT (0x00000002U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_START_IRQM_MASK (0x00000008U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_START_IRQM_SHIFT (0x00000003U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_START_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_STOP_IRQM_MASK (0x00000010U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_STOP_IRQM_SHIFT (0x00000004U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_STOP_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_CNT_ERROR_IRQM_MASK (0x00000020U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_CNT_ERROR_IRQM_SHIFT (0x00000005U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_CNT_ERROR_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_MISMATCH_IRQM_MASK (0x00000040U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_MISMATCH_IRQM_SHIFT (0x00000006U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_MISMATCH_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LINE_CNT_ERROR_IRQM_MASK (0x00000080U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LINE_CNT_ERROR_IRQM_SHIFT (0x00000007U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LINE_CNT_ERROR_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_TIMER_IRQM_MASK (0x00000100U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_TIMER_IRQM_SHIFT (0x00000008U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_TIMER_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LB_IRQM_MASK (0x00000200U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LB_IRQM_SHIFT (0x00000009U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LB_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_IRQM_MASK (0x00000400U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_IRQM_SHIFT (0x0000000AU)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_START_IRQM_MASK (0x00000800U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_START_IRQM_SHIFT (0x0000000BU)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_START_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_STOP_IRQM_MASK (0x00001000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_STOP_IRQM_SHIFT (0x0000000CU)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_STOP_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_CNT_ERROR_IRQM_MASK (0x00002000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_CNT_ERROR_IRQM_SHIFT (0x0000000DU)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_CNT_ERROR_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_MISMATCH_IRQM_MASK (0x00004000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_MISMATCH_IRQM_SHIFT (0x0000000EU)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_MISMATCH_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LINE_CNT_ERROR_IRQM_MASK (0x00008000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LINE_CNT_ERROR_IRQM_SHIFT (0x0000000FU)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LINE_CNT_ERROR_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_TIMER_IRQM_MASK (0x00010000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_TIMER_IRQM_SHIFT (0x00000010U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_TIMER_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LB_IRQM_MASK (0x00020000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LB_IRQM_SHIFT (0x00000011U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LB_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_IRQM_MASK (0x00040000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_IRQM_SHIFT (0x00000012U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_START_IRQM_MASK (0x00080000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_START_IRQM_SHIFT (0x00000013U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_START_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_STOP_IRQM_MASK (0x00100000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_STOP_IRQM_SHIFT (0x00000014U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_STOP_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_CNT_ERROR_IRQM_MASK (0x00200000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_CNT_ERROR_IRQM_SHIFT (0x00000015U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_CNT_ERROR_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_MISMATCH_IRQM_MASK (0x00400000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_MISMATCH_IRQM_SHIFT (0x00000016U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_MISMATCH_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LINE_CNT_ERROR_IRQM_MASK (0x00800000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LINE_CNT_ERROR_IRQM_SHIFT (0x00000017U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LINE_CNT_ERROR_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_TIMER_IRQM_MASK (0x01000000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_TIMER_IRQM_SHIFT (0x00000018U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_TIMER_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LB_IRQM_MASK (0x02000000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LB_IRQM_SHIFT (0x00000019U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LB_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_IRQM_MASK (0x04000000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_IRQM_SHIFT (0x0000001AU)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_START_IRQM_MASK (0x08000000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_START_IRQM_SHIFT (0x0000001BU)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_START_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_STOP_IRQM_MASK (0x10000000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_STOP_IRQM_SHIFT (0x0000001CU)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_STOP_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_CNT_ERROR_IRQM_MASK (0x20000000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_CNT_ERROR_IRQM_SHIFT (0x0000001DU)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_CNT_ERROR_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_MISMATCH_IRQM_MASK (0x40000000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_MISMATCH_IRQM_SHIFT (0x0000001EU)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_MISMATCH_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LINE_CNT_ERROR_IRQM_MASK (0x80000000U)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LINE_CNT_ERROR_IRQM_SHIFT (0x0000001FU)

#define	CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LINE_CNT_ERROR_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_SP_RCVD_IRQ_MASK (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_SP_RCVD_IRQ_SHIFT (0x00000000U)

#define	CSL_CSIRX_INFO_IRQS_SP_RCVD_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_LP_RCVD_IRQ_MASK (0x00000002U)

#define	CSL_CSIRX_INFO_IRQS_LP_RCVD_IRQ_SHIFT (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_LP_RCVD_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_SLEEP_IRQ_MASK (0x00000004U)

#define	CSL_CSIRX_INFO_IRQS_SLEEP_IRQ_SHIFT (0x00000002U)

#define	CSL_CSIRX_INFO_IRQS_SLEEP_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_WAKEUP_IRQ_MASK (0x00000008U)

#define	CSL_CSIRX_INFO_IRQS_WAKEUP_IRQ_SHIFT (0x00000003U)

#define	CSL_CSIRX_INFO_IRQS_WAKEUP_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_ECC_SPARES_NONZERO_IRQ_MASK (0x00000010U)

#define	CSL_CSIRX_INFO_IRQS_ECC_SPARES_NONZERO_IRQ_SHIFT (0x00000004U)

#define	CSL_CSIRX_INFO_IRQS_ECC_SPARES_NONZERO_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_DESKEW_ENTRY_IRQ_MASK (0x00000020U)

#define	CSL_CSIRX_INFO_IRQS_DESKEW_ENTRY_IRQ_SHIFT (0x00000005U)

#define	CSL_CSIRX_INFO_IRQS_DESKEW_ENTRY_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_SP_GENERIC_RCVD_IRQ_MASK (0x00000040U)

#define	CSL_CSIRX_INFO_IRQS_SP_GENERIC_RCVD_IRQ_SHIFT (0x00000006U)

#define	CSL_CSIRX_INFO_IRQS_SP_GENERIC_RCVD_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_STREAM0_STOP_IRQ_MASK (0x00000080U)

#define	CSL_CSIRX_INFO_IRQS_STREAM0_STOP_IRQ_SHIFT (0x00000007U)

#define	CSL_CSIRX_INFO_IRQS_STREAM0_STOP_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_STREAM0_ABORT_IRQ_MASK (0x00000100U)

#define	CSL_CSIRX_INFO_IRQS_STREAM0_ABORT_IRQ_SHIFT (0x00000008U)

#define	CSL_CSIRX_INFO_IRQS_STREAM0_ABORT_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_STREAM1_STOP_IRQ_MASK (0x00000200U)

#define	CSL_CSIRX_INFO_IRQS_STREAM1_STOP_IRQ_SHIFT (0x00000009U)

#define	CSL_CSIRX_INFO_IRQS_STREAM1_STOP_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_STREAM1_ABORT_IRQ_MASK (0x00000400U)

#define	CSL_CSIRX_INFO_IRQS_STREAM1_ABORT_IRQ_SHIFT (0x0000000AU)

#define	CSL_CSIRX_INFO_IRQS_STREAM1_ABORT_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_STREAM2_STOP_IRQ_MASK (0x00000800U)

#define	CSL_CSIRX_INFO_IRQS_STREAM2_STOP_IRQ_SHIFT (0x0000000BU)

#define	CSL_CSIRX_INFO_IRQS_STREAM2_STOP_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_STREAM2_ABORT_IRQ_MASK (0x00001000U)

#define	CSL_CSIRX_INFO_IRQS_STREAM2_ABORT_IRQ_SHIFT (0x0000000CU)

#define	CSL_CSIRX_INFO_IRQS_STREAM2_ABORT_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_STREAM3_STOP_IRQ_MASK (0x00002000U)

#define	CSL_CSIRX_INFO_IRQS_STREAM3_STOP_IRQ_SHIFT (0x0000000DU)

#define	CSL_CSIRX_INFO_IRQS_STREAM3_STOP_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_STREAM3_ABORT_IRQ_MASK (0x00004000U)

#define	CSL_CSIRX_INFO_IRQS_STREAM3_ABORT_IRQ_SHIFT (0x0000000EU)

#define	CSL_CSIRX_INFO_IRQS_STREAM3_ABORT_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_RCVD_IRQM_MASK (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_RCVD_IRQM_SHIFT (0x00000000U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_RCVD_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_LP_RCVD_IRQM_MASK (0x00000002U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_LP_RCVD_IRQM_SHIFT (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_LP_RCVD_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_SLEEP_IRQM_MASK (0x00000004U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_SLEEP_IRQM_SHIFT (0x00000002U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_SLEEP_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_WAKEUP_IRQM_MASK (0x00000008U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_WAKEUP_IRQM_SHIFT (0x00000003U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_WAKEUP_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_ECC_SPARES_NONZERO_IRQM_MASK (0x00000010U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_ECC_SPARES_NONZERO_IRQM_SHIFT (0x00000004U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_ECC_SPARES_NONZERO_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_DESKEW_ENTRY_IRQM_MASK (0x00000020U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_DESKEW_ENTRY_IRQM_SHIFT (0x00000005U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_DESKEW_ENTRY_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_GENERIC_RCVD_IRQM_MASK (0x00000040U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_GENERIC_RCVD_IRQM_SHIFT (0x00000006U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_GENERIC_RCVD_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_STOP_IRQM_MASK (0x00000080U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_STOP_IRQM_SHIFT (0x00000007U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_STOP_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_ABORT_IRQM_MASK (0x00000100U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_ABORT_IRQM_SHIFT (0x00000008U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_ABORT_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_STOP_IRQM_MASK (0x00000200U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_STOP_IRQM_SHIFT (0x00000009U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_STOP_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_ABORT_IRQM_MASK (0x00000400U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_ABORT_IRQM_SHIFT (0x0000000AU)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_ABORT_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_STOP_IRQM_MASK (0x00000800U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_STOP_IRQM_SHIFT (0x0000000BU)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_STOP_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_ABORT_IRQM_MASK (0x00001000U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_ABORT_IRQM_SHIFT (0x0000000CU)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_ABORT_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_STOP_IRQM_MASK (0x00002000U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_STOP_IRQM_SHIFT (0x0000000DU)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_STOP_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_ABORT_IRQM_MASK (0x00004000U)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_ABORT_IRQM_SHIFT (0x0000000EU)

#define	CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_ABORT_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_FRONT_FIFO_OVERFLOW_IRQ_MASK (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_FRONT_FIFO_OVERFLOW_IRQ_SHIFT (0x00000000U)

#define	CSL_CSIRX_ERROR_IRQS_FRONT_FIFO_OVERFLOW_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_PAYLOAD_CRC_IRQ_MASK (0x00000010U)

#define	CSL_CSIRX_ERROR_IRQS_PAYLOAD_CRC_IRQ_SHIFT (0x00000004U)

#define	CSL_CSIRX_ERROR_IRQS_PAYLOAD_CRC_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_HEADER_ECC_IRQ_MASK (0x00000020U)

#define	CSL_CSIRX_ERROR_IRQS_HEADER_ECC_IRQ_SHIFT (0x00000005U)

#define	CSL_CSIRX_ERROR_IRQS_HEADER_ECC_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_HEADER_CORRECTED_ECC_IRQ_MASK (0x00000040U)

#define	CSL_CSIRX_ERROR_IRQS_HEADER_CORRECTED_ECC_IRQ_SHIFT (0x00000006U)

#define	CSL_CSIRX_ERROR_IRQS_HEADER_CORRECTED_ECC_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_DATA_ID_IRQ_MASK (0x00000080U)

#define	CSL_CSIRX_ERROR_IRQS_DATA_ID_IRQ_SHIFT (0x00000007U)

#define	CSL_CSIRX_ERROR_IRQS_DATA_ID_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_INVALID_ACCESS_IRQ_MASK (0x00000100U)

#define	CSL_CSIRX_ERROR_IRQS_INVALID_ACCESS_IRQ_SHIFT (0x00000008U)

#define	CSL_CSIRX_ERROR_IRQS_INVALID_ACCESS_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_SP_INVALID_RCVD_IRQ_MASK (0x00000200U)

#define	CSL_CSIRX_ERROR_IRQS_SP_INVALID_RCVD_IRQ_SHIFT (0x00000009U)

#define	CSL_CSIRX_ERROR_IRQS_SP_INVALID_RCVD_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_FRONT_LP_NO_PAYLOAD_IRQ_MASK (0x00000400U)

#define	CSL_CSIRX_ERROR_IRQS_FRONT_LP_NO_PAYLOAD_IRQ_SHIFT (0x0000000AU)

#define	CSL_CSIRX_ERROR_IRQS_FRONT_LP_NO_PAYLOAD_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_PROT_TRUNCATED_PACKET_IRQ_MASK (0x00000800U)

#define	CSL_CSIRX_ERROR_IRQS_PROT_TRUNCATED_PACKET_IRQ_SHIFT (0x0000000BU)

#define	CSL_CSIRX_ERROR_IRQS_PROT_TRUNCATED_PACKET_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_FRONT_TRUNC_HDR_IRQ_MASK (0x00001000U)

#define	CSL_CSIRX_ERROR_IRQS_FRONT_TRUNC_HDR_IRQ_SHIFT (0x0000000CU)

#define	CSL_CSIRX_ERROR_IRQS_FRONT_TRUNC_HDR_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_STREAM0_FIFO_OVERFLOW_IRQ_MASK (0x00010000U)

#define	CSL_CSIRX_ERROR_IRQS_STREAM0_FIFO_OVERFLOW_IRQ_SHIFT (0x00000010U)

#define	CSL_CSIRX_ERROR_IRQS_STREAM0_FIFO_OVERFLOW_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_STREAM1_FIFO_OVERFLOW_IRQ_MASK (0x00020000U)

#define	CSL_CSIRX_ERROR_IRQS_STREAM1_FIFO_OVERFLOW_IRQ_SHIFT (0x00000011U)

#define	CSL_CSIRX_ERROR_IRQS_STREAM1_FIFO_OVERFLOW_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_STREAM2_FIFO_OVERFLOW_IRQ_MASK (0x00040000U)

#define	CSL_CSIRX_ERROR_IRQS_STREAM2_FIFO_OVERFLOW_IRQ_SHIFT (0x00000012U)

#define	CSL_CSIRX_ERROR_IRQS_STREAM2_FIFO_OVERFLOW_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_STREAM3_FIFO_OVERFLOW_IRQ_MASK (0x00080000U)

#define	CSL_CSIRX_ERROR_IRQS_STREAM3_FIFO_OVERFLOW_IRQ_SHIFT (0x00000013U)

#define	CSL_CSIRX_ERROR_IRQS_STREAM3_FIFO_OVERFLOW_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_FIFO_OVERFLOW_IRQM_MASK (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_FIFO_OVERFLOW_IRQM_SHIFT (0x00000000U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_FIFO_OVERFLOW_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_PAYLOAD_CRC_IRQM_MASK (0x00000010U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_PAYLOAD_CRC_IRQM_SHIFT (0x00000004U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_PAYLOAD_CRC_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_ECC_IRQM_MASK (0x00000020U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_ECC_IRQM_SHIFT (0x00000005U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_ECC_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_CORRECTED_ECC_IRQM_MASK (0x00000040U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_CORRECTED_ECC_IRQM_SHIFT (0x00000006U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_CORRECTED_ECC_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_DATA_ID_IRQM_MASK (0x00000080U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_DATA_ID_IRQM_SHIFT (0x00000007U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_DATA_ID_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_INVALID_ACCESS_IRQM_MASK (0x00000100U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_INVALID_ACCESS_IRQM_SHIFT (0x00000008U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_INVALID_ACCESS_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_SP_INVALID_RCVD_IRQM_MASK (0x00000200U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_SP_INVALID_RCVD_IRQM_SHIFT (0x00000009U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_SP_INVALID_RCVD_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_LP_NO_PAYLOAD_IRQM_MASK (0x00000400U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_LP_NO_PAYLOAD_IRQM_SHIFT (0x0000000AU)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_LP_NO_PAYLOAD_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_PROT_TRUNCATED_PACKET_IRQM_MASK (0x00000800U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_PROT_TRUNCATED_PACKET_IRQM_SHIFT (0x0000000BU)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_PROT_TRUNCATED_PACKET_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_TRUNC_HDR_IRQM_MASK (0x00001000U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_TRUNC_HDR_IRQM_SHIFT (0x0000000CU)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_TRUNC_HDR_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM0_FIFO_OVERFLOW_IRQM_MASK (0x00010000U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM0_FIFO_OVERFLOW_IRQM_SHIFT (0x00000010U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM0_FIFO_OVERFLOW_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM1_FIFO_OVERFLOW_IRQM_MASK (0x00020000U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM1_FIFO_OVERFLOW_IRQM_SHIFT (0x00000011U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM1_FIFO_OVERFLOW_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM2_FIFO_OVERFLOW_IRQM_MASK (0x00040000U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM2_FIFO_OVERFLOW_IRQM_SHIFT (0x00000012U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM2_FIFO_OVERFLOW_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM3_FIFO_OVERFLOW_IRQM_MASK (0x00080000U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM3_FIFO_OVERFLOW_IRQM_SHIFT (0x00000013U)

#define	CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM3_FIFO_OVERFLOW_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL0_ENABLE_MASK (0x00000001U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL0_ENABLE_SHIFT (0x00000000U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL0_ENABLE_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL1_ENABLE_MASK (0x00000002U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL1_ENABLE_SHIFT (0x00000001U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL1_ENABLE_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL2_ENABLE_MASK (0x00000004U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL2_ENABLE_SHIFT (0x00000002U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL2_ENABLE_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL3_ENABLE_MASK (0x00000008U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL3_ENABLE_SHIFT (0x00000003U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL3_ENABLE_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_CL_ENABLE_MASK (0x00000010U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_CL_ENABLE_SHIFT (0x00000004U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_CL_ENABLE_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL0_RESET_MASK (0x00001000U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL0_RESET_SHIFT (0x0000000CU)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL0_RESET_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL1_RESET_MASK (0x00002000U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL1_RESET_SHIFT (0x0000000DU)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL1_RESET_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL2_RESET_MASK (0x00004000U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL2_RESET_SHIFT (0x0000000EU)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL2_RESET_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL3_RESET_MASK (0x00008000U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL3_RESET_SHIFT (0x0000000FU)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_DL3_RESET_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_CL_RESET_MASK (0x00010000U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_CL_RESET_SHIFT (0x00000010U)

#define	CSL_CSIRX_DPHY_LANE_CONTROL_CL_RESET_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_CL_STOPSTATE_MASK (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_CL_STOPSTATE_SHIFT (0x00000000U)

#define	CSL_CSIRX_DPHY_STATUS_CL_STOPSTATE_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_CL_ULPSACTIVENOT_MASK (0x00000002U)

#define	CSL_CSIRX_DPHY_STATUS_CL_ULPSACTIVENOT_SHIFT (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_CL_ULPSACTIVENOT_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_CL_RXULPSCLKNOT_MASK (0x00000004U)

#define	CSL_CSIRX_DPHY_STATUS_CL_RXULPSCLKNOT_SHIFT (0x00000002U)

#define	CSL_CSIRX_DPHY_STATUS_CL_RXULPSCLKNOT_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_DL0_STOPSTATE_MASK (0x00000100U)

#define	CSL_CSIRX_DPHY_STATUS_DL0_STOPSTATE_SHIFT (0x00000008U)

#define	CSL_CSIRX_DPHY_STATUS_DL0_STOPSTATE_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_DL0_ULPSACTIVENOT_MASK (0x00000200U)

#define	CSL_CSIRX_DPHY_STATUS_DL0_ULPSACTIVENOT_SHIFT (0x00000009U)

#define	CSL_CSIRX_DPHY_STATUS_DL0_ULPSACTIVENOT_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_DL0_RXULPSESC_MASK (0x00000400U)

#define	CSL_CSIRX_DPHY_STATUS_DL0_RXULPSESC_SHIFT (0x0000000AU)

#define	CSL_CSIRX_DPHY_STATUS_DL0_RXULPSESC_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_DL1_STOPSTATE_MASK (0x00001000U)

#define	CSL_CSIRX_DPHY_STATUS_DL1_STOPSTATE_SHIFT (0x0000000CU)

#define	CSL_CSIRX_DPHY_STATUS_DL1_STOPSTATE_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_DL1_ULPSACTIVENOT_MASK (0x00002000U)

#define	CSL_CSIRX_DPHY_STATUS_DL1_ULPSACTIVENOT_SHIFT (0x0000000DU)

#define	CSL_CSIRX_DPHY_STATUS_DL1_ULPSACTIVENOT_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_DL1_RXULPSESC_MASK (0x00004000U)

#define	CSL_CSIRX_DPHY_STATUS_DL1_RXULPSESC_SHIFT (0x0000000EU)

#define	CSL_CSIRX_DPHY_STATUS_DL1_RXULPSESC_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_DL2_STOPSTATE_MASK (0x00010000U)

#define	CSL_CSIRX_DPHY_STATUS_DL2_STOPSTATE_SHIFT (0x00000010U)

#define	CSL_CSIRX_DPHY_STATUS_DL2_STOPSTATE_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_DL2_ULPSACTIVENOT_MASK (0x00020000U)

#define	CSL_CSIRX_DPHY_STATUS_DL2_ULPSACTIVENOT_SHIFT (0x00000011U)

#define	CSL_CSIRX_DPHY_STATUS_DL2_ULPSACTIVENOT_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_DL2_RXULPSESC_MASK (0x00040000U)

#define	CSL_CSIRX_DPHY_STATUS_DL2_RXULPSESC_SHIFT (0x00000012U)

#define	CSL_CSIRX_DPHY_STATUS_DL2_RXULPSESC_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_DL3_STOPSTATE_MASK (0x00100000U)

#define	CSL_CSIRX_DPHY_STATUS_DL3_STOPSTATE_SHIFT (0x00000014U)

#define	CSL_CSIRX_DPHY_STATUS_DL3_STOPSTATE_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_DL3_ULPSACTIVENOT_MASK (0x00200000U)

#define	CSL_CSIRX_DPHY_STATUS_DL3_ULPSACTIVENOT_SHIFT (0x00000015U)

#define	CSL_CSIRX_DPHY_STATUS_DL3_ULPSACTIVENOT_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_STATUS_DL3_RXULPSESC_MASK (0x00400000U)

#define	CSL_CSIRX_DPHY_STATUS_DL3_RXULPSESC_SHIFT (0x00000016U)

#define	CSL_CSIRX_DPHY_STATUS_DL3_RXULPSESC_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL0_ERRSOTHS_IRQ_MASK (0x00000100U)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL0_ERRSOTHS_IRQ_SHIFT (0x00000008U)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL0_ERRSOTHS_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL1_ERRSOTHS_IRQ_MASK (0x00001000U)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL1_ERRSOTHS_IRQ_SHIFT (0x0000000CU)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL1_ERRSOTHS_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL2_ERRSOTHS_IRQ_MASK (0x00010000U)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL2_ERRSOTHS_IRQ_SHIFT (0x00000010U)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL2_ERRSOTHS_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL3_ERRSOTHS_IRQ_MASK (0x00100000U)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL3_ERRSOTHS_IRQ_SHIFT (0x00000014U)

#define	CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL3_ERRSOTHS_IRQ_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL0_ERRSOTHS_IRQM_MASK (0x00000100U)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL0_ERRSOTHS_IRQM_SHIFT (0x00000008U)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL0_ERRSOTHS_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL1_ERRSOTHS_IRQM_MASK (0x00001000U)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL1_ERRSOTHS_IRQM_SHIFT (0x0000000CU)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL1_ERRSOTHS_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL2_ERRSOTHS_IRQM_MASK (0x00010000U)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL2_ERRSOTHS_IRQM_SHIFT (0x00000010U)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL2_ERRSOTHS_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL3_ERRSOTHS_IRQM_MASK (0x00100000U)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL3_ERRSOTHS_IRQM_SHIFT (0x00000014U)

#define	CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL3_ERRSOTHS_IRQM_MAX (0x00000001U)

#define	CSL_CSIRX_INTEGRATION_DEBUG_PROT_WORD_COUNT_MASK (0x0000FFFFU)

#define	CSL_CSIRX_INTEGRATION_DEBUG_PROT_WORD_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_INTEGRATION_DEBUG_PROT_WORD_COUNT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_INTEGRATION_DEBUG_PROT_DT_MASK (0x003F0000U)

#define	CSL_CSIRX_INTEGRATION_DEBUG_PROT_DT_SHIFT (0x00000010U)

#define	CSL_CSIRX_INTEGRATION_DEBUG_PROT_DT_MAX (0x0000003FU)

#define	CSL_CSIRX_INTEGRATION_DEBUG_PROT_VC_MASK (0x03C00000U)

#define	CSL_CSIRX_INTEGRATION_DEBUG_PROT_VC_SHIFT (0x00000016U)

#define	CSL_CSIRX_INTEGRATION_DEBUG_PROT_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_INTEGRATION_DEBUG_PROT_FSM_STATE_MASK (0xF0000000U)

#define	CSL_CSIRX_INTEGRATION_DEBUG_PROT_FSM_STATE_SHIFT (0x0000001CU)

#define	CSL_CSIRX_INTEGRATION_DEBUG_PROT_FSM_STATE_MAX (0x0000000FU)

#define	CSL_CSIRX_ERROR_DEBUG_DT_MASK (0x0000003FU)

#define	CSL_CSIRX_ERROR_DEBUG_DT_SHIFT (0x00000000U)

#define	CSL_CSIRX_ERROR_DEBUG_DT_MAX (0x0000003FU)

#define	CSL_CSIRX_ERROR_DEBUG_VC_MASK (0x000003C0U)

#define	CSL_CSIRX_ERROR_DEBUG_VC_SHIFT (0x00000006U)

#define	CSL_CSIRX_ERROR_DEBUG_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_ERROR_DEBUG_DATA_FIELD_MASK (0xFFFF0000U)

#define	CSL_CSIRX_ERROR_DEBUG_DATA_FIELD_SHIFT (0x00000010U)

#define	CSL_CSIRX_ERROR_DEBUG_DATA_FIELD_MAX (0x0000FFFFU)

#define	CSL_CSIRX_TEST_GENERIC_CTRL_MASK (0x0000FFFFU)

#define	CSL_CSIRX_TEST_GENERIC_CTRL_SHIFT (0x00000000U)

#define	CSL_CSIRX_TEST_GENERIC_CTRL_MAX (0x0000FFFFU)

#define	CSL_CSIRX_TEST_GENERIC_STATUS_MASK (0xFFFF0000U)

#define	CSL_CSIRX_TEST_GENERIC_STATUS_SHIFT (0x00000010U)

#define	CSL_CSIRX_TEST_GENERIC_STATUS_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_CTRL_START_MASK (0x00000001U)

#define	CSL_CSIRX_STREAM0_CTRL_START_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM0_CTRL_START_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_CTRL_STOP_MASK (0x00000002U)

#define	CSL_CSIRX_STREAM0_CTRL_STOP_SHIFT (0x00000001U)

#define	CSL_CSIRX_STREAM0_CTRL_STOP_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_CTRL_ABORT_MASK (0x00000004U)

#define	CSL_CSIRX_STREAM0_CTRL_ABORT_SHIFT (0x00000002U)

#define	CSL_CSIRX_STREAM0_CTRL_ABORT_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_CTRL_SOFT_RST_MASK (0x00000010U)

#define	CSL_CSIRX_STREAM0_CTRL_SOFT_RST_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM0_CTRL_SOFT_RST_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_STATUS_PROTOCOL_FSM_MASK (0x00000003U)

#define	CSL_CSIRX_STREAM0_STATUS_PROTOCOL_FSM_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM0_STATUS_PROTOCOL_FSM_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM0_STATUS_STREAM_FSM_MASK (0x000000F0U)

#define	CSL_CSIRX_STREAM0_STATUS_STREAM_FSM_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM0_STATUS_STREAM_FSM_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM0_STATUS_READY_STATE_MASK (0x00000100U)

#define	CSL_CSIRX_STREAM0_STATUS_READY_STATE_SHIFT (0x00000008U)

#define	CSL_CSIRX_STREAM0_STATUS_READY_STATE_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_STATUS_RUNNING_MASK (0x80000000U)

#define	CSL_CSIRX_STREAM0_STATUS_RUNNING_SHIFT (0x0000001FU)

#define	CSL_CSIRX_STREAM0_STATUS_RUNNING_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT0_MASK (0x0000003FU)

#define	CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT0_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT0_MAX (0x0000003FU)

#define	CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT0_MASK (0x00000080U)

#define	CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT0_SHIFT (0x00000007U)

#define	CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT0_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT1_MASK (0x00003F00U)

#define	CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT1_SHIFT (0x00000008U)

#define	CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT1_MAX (0x0000003FU)

#define	CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT1_MASK (0x00008000U)

#define	CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT1_SHIFT (0x0000000FU)

#define	CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT1_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_DATA_CFG_VC_SELECT_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM0_DATA_CFG_VC_SELECT_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM0_DATA_CFG_VC_SELECT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_CFG_INTERFACE_MODE_MASK (0x00000001U)

#define	CSL_CSIRX_STREAM0_CFG_INTERFACE_MODE_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM0_CFG_INTERFACE_MODE_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_CFG_LS_LE_MODE_MASK (0x00000002U)

#define	CSL_CSIRX_STREAM0_CFG_LS_LE_MODE_SHIFT (0x00000001U)

#define	CSL_CSIRX_STREAM0_CFG_LS_LE_MODE_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_CFG_NUM_PIXELS_MASK (0x00000030U)

#define	CSL_CSIRX_STREAM0_CFG_NUM_PIXELS_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM0_CFG_NUM_PIXELS_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM0_CFG_FIFO_MODE_MASK (0x00000300U)

#define	CSL_CSIRX_STREAM0_CFG_FIFO_MODE_SHIFT (0x00000008U)

#define	CSL_CSIRX_STREAM0_CFG_FIFO_MODE_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM0_CFG_BPP_BYPASS_MASK (0x00007000U)

#define	CSL_CSIRX_STREAM0_CFG_BPP_BYPASS_SHIFT (0x0000000CU)

#define	CSL_CSIRX_STREAM0_CFG_BPP_BYPASS_MAX (0x00000007U)

#define	CSL_CSIRX_STREAM0_CFG_FIFO_FILL_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM0_CFG_FIFO_FILL_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM0_CFG_FIFO_FILL_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_VC_MASK (0x0000000FU)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_VC_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_EN_MASK (0x00000010U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_EN_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_VC_MASK (0x000001E0U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_VC_SHIFT (0x00000005U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EN_MASK (0x00000200U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EN_SHIFT (0x00000009U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EOF_MASK (0x00000400U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EOF_SHIFT (0x0000000AU)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EOF_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_VC_MASK (0x00007800U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_VC_SHIFT (0x0000000BU)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_EN_MASK (0x00008000U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_EN_SHIFT (0x0000000FU)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_LENGTH_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_LENGTH_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_LENGTH_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_MONITOR_FRAME_NB_MASK (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_MONITOR_FRAME_NB_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM0_MONITOR_FRAME_NB_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_MONITOR_FRAME_PACKET_SIZE_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM0_MONITOR_FRAME_PACKET_SIZE_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM0_MONITOR_FRAME_PACKET_SIZE_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_MONITOR_LB_BYTE_COUNT_MASK (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_MONITOR_LB_BYTE_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM0_MONITOR_LB_BYTE_COUNT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_MONITOR_LB_LINE_COUNT_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM0_MONITOR_LB_LINE_COUNT_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM0_MONITOR_LB_LINE_COUNT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_TIMER_COUNT_MASK (0x01FFFFFFU)

#define	CSL_CSIRX_STREAM0_TIMER_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM0_TIMER_COUNT_MAX (0x01FFFFFFU)

#define	CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_START_MASK (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_START_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_START_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_STOP_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_STOP_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_STOP_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_FCC_CTRL_FCC_EN_MASK (0x00000001U)

#define	CSL_CSIRX_STREAM0_FCC_CTRL_FCC_EN_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM0_FCC_CTRL_FCC_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM0_FCC_CTRL_FCC_VC_MASK (0x0000001EU)

#define	CSL_CSIRX_STREAM0_FCC_CTRL_FCC_VC_SHIFT (0x00000001U)

#define	CSL_CSIRX_STREAM0_FCC_CTRL_FCC_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM0_FCC_CTRL_FRAME_COUNTER_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM0_FCC_CTRL_FRAME_COUNTER_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM0_FCC_CTRL_FRAME_COUNTER_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM0_FIFO_FILL_LVL_COUNT_MASK (0x000003FFU)

#define	CSL_CSIRX_STREAM0_FIFO_FILL_LVL_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM0_FIFO_FILL_LVL_COUNT_MAX (0x000003FFU)

#define	CSL_CSIRX_STREAM0_FIFO_FILL_LVL_MODE_MASK (0x00003000U)

#define	CSL_CSIRX_STREAM0_FIFO_FILL_LVL_MODE_SHIFT (0x0000000CU)

#define	CSL_CSIRX_STREAM0_FIFO_FILL_LVL_MODE_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM1_CTRL_START_MASK (0x00000001U)

#define	CSL_CSIRX_STREAM1_CTRL_START_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM1_CTRL_START_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_CTRL_STOP_MASK (0x00000002U)

#define	CSL_CSIRX_STREAM1_CTRL_STOP_SHIFT (0x00000001U)

#define	CSL_CSIRX_STREAM1_CTRL_STOP_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_CTRL_ABORT_MASK (0x00000004U)

#define	CSL_CSIRX_STREAM1_CTRL_ABORT_SHIFT (0x00000002U)

#define	CSL_CSIRX_STREAM1_CTRL_ABORT_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_CTRL_SOFT_RST_MASK (0x00000010U)

#define	CSL_CSIRX_STREAM1_CTRL_SOFT_RST_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM1_CTRL_SOFT_RST_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_STATUS_PROTOCOL_FSM_MASK (0x00000003U)

#define	CSL_CSIRX_STREAM1_STATUS_PROTOCOL_FSM_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM1_STATUS_PROTOCOL_FSM_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM1_STATUS_STREAM_FSM_MASK (0x000000F0U)

#define	CSL_CSIRX_STREAM1_STATUS_STREAM_FSM_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM1_STATUS_STREAM_FSM_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM1_STATUS_READY_STATE_MASK (0x00000100U)

#define	CSL_CSIRX_STREAM1_STATUS_READY_STATE_SHIFT (0x00000008U)

#define	CSL_CSIRX_STREAM1_STATUS_READY_STATE_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_STATUS_RUNNING_MASK (0x80000000U)

#define	CSL_CSIRX_STREAM1_STATUS_RUNNING_SHIFT (0x0000001FU)

#define	CSL_CSIRX_STREAM1_STATUS_RUNNING_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT0_MASK (0x0000003FU)

#define	CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT0_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT0_MAX (0x0000003FU)

#define	CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT0_MASK (0x00000080U)

#define	CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT0_SHIFT (0x00000007U)

#define	CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT0_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT1_MASK (0x00003F00U)

#define	CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT1_SHIFT (0x00000008U)

#define	CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT1_MAX (0x0000003FU)

#define	CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT1_MASK (0x00008000U)

#define	CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT1_SHIFT (0x0000000FU)

#define	CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT1_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_DATA_CFG_VC_SELECT_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM1_DATA_CFG_VC_SELECT_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM1_DATA_CFG_VC_SELECT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_CFG_INTERFACE_MODE_MASK (0x00000001U)

#define	CSL_CSIRX_STREAM1_CFG_INTERFACE_MODE_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM1_CFG_INTERFACE_MODE_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_CFG_LS_LE_MODE_MASK (0x00000002U)

#define	CSL_CSIRX_STREAM1_CFG_LS_LE_MODE_SHIFT (0x00000001U)

#define	CSL_CSIRX_STREAM1_CFG_LS_LE_MODE_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_CFG_NUM_PIXELS_MASK (0x00000030U)

#define	CSL_CSIRX_STREAM1_CFG_NUM_PIXELS_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM1_CFG_NUM_PIXELS_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM1_CFG_FIFO_MODE_MASK (0x00000300U)

#define	CSL_CSIRX_STREAM1_CFG_FIFO_MODE_SHIFT (0x00000008U)

#define	CSL_CSIRX_STREAM1_CFG_FIFO_MODE_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM1_CFG_BPP_BYPASS_MASK (0x00007000U)

#define	CSL_CSIRX_STREAM1_CFG_BPP_BYPASS_SHIFT (0x0000000CU)

#define	CSL_CSIRX_STREAM1_CFG_BPP_BYPASS_MAX (0x00000007U)

#define	CSL_CSIRX_STREAM1_CFG_FIFO_FILL_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM1_CFG_FIFO_FILL_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM1_CFG_FIFO_FILL_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_VC_MASK (0x0000000FU)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_VC_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_EN_MASK (0x00000010U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_EN_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_VC_MASK (0x000001E0U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_VC_SHIFT (0x00000005U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EN_MASK (0x00000200U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EN_SHIFT (0x00000009U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EOF_MASK (0x00000400U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EOF_SHIFT (0x0000000AU)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EOF_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_VC_MASK (0x00007800U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_VC_SHIFT (0x0000000BU)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_EN_MASK (0x00008000U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_EN_SHIFT (0x0000000FU)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_LENGTH_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_LENGTH_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_LENGTH_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_MONITOR_FRAME_NB_MASK (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_MONITOR_FRAME_NB_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM1_MONITOR_FRAME_NB_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_MONITOR_FRAME_PACKET_SIZE_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM1_MONITOR_FRAME_PACKET_SIZE_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM1_MONITOR_FRAME_PACKET_SIZE_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_MONITOR_LB_BYTE_COUNT_MASK (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_MONITOR_LB_BYTE_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM1_MONITOR_LB_BYTE_COUNT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_MONITOR_LB_LINE_COUNT_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM1_MONITOR_LB_LINE_COUNT_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM1_MONITOR_LB_LINE_COUNT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_TIMER_COUNT_MASK (0x01FFFFFFU)

#define	CSL_CSIRX_STREAM1_TIMER_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM1_TIMER_COUNT_MAX (0x01FFFFFFU)

#define	CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_START_MASK (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_START_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_START_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_STOP_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_STOP_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_STOP_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_FCC_CTRL_FCC_EN_MASK (0x00000001U)

#define	CSL_CSIRX_STREAM1_FCC_CTRL_FCC_EN_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM1_FCC_CTRL_FCC_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM1_FCC_CTRL_FCC_VC_MASK (0x0000001EU)

#define	CSL_CSIRX_STREAM1_FCC_CTRL_FCC_VC_SHIFT (0x00000001U)

#define	CSL_CSIRX_STREAM1_FCC_CTRL_FCC_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM1_FCC_CTRL_FRAME_COUNTER_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM1_FCC_CTRL_FRAME_COUNTER_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM1_FCC_CTRL_FRAME_COUNTER_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM1_FIFO_FILL_LVL_COUNT_MASK (0x000003FFU)

#define	CSL_CSIRX_STREAM1_FIFO_FILL_LVL_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM1_FIFO_FILL_LVL_COUNT_MAX (0x000003FFU)

#define	CSL_CSIRX_STREAM1_FIFO_FILL_LVL_MODE_MASK (0x00003000U)

#define	CSL_CSIRX_STREAM1_FIFO_FILL_LVL_MODE_SHIFT (0x0000000CU)

#define	CSL_CSIRX_STREAM1_FIFO_FILL_LVL_MODE_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM2_CTRL_START_MASK (0x00000001U)

#define	CSL_CSIRX_STREAM2_CTRL_START_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM2_CTRL_START_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_CTRL_STOP_MASK (0x00000002U)

#define	CSL_CSIRX_STREAM2_CTRL_STOP_SHIFT (0x00000001U)

#define	CSL_CSIRX_STREAM2_CTRL_STOP_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_CTRL_ABORT_MASK (0x00000004U)

#define	CSL_CSIRX_STREAM2_CTRL_ABORT_SHIFT (0x00000002U)

#define	CSL_CSIRX_STREAM2_CTRL_ABORT_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_CTRL_SOFT_RST_MASK (0x00000010U)

#define	CSL_CSIRX_STREAM2_CTRL_SOFT_RST_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM2_CTRL_SOFT_RST_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_STATUS_PROTOCOL_FSM_MASK (0x00000003U)

#define	CSL_CSIRX_STREAM2_STATUS_PROTOCOL_FSM_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM2_STATUS_PROTOCOL_FSM_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM2_STATUS_STREAM_FSM_MASK (0x000000F0U)

#define	CSL_CSIRX_STREAM2_STATUS_STREAM_FSM_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM2_STATUS_STREAM_FSM_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM2_STATUS_READY_STATE_MASK (0x00000100U)

#define	CSL_CSIRX_STREAM2_STATUS_READY_STATE_SHIFT (0x00000008U)

#define	CSL_CSIRX_STREAM2_STATUS_READY_STATE_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_STATUS_RUNNING_MASK (0x80000000U)

#define	CSL_CSIRX_STREAM2_STATUS_RUNNING_SHIFT (0x0000001FU)

#define	CSL_CSIRX_STREAM2_STATUS_RUNNING_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT0_MASK (0x0000003FU)

#define	CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT0_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT0_MAX (0x0000003FU)

#define	CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT0_MASK (0x00000080U)

#define	CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT0_SHIFT (0x00000007U)

#define	CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT0_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT1_MASK (0x00003F00U)

#define	CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT1_SHIFT (0x00000008U)

#define	CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT1_MAX (0x0000003FU)

#define	CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT1_MASK (0x00008000U)

#define	CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT1_SHIFT (0x0000000FU)

#define	CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT1_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_DATA_CFG_VC_SELECT_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM2_DATA_CFG_VC_SELECT_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM2_DATA_CFG_VC_SELECT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_CFG_INTERFACE_MODE_MASK (0x00000001U)

#define	CSL_CSIRX_STREAM2_CFG_INTERFACE_MODE_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM2_CFG_INTERFACE_MODE_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_CFG_LS_LE_MODE_MASK (0x00000002U)

#define	CSL_CSIRX_STREAM2_CFG_LS_LE_MODE_SHIFT (0x00000001U)

#define	CSL_CSIRX_STREAM2_CFG_LS_LE_MODE_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_CFG_NUM_PIXELS_MASK (0x00000030U)

#define	CSL_CSIRX_STREAM2_CFG_NUM_PIXELS_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM2_CFG_NUM_PIXELS_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM2_CFG_FIFO_MODE_MASK (0x00000300U)

#define	CSL_CSIRX_STREAM2_CFG_FIFO_MODE_SHIFT (0x00000008U)

#define	CSL_CSIRX_STREAM2_CFG_FIFO_MODE_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM2_CFG_BPP_BYPASS_MASK (0x00007000U)

#define	CSL_CSIRX_STREAM2_CFG_BPP_BYPASS_SHIFT (0x0000000CU)

#define	CSL_CSIRX_STREAM2_CFG_BPP_BYPASS_MAX (0x00000007U)

#define	CSL_CSIRX_STREAM2_CFG_FIFO_FILL_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM2_CFG_FIFO_FILL_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM2_CFG_FIFO_FILL_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_VC_MASK (0x0000000FU)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_VC_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_EN_MASK (0x00000010U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_EN_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_VC_MASK (0x000001E0U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_VC_SHIFT (0x00000005U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EN_MASK (0x00000200U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EN_SHIFT (0x00000009U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EOF_MASK (0x00000400U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EOF_SHIFT (0x0000000AU)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EOF_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_VC_MASK (0x00007800U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_VC_SHIFT (0x0000000BU)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_EN_MASK (0x00008000U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_EN_SHIFT (0x0000000FU)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_LENGTH_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_LENGTH_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_LENGTH_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_MONITOR_FRAME_NB_MASK (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_MONITOR_FRAME_NB_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM2_MONITOR_FRAME_NB_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_MONITOR_FRAME_PACKET_SIZE_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM2_MONITOR_FRAME_PACKET_SIZE_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM2_MONITOR_FRAME_PACKET_SIZE_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_MONITOR_LB_BYTE_COUNT_MASK (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_MONITOR_LB_BYTE_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM2_MONITOR_LB_BYTE_COUNT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_MONITOR_LB_LINE_COUNT_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM2_MONITOR_LB_LINE_COUNT_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM2_MONITOR_LB_LINE_COUNT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_TIMER_COUNT_MASK (0x01FFFFFFU)

#define	CSL_CSIRX_STREAM2_TIMER_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM2_TIMER_COUNT_MAX (0x01FFFFFFU)

#define	CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_START_MASK (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_START_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_START_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_STOP_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_STOP_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_STOP_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_FCC_CTRL_FCC_EN_MASK (0x00000001U)

#define	CSL_CSIRX_STREAM2_FCC_CTRL_FCC_EN_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM2_FCC_CTRL_FCC_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM2_FCC_CTRL_FCC_VC_MASK (0x0000001EU)

#define	CSL_CSIRX_STREAM2_FCC_CTRL_FCC_VC_SHIFT (0x00000001U)

#define	CSL_CSIRX_STREAM2_FCC_CTRL_FCC_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM2_FCC_CTRL_FRAME_COUNTER_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM2_FCC_CTRL_FRAME_COUNTER_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM2_FCC_CTRL_FRAME_COUNTER_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM2_FIFO_FILL_LVL_COUNT_MASK (0x000003FFU)

#define	CSL_CSIRX_STREAM2_FIFO_FILL_LVL_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM2_FIFO_FILL_LVL_COUNT_MAX (0x000003FFU)

#define	CSL_CSIRX_STREAM2_FIFO_FILL_LVL_MODE_MASK (0x00003000U)

#define	CSL_CSIRX_STREAM2_FIFO_FILL_LVL_MODE_SHIFT (0x0000000CU)

#define	CSL_CSIRX_STREAM2_FIFO_FILL_LVL_MODE_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM3_CTRL_START_MASK (0x00000001U)

#define	CSL_CSIRX_STREAM3_CTRL_START_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM3_CTRL_START_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_CTRL_STOP_MASK (0x00000002U)

#define	CSL_CSIRX_STREAM3_CTRL_STOP_SHIFT (0x00000001U)

#define	CSL_CSIRX_STREAM3_CTRL_STOP_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_CTRL_ABORT_MASK (0x00000004U)

#define	CSL_CSIRX_STREAM3_CTRL_ABORT_SHIFT (0x00000002U)

#define	CSL_CSIRX_STREAM3_CTRL_ABORT_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_CTRL_SOFT_RST_MASK (0x00000010U)

#define	CSL_CSIRX_STREAM3_CTRL_SOFT_RST_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM3_CTRL_SOFT_RST_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_STATUS_PROTOCOL_FSM_MASK (0x00000003U)

#define	CSL_CSIRX_STREAM3_STATUS_PROTOCOL_FSM_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM3_STATUS_PROTOCOL_FSM_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM3_STATUS_STREAM_FSM_MASK (0x000000F0U)

#define	CSL_CSIRX_STREAM3_STATUS_STREAM_FSM_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM3_STATUS_STREAM_FSM_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM3_STATUS_READY_STATE_MASK (0x00000100U)

#define	CSL_CSIRX_STREAM3_STATUS_READY_STATE_SHIFT (0x00000008U)

#define	CSL_CSIRX_STREAM3_STATUS_READY_STATE_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_STATUS_RUNNING_MASK (0x80000000U)

#define	CSL_CSIRX_STREAM3_STATUS_RUNNING_SHIFT (0x0000001FU)

#define	CSL_CSIRX_STREAM3_STATUS_RUNNING_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT0_MASK (0x0000003FU)

#define	CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT0_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT0_MAX (0x0000003FU)

#define	CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT0_MASK (0x00000080U)

#define	CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT0_SHIFT (0x00000007U)

#define	CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT0_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT1_MASK (0x00003F00U)

#define	CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT1_SHIFT (0x00000008U)

#define	CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT1_MAX (0x0000003FU)

#define	CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT1_MASK (0x00008000U)

#define	CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT1_SHIFT (0x0000000FU)

#define	CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT1_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_DATA_CFG_VC_SELECT_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM3_DATA_CFG_VC_SELECT_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM3_DATA_CFG_VC_SELECT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_CFG_INTERFACE_MODE_MASK (0x00000001U)

#define	CSL_CSIRX_STREAM3_CFG_INTERFACE_MODE_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM3_CFG_INTERFACE_MODE_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_CFG_LS_LE_MODE_MASK (0x00000002U)

#define	CSL_CSIRX_STREAM3_CFG_LS_LE_MODE_SHIFT (0x00000001U)

#define	CSL_CSIRX_STREAM3_CFG_LS_LE_MODE_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_CFG_NUM_PIXELS_MASK (0x00000030U)

#define	CSL_CSIRX_STREAM3_CFG_NUM_PIXELS_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM3_CFG_NUM_PIXELS_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM3_CFG_FIFO_MODE_MASK (0x00000300U)

#define	CSL_CSIRX_STREAM3_CFG_FIFO_MODE_SHIFT (0x00000008U)

#define	CSL_CSIRX_STREAM3_CFG_FIFO_MODE_MAX (0x00000003U)

#define	CSL_CSIRX_STREAM3_CFG_BPP_BYPASS_MASK (0x00007000U)

#define	CSL_CSIRX_STREAM3_CFG_BPP_BYPASS_SHIFT (0x0000000CU)

#define	CSL_CSIRX_STREAM3_CFG_BPP_BYPASS_MAX (0x00000007U)

#define	CSL_CSIRX_STREAM3_CFG_FIFO_FILL_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM3_CFG_FIFO_FILL_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM3_CFG_FIFO_FILL_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_VC_MASK (0x0000000FU)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_VC_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_EN_MASK (0x00000010U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_EN_SHIFT (0x00000004U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_VC_MASK (0x000001E0U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_VC_SHIFT (0x00000005U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EN_MASK (0x00000200U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EN_SHIFT (0x00000009U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EOF_MASK (0x00000400U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EOF_SHIFT (0x0000000AU)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EOF_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_VC_MASK (0x00007800U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_VC_SHIFT (0x0000000BU)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_EN_MASK (0x00008000U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_EN_SHIFT (0x0000000FU)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_LENGTH_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_LENGTH_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_LENGTH_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_MONITOR_FRAME_NB_MASK (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_MONITOR_FRAME_NB_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM3_MONITOR_FRAME_NB_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_MONITOR_FRAME_PACKET_SIZE_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM3_MONITOR_FRAME_PACKET_SIZE_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM3_MONITOR_FRAME_PACKET_SIZE_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_MONITOR_LB_BYTE_COUNT_MASK (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_MONITOR_LB_BYTE_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM3_MONITOR_LB_BYTE_COUNT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_MONITOR_LB_LINE_COUNT_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM3_MONITOR_LB_LINE_COUNT_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM3_MONITOR_LB_LINE_COUNT_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_TIMER_COUNT_MASK (0x01FFFFFFU)

#define	CSL_CSIRX_STREAM3_TIMER_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM3_TIMER_COUNT_MAX (0x01FFFFFFU)

#define	CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_START_MASK (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_START_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_START_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_STOP_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_STOP_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_STOP_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_FCC_CTRL_FCC_EN_MASK (0x00000001U)

#define	CSL_CSIRX_STREAM3_FCC_CTRL_FCC_EN_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM3_FCC_CTRL_FCC_EN_MAX (0x00000001U)

#define	CSL_CSIRX_STREAM3_FCC_CTRL_FCC_VC_MASK (0x0000001EU)

#define	CSL_CSIRX_STREAM3_FCC_CTRL_FCC_VC_SHIFT (0x00000001U)

#define	CSL_CSIRX_STREAM3_FCC_CTRL_FCC_VC_MAX (0x0000000FU)

#define	CSL_CSIRX_STREAM3_FCC_CTRL_FRAME_COUNTER_MASK (0xFFFF0000U)

#define	CSL_CSIRX_STREAM3_FCC_CTRL_FRAME_COUNTER_SHIFT (0x00000010U)

#define	CSL_CSIRX_STREAM3_FCC_CTRL_FRAME_COUNTER_MAX (0x0000FFFFU)

#define	CSL_CSIRX_STREAM3_FIFO_FILL_LVL_COUNT_MASK (0x000003FFU)

#define	CSL_CSIRX_STREAM3_FIFO_FILL_LVL_COUNT_SHIFT (0x00000000U)

#define	CSL_CSIRX_STREAM3_FIFO_FILL_LVL_COUNT_MAX (0x000003FFU)

#define	CSL_CSIRX_STREAM3_FIFO_FILL_LVL_MODE_MASK (0x00003000U)

#define	CSL_CSIRX_STREAM3_FIFO_FILL_LVL_MODE_SHIFT (0x0000000CU)

#define	CSL_CSIRX_STREAM3_FIFO_FILL_LVL_MODE_MAX (0x00000003U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_CORR_ERR_MASK (0x00000001U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_CORR_ERR_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_CORR_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_UNCORR_ERR_MASK (0x00000002U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_UNCORR_ERR_SHIFT (0x00000001U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_UNCORR_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_DAP_ERR_MASK (0x00000004U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_DAP_ERR_SHIFT (0x00000002U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_DAP_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_CSR_ERR_MASK (0x00000008U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_CSR_ERR_SHIFT (0x00000003U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_CSR_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_TRANS_TO_ERR_MASK (0x00000010U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_TRANS_TO_ERR_SHIFT (0x00000004U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_TRANS_TO_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_PROTOCOL_ERR_MASK (0x00000020U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_PROTOCOL_ERR_SHIFT (0x00000005U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_PROTOCOL_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_INTEGRITY_ERR_MASK (0x00000040U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_INTEGRITY_ERR_SHIFT (0x00000006U)

#define	CSL_CSIRX_ASF_INT_STATUS_ASF_INTEGRITY_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_STATUS_RESERVED_31_7_MASK (0xFFFFFF80U)

#define	CSL_CSIRX_ASF_INT_STATUS_RESERVED_31_7_SHIFT (0x00000007U)

#define	CSL_CSIRX_ASF_INT_STATUS_RESERVED_31_7_MAX (0x01FFFFFFU)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_CORR_ERR_MASK (0x00000001U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_CORR_ERR_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_CORR_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_UNCORR_ERR_MASK (0x00000002U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_UNCORR_ERR_SHIFT (0x00000001U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_UNCORR_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_DAP_ERR_MASK (0x00000004U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_DAP_ERR_SHIFT (0x00000002U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_DAP_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_CSR_ERR_MASK (0x00000008U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_CSR_ERR_SHIFT (0x00000003U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_CSR_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_TRANS_TO_ERR_MASK (0x00000010U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_TRANS_TO_ERR_SHIFT (0x00000004U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_TRANS_TO_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_PROTOCOL_ERR_MASK (0x00000020U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_PROTOCOL_ERR_SHIFT (0x00000005U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_PROTOCOL_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_INTEGRITY_ERR_MASK (0x00000040U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_INTEGRITY_ERR_SHIFT (0x00000006U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_INTEGRITY_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_RESERVED_31_7_MASK (0xFFFFFF80U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_RESERVED_31_7_SHIFT (0x00000007U)

#define	CSL_CSIRX_ASF_INT_RAW_STATUS_RESERVED_31_7_MAX (0x01FFFFFFU)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_CORR_ERR_MASK_MASK (0x00000001U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_CORR_ERR_MASK_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_CORR_ERR_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_UNCORR_ERR_MASK_MASK (0x00000002U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_UNCORR_ERR_MASK_SHIFT (0x00000001U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_UNCORR_ERR_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_DAP_ERR_MASK_MASK (0x00000004U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_DAP_ERR_MASK_SHIFT (0x00000002U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_DAP_ERR_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_CSR_ERR_MASK_MASK (0x00000008U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_CSR_ERR_MASK_SHIFT (0x00000003U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_CSR_ERR_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_TRANS_TO_ERR_MASK_MASK (0x00000010U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_TRANS_TO_ERR_MASK_SHIFT (0x00000004U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_TRANS_TO_ERR_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_PROTOCOL_ERR_MASK_MASK (0x00000020U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_PROTOCOL_ERR_MASK_SHIFT (0x00000005U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_PROTOCOL_ERR_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_INTEGRITY_ERR_MASK_MASK (0x00000040U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_INTEGRITY_ERR_MASK_SHIFT (0x00000006U)

#define	CSL_CSIRX_ASF_INT_MASK_ASF_INTEGRITY_ERR_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_MASK_RESERVED_31_7_MASK (0xFFFFFF80U)

#define	CSL_CSIRX_ASF_INT_MASK_RESERVED_31_7_SHIFT (0x00000007U)

#define	CSL_CSIRX_ASF_INT_MASK_RESERVED_31_7_MAX (0x01FFFFFFU)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_CORR_ERR_TEST_MASK (0x00000001U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_CORR_ERR_TEST_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_CORR_ERR_TEST_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_UNCORR_ERR_TEST_MASK (0x00000002U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_UNCORR_ERR_TEST_SHIFT (0x00000001U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_UNCORR_ERR_TEST_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_DAP_ERR_TEST_MASK (0x00000004U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_DAP_ERR_TEST_SHIFT (0x00000002U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_DAP_ERR_TEST_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_CSR_ERR_TEST_MASK (0x00000008U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_CSR_ERR_TEST_SHIFT (0x00000003U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_CSR_ERR_TEST_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_TRANS_TO_ERR_TEST_MASK (0x00000010U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_TRANS_TO_ERR_TEST_SHIFT (0x00000004U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_TRANS_TO_ERR_TEST_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_PROTOCOL_ERR_TEST_MASK (0x00000020U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_PROTOCOL_ERR_TEST_SHIFT (0x00000005U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_PROTOCOL_ERR_TEST_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_INTEGRITY_ERR_TEST_MASK (0x00000040U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_INTEGRITY_ERR_TEST_SHIFT (0x00000006U)

#define	CSL_CSIRX_ASF_INT_TEST_ASF_INTEGRITY_ERR_TEST_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_INT_TEST_RESERVED_31_7_MASK (0xFFFFFF80U)

#define	CSL_CSIRX_ASF_INT_TEST_RESERVED_31_7_SHIFT (0x00000007U)

#define	CSL_CSIRX_ASF_INT_TEST_RESERVED_31_7_MAX (0x01FFFFFFU)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_CORR_ERR_MASK (0x00000001U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_CORR_ERR_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_CORR_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_UNCORR_ERR_MASK (0x00000002U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_UNCORR_ERR_SHIFT (0x00000001U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_UNCORR_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_DAP_ERR_MASK (0x00000004U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_DAP_ERR_SHIFT (0x00000002U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_DAP_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_CSR_ERR_MASK (0x00000008U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_CSR_ERR_SHIFT (0x00000003U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_CSR_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_TRANS_TO_ERR_MASK (0x00000010U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_TRANS_TO_ERR_SHIFT (0x00000004U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_TRANS_TO_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_PROTOCOL_ERR_MASK (0x00000020U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_PROTOCOL_ERR_SHIFT (0x00000005U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_PROTOCOL_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_INTEGRITY_ERR_MASK (0x00000040U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_INTEGRITY_ERR_SHIFT (0x00000006U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_INTEGRITY_ERR_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_RESERVED_31_7_MASK (0xFFFFFF80U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_RESERVED_31_7_SHIFT (0x00000007U)

#define	CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_RESERVED_31_7_MAX (0x01FFFFFFU)

#define	CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_ADDR_MASK (0x00FFFFFFU)

#define	CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_ADDR_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_ADDR_MAX (0x00FFFFFFU)

#define	CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_INST_MASK (0xFF000000U)

#define	CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_INST_SHIFT (0x00000018U)

#define	CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_INST_MAX (0x000000FFU)

#define	CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_ADDR_MASK (0x00FFFFFFU)

#define	CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_ADDR_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_ADDR_MAX (0x00FFFFFFU)

#define	CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_INST_MASK (0xFF000000U)

#define	CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_INST_SHIFT (0x00000018U)

#define	CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_INST_MAX (0x000000FFU)

#define	CSL_CSIRX_ASF_SRAM_FAULT_STATS_ASF_SRAM_FAULT_CORR_STATS_MASK (0x0000FFFFU)

#define	CSL_CSIRX_ASF_SRAM_FAULT_STATS_ASF_SRAM_FAULT_CORR_STATS_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_SRAM_FAULT_STATS_ASF_SRAM_FAULT_CORR_STATS_MAX (0x0000FFFFU)

#define	CSL_CSIRX_ASF_SRAM_FAULT_STATS_RESERVED_31_16_MASK (0xFFFF0000U)

#define	CSL_CSIRX_ASF_SRAM_FAULT_STATS_RESERVED_31_16_SHIFT (0x00000010U)

#define	CSL_CSIRX_ASF_SRAM_FAULT_STATS_RESERVED_31_16_MAX (0x0000FFFFU)

#define	CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_CTRL_MASK (0x0000FFFFU)

#define	CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_CTRL_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_CTRL_MAX (0x0000FFFFU)

#define	CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_EN_MASK (0x80000000U)

#define	CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_EN_SHIFT (0x0000001FU)

#define	CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_EN_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_TRANS_TO_FAULT_MASK_ASF_TRANS_TO_FAULT_0_MASK_MASK (0x00000001U)

#define	CSL_CSIRX_ASF_TRANS_TO_FAULT_MASK_ASF_TRANS_TO_FAULT_0_MASK_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_TRANS_TO_FAULT_MASK_ASF_TRANS_TO_FAULT_0_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_TRANS_TO_FAULT_STATUS_ASF_TRANS_TO_FAULT_0_STATUS_MASK (0x00000001U)

#define	CSL_CSIRX_ASF_TRANS_TO_FAULT_STATUS_ASF_TRANS_TO_FAULT_0_STATUS_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_TRANS_TO_FAULT_STATUS_ASF_TRANS_TO_FAULT_0_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_0_MASK_MASK (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_0_MASK_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_0_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_1_MASK_MASK (0x00000002U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_1_MASK_SHIFT (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_1_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_2_MASK_MASK (0x00000004U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_2_MASK_SHIFT (0x00000002U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_2_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_3_MASK_MASK (0x00000008U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_3_MASK_SHIFT (0x00000003U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_3_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_4_MASK_MASK (0x00000010U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_4_MASK_SHIFT (0x00000004U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_4_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_5_MASK_MASK (0x00000020U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_5_MASK_SHIFT (0x00000005U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_5_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_6_MASK_MASK (0x00000040U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_6_MASK_SHIFT (0x00000006U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_6_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_7_MASK_MASK (0x00000080U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_7_MASK_SHIFT (0x00000007U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_7_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_8_MASK_MASK (0x00000100U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_8_MASK_SHIFT (0x00000008U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_8_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_9_MASK_MASK (0x00000200U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_9_MASK_SHIFT (0x00000009U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_9_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_10_MASK_MASK (0x00000400U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_10_MASK_SHIFT (0x0000000AU)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_10_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_11_MASK_MASK (0x00000800U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_11_MASK_SHIFT (0x0000000BU)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_11_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_12_MASK_MASK (0x00001000U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_12_MASK_SHIFT (0x0000000CU)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_12_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_13_MASK_MASK (0x00002000U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_13_MASK_SHIFT (0x0000000DU)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_13_MASK_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_0_STATUS_MASK (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_0_STATUS_SHIFT (0x00000000U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_0_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_1_STATUS_MASK (0x00000002U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_1_STATUS_SHIFT (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_1_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_2_STATUS_MASK (0x00000004U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_2_STATUS_SHIFT (0x00000002U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_2_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_3_STATUS_MASK (0x00000008U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_3_STATUS_SHIFT (0x00000003U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_3_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_4_STATUS_MASK (0x00000010U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_4_STATUS_SHIFT (0x00000004U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_4_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_5_STATUS_MASK (0x00000020U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_5_STATUS_SHIFT (0x00000005U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_5_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_6_STATUS_MASK (0x00000040U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_6_STATUS_SHIFT (0x00000006U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_6_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_7_STATUS_MASK (0x00000080U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_7_STATUS_SHIFT (0x00000007U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_7_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_8_STATUS_MASK (0x00000100U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_8_STATUS_SHIFT (0x00000008U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_8_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_9_STATUS_MASK (0x00000200U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_9_STATUS_SHIFT (0x00000009U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_9_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_10_STATUS_MASK (0x00000400U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_10_STATUS_SHIFT (0x0000000AU)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_10_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_11_STATUS_MASK (0x00000800U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_11_STATUS_SHIFT (0x0000000BU)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_11_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_12_STATUS_MASK (0x00001000U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_12_STATUS_SHIFT (0x0000000CU)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_12_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_13_STATUS_MASK (0x00002000U)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_13_STATUS_SHIFT (0x0000000DU)

#define	CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_13_STATUS_MAX (0x00000001U)

#define	CSL_CSIRX_ID_PROD_VER_VERSION_ID_MASK (0x0000FFFFU)

#define	CSL_CSIRX_ID_PROD_VER_VERSION_ID_SHIFT (0x00000000U)

#define	CSL_CSIRX_ID_PROD_VER_VERSION_ID_MAX (0x0000FFFFU)

#define	CSL_CSIRX_ID_PROD_VER_PRODUCT_ID_MASK (0xFFFF0000U)

#define	CSL_CSIRX_ID_PROD_VER_PRODUCT_ID_SHIFT (0x00000010U)

#define	CSL_CSIRX_ID_PROD_VER_PRODUCT_ID_MAX (0x0000FFFFU)

Macro Definition Documentation

◆ CSL_CSIRX_DEVICE_CONFIG

#define CSL_CSIRX_DEVICE_CONFIG (0x00000000U)

◆ CSL_CSIRX_SOFT_RESET

#define CSL_CSIRX_SOFT_RESET (0x00000004U)

◆ CSL_CSIRX_STATIC_CFG

#define CSL_CSIRX_STATIC_CFG (0x00000008U)

◆ CSL_CSIRX_ERROR_BYPASS_CFG

#define CSL_CSIRX_ERROR_BYPASS_CFG (0x00000010U)

◆ CSL_CSIRX_MONITOR_IRQS

#define CSL_CSIRX_MONITOR_IRQS (0x00000018U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG (0x0000001CU)

◆ CSL_CSIRX_INFO_IRQS

#define CSL_CSIRX_INFO_IRQS (0x00000020U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG

#define CSL_CSIRX_INFO_IRQS_MASK_CFG (0x00000024U)

◆ CSL_CSIRX_ERROR_IRQS

#define CSL_CSIRX_ERROR_IRQS (0x00000028U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG (0x0000002CU)

◆ CSL_CSIRX_DPHY_LANE_CONTROL

#define CSL_CSIRX_DPHY_LANE_CONTROL (0x00000040U)

◆ CSL_CSIRX_DPHY_STATUS

#define CSL_CSIRX_DPHY_STATUS (0x00000048U)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ (0x0000004CU)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG (0x00000050U)

◆ CSL_CSIRX_INTEGRATION_DEBUG

#define CSL_CSIRX_INTEGRATION_DEBUG (0x00000060U)

◆ CSL_CSIRX_ERROR_DEBUG

#define CSL_CSIRX_ERROR_DEBUG (0x00000074U)

◆ CSL_CSIRX_TEST_GENERIC

#define CSL_CSIRX_TEST_GENERIC (0x00000080U)

◆ CSL_CSIRX_STREAM0_CTRL

#define CSL_CSIRX_STREAM0_CTRL (0x00000100U)

◆ CSL_CSIRX_STREAM0_STATUS

#define CSL_CSIRX_STREAM0_STATUS (0x00000104U)

◆ CSL_CSIRX_STREAM0_DATA_CFG

#define CSL_CSIRX_STREAM0_DATA_CFG (0x00000108U)

◆ CSL_CSIRX_STREAM0_CFG

#define CSL_CSIRX_STREAM0_CFG (0x0000010CU)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL

#define CSL_CSIRX_STREAM0_MONITOR_CTRL (0x00000110U)

◆ CSL_CSIRX_STREAM0_MONITOR_FRAME

#define CSL_CSIRX_STREAM0_MONITOR_FRAME (0x00000114U)

◆ CSL_CSIRX_STREAM0_MONITOR_LB

#define CSL_CSIRX_STREAM0_MONITOR_LB (0x00000118U)

◆ CSL_CSIRX_STREAM0_TIMER

#define CSL_CSIRX_STREAM0_TIMER (0x0000011CU)

◆ CSL_CSIRX_STREAM0_FCC_CFG

#define CSL_CSIRX_STREAM0_FCC_CFG (0x00000120U)

◆ CSL_CSIRX_STREAM0_FCC_CTRL

#define CSL_CSIRX_STREAM0_FCC_CTRL (0x00000124U)

◆ CSL_CSIRX_STREAM0_FIFO_FILL_LVL

#define CSL_CSIRX_STREAM0_FIFO_FILL_LVL (0x00000128U)

◆ CSL_CSIRX_STREAM1_CTRL

#define CSL_CSIRX_STREAM1_CTRL (0x00000200U)

◆ CSL_CSIRX_STREAM1_STATUS

#define CSL_CSIRX_STREAM1_STATUS (0x00000204U)

◆ CSL_CSIRX_STREAM1_DATA_CFG

#define CSL_CSIRX_STREAM1_DATA_CFG (0x00000208U)

◆ CSL_CSIRX_STREAM1_CFG

#define CSL_CSIRX_STREAM1_CFG (0x0000020CU)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL

#define CSL_CSIRX_STREAM1_MONITOR_CTRL (0x00000210U)

◆ CSL_CSIRX_STREAM1_MONITOR_FRAME

#define CSL_CSIRX_STREAM1_MONITOR_FRAME (0x00000214U)

◆ CSL_CSIRX_STREAM1_MONITOR_LB

#define CSL_CSIRX_STREAM1_MONITOR_LB (0x00000218U)

◆ CSL_CSIRX_STREAM1_TIMER

#define CSL_CSIRX_STREAM1_TIMER (0x0000021CU)

◆ CSL_CSIRX_STREAM1_FCC_CFG

#define CSL_CSIRX_STREAM1_FCC_CFG (0x00000220U)

◆ CSL_CSIRX_STREAM1_FCC_CTRL

#define CSL_CSIRX_STREAM1_FCC_CTRL (0x00000224U)

◆ CSL_CSIRX_STREAM1_FIFO_FILL_LVL

#define CSL_CSIRX_STREAM1_FIFO_FILL_LVL (0x00000228U)

◆ CSL_CSIRX_STREAM2_CTRL

#define CSL_CSIRX_STREAM2_CTRL (0x00000300U)

◆ CSL_CSIRX_STREAM2_STATUS

#define CSL_CSIRX_STREAM2_STATUS (0x00000304U)

◆ CSL_CSIRX_STREAM2_DATA_CFG

#define CSL_CSIRX_STREAM2_DATA_CFG (0x00000308U)

◆ CSL_CSIRX_STREAM2_CFG

#define CSL_CSIRX_STREAM2_CFG (0x0000030CU)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL

#define CSL_CSIRX_STREAM2_MONITOR_CTRL (0x00000310U)

◆ CSL_CSIRX_STREAM2_MONITOR_FRAME

#define CSL_CSIRX_STREAM2_MONITOR_FRAME (0x00000314U)

◆ CSL_CSIRX_STREAM2_MONITOR_LB

#define CSL_CSIRX_STREAM2_MONITOR_LB (0x00000318U)

◆ CSL_CSIRX_STREAM2_TIMER

#define CSL_CSIRX_STREAM2_TIMER (0x0000031CU)

◆ CSL_CSIRX_STREAM2_FCC_CFG

#define CSL_CSIRX_STREAM2_FCC_CFG (0x00000320U)

◆ CSL_CSIRX_STREAM2_FCC_CTRL

#define CSL_CSIRX_STREAM2_FCC_CTRL (0x00000324U)

◆ CSL_CSIRX_STREAM2_FIFO_FILL_LVL

#define CSL_CSIRX_STREAM2_FIFO_FILL_LVL (0x00000328U)

◆ CSL_CSIRX_STREAM3_CTRL

#define CSL_CSIRX_STREAM3_CTRL (0x00000400U)

◆ CSL_CSIRX_STREAM3_STATUS

#define CSL_CSIRX_STREAM3_STATUS (0x00000404U)

◆ CSL_CSIRX_STREAM3_DATA_CFG

#define CSL_CSIRX_STREAM3_DATA_CFG (0x00000408U)

◆ CSL_CSIRX_STREAM3_CFG

#define CSL_CSIRX_STREAM3_CFG (0x0000040CU)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL

#define CSL_CSIRX_STREAM3_MONITOR_CTRL (0x00000410U)

◆ CSL_CSIRX_STREAM3_MONITOR_FRAME

#define CSL_CSIRX_STREAM3_MONITOR_FRAME (0x00000414U)

◆ CSL_CSIRX_STREAM3_MONITOR_LB

#define CSL_CSIRX_STREAM3_MONITOR_LB (0x00000418U)

◆ CSL_CSIRX_STREAM3_TIMER

#define CSL_CSIRX_STREAM3_TIMER (0x0000041CU)

◆ CSL_CSIRX_STREAM3_FCC_CFG

#define CSL_CSIRX_STREAM3_FCC_CFG (0x00000420U)

◆ CSL_CSIRX_STREAM3_FCC_CTRL

#define CSL_CSIRX_STREAM3_FCC_CTRL (0x00000424U)

◆ CSL_CSIRX_STREAM3_FIFO_FILL_LVL

#define CSL_CSIRX_STREAM3_FIFO_FILL_LVL (0x00000428U)

◆ CSL_CSIRX_ASF_INT_STATUS

#define CSL_CSIRX_ASF_INT_STATUS (0x00000900U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS

#define CSL_CSIRX_ASF_INT_RAW_STATUS (0x00000904U)

◆ CSL_CSIRX_ASF_INT_MASK

#define CSL_CSIRX_ASF_INT_MASK (0x00000908U)

◆ CSL_CSIRX_ASF_INT_TEST

#define CSL_CSIRX_ASF_INT_TEST (0x0000090CU)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT (0x00000910U)

◆ CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS

#define CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS (0x00000920U)

◆ CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS

#define CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS (0x00000924U)

◆ CSL_CSIRX_ASF_SRAM_FAULT_STATS

#define CSL_CSIRX_ASF_SRAM_FAULT_STATS (0x00000928U)

◆ CSL_CSIRX_ASF_TRANS_TO_CTRL

#define CSL_CSIRX_ASF_TRANS_TO_CTRL (0x00000930U)

◆ CSL_CSIRX_ASF_TRANS_TO_FAULT_MASK

#define CSL_CSIRX_ASF_TRANS_TO_FAULT_MASK (0x00000934U)

◆ CSL_CSIRX_ASF_TRANS_TO_FAULT_STATUS

#define CSL_CSIRX_ASF_TRANS_TO_FAULT_STATUS (0x00000938U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK (0x00000940U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS (0x00000944U)

◆ CSL_CSIRX_ID_PROD_VER

#define CSL_CSIRX_ID_PROD_VER (0x00000FFCU)

◆ CSL_CSIRX_DEVICE_CONFIG_MAX_LANE_NB_MASK

#define CSL_CSIRX_DEVICE_CONFIG_MAX_LANE_NB_MASK (0x00000007U)

◆ CSL_CSIRX_DEVICE_CONFIG_MAX_LANE_NB_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_MAX_LANE_NB_SHIFT (0x00000000U)

◆ CSL_CSIRX_DEVICE_CONFIG_MAX_LANE_NB_MAX

#define CSL_CSIRX_DEVICE_CONFIG_MAX_LANE_NB_MAX (0x00000007U)

◆ CSL_CSIRX_DEVICE_CONFIG_CDNS_PHY_PRESENT_MASK

#define CSL_CSIRX_DEVICE_CONFIG_CDNS_PHY_PRESENT_MASK (0x00000008U)

◆ CSL_CSIRX_DEVICE_CONFIG_CDNS_PHY_PRESENT_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_CDNS_PHY_PRESENT_SHIFT (0x00000003U)

◆ CSL_CSIRX_DEVICE_CONFIG_CDNS_PHY_PRESENT_MAX

#define CSL_CSIRX_DEVICE_CONFIG_CDNS_PHY_PRESENT_MAX (0x00000001U)

◆ CSL_CSIRX_DEVICE_CONFIG_NUM_STREAMS_MASK

#define CSL_CSIRX_DEVICE_CONFIG_NUM_STREAMS_MASK (0x00000070U)

◆ CSL_CSIRX_DEVICE_CONFIG_NUM_STREAMS_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_NUM_STREAMS_SHIFT (0x00000004U)

◆ CSL_CSIRX_DEVICE_CONFIG_NUM_STREAMS_MAX

#define CSL_CSIRX_DEVICE_CONFIG_NUM_STREAMS_MAX (0x00000007U)

◆ CSL_CSIRX_DEVICE_CONFIG_DATAPATH_SIZE_MASK

#define CSL_CSIRX_DEVICE_CONFIG_DATAPATH_SIZE_MASK (0x00000180U)

◆ CSL_CSIRX_DEVICE_CONFIG_DATAPATH_SIZE_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_DATAPATH_SIZE_SHIFT (0x00000007U)

◆ CSL_CSIRX_DEVICE_CONFIG_DATAPATH_SIZE_MAX

#define CSL_CSIRX_DEVICE_CONFIG_DATAPATH_SIZE_MAX (0x00000003U)

◆ CSL_CSIRX_DEVICE_CONFIG_VCX_CONFIG_MASK

#define CSL_CSIRX_DEVICE_CONFIG_VCX_CONFIG_MASK (0x00000200U)

◆ CSL_CSIRX_DEVICE_CONFIG_VCX_CONFIG_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_VCX_CONFIG_SHIFT (0x00000009U)

◆ CSL_CSIRX_DEVICE_CONFIG_VCX_CONFIG_MAX

#define CSL_CSIRX_DEVICE_CONFIG_VCX_CONFIG_MAX (0x00000001U)

◆ CSL_CSIRX_DEVICE_CONFIG_ASF_CONFIG_MASK

#define CSL_CSIRX_DEVICE_CONFIG_ASF_CONFIG_MASK (0x00000400U)

◆ CSL_CSIRX_DEVICE_CONFIG_ASF_CONFIG_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_ASF_CONFIG_SHIFT (0x0000000AU)

◆ CSL_CSIRX_DEVICE_CONFIG_ASF_CONFIG_MAX

#define CSL_CSIRX_DEVICE_CONFIG_ASF_CONFIG_MAX (0x00000001U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM0_FIFO_MODE_MASK

#define CSL_CSIRX_DEVICE_CONFIG_STREAM0_FIFO_MODE_MASK (0x00003000U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM0_FIFO_MODE_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_STREAM0_FIFO_MODE_SHIFT (0x0000000CU)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM0_FIFO_MODE_MAX

#define CSL_CSIRX_DEVICE_CONFIG_STREAM0_FIFO_MODE_MAX (0x00000003U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM0_NUM_PIXELS_MASK

#define CSL_CSIRX_DEVICE_CONFIG_STREAM0_NUM_PIXELS_MASK (0x0000C000U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM0_NUM_PIXELS_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_STREAM0_NUM_PIXELS_SHIFT (0x0000000EU)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM0_NUM_PIXELS_MAX

#define CSL_CSIRX_DEVICE_CONFIG_STREAM0_NUM_PIXELS_MAX (0x00000003U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM0_MONITOR_PRESENT_MASK

#define CSL_CSIRX_DEVICE_CONFIG_STREAM0_MONITOR_PRESENT_MASK (0x00010000U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM0_MONITOR_PRESENT_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_STREAM0_MONITOR_PRESENT_SHIFT (0x00000010U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM0_MONITOR_PRESENT_MAX

#define CSL_CSIRX_DEVICE_CONFIG_STREAM0_MONITOR_PRESENT_MAX (0x00000001U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM1_FIFO_MODE_MASK

#define CSL_CSIRX_DEVICE_CONFIG_STREAM1_FIFO_MODE_MASK (0x00060000U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM1_FIFO_MODE_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_STREAM1_FIFO_MODE_SHIFT (0x00000011U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM1_FIFO_MODE_MAX

#define CSL_CSIRX_DEVICE_CONFIG_STREAM1_FIFO_MODE_MAX (0x00000003U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM1_NUM_PIXELS_MASK

#define CSL_CSIRX_DEVICE_CONFIG_STREAM1_NUM_PIXELS_MASK (0x00180000U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM1_NUM_PIXELS_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_STREAM1_NUM_PIXELS_SHIFT (0x00000013U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM1_NUM_PIXELS_MAX

#define CSL_CSIRX_DEVICE_CONFIG_STREAM1_NUM_PIXELS_MAX (0x00000003U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM1_MONITOR_PRESENT_MASK

#define CSL_CSIRX_DEVICE_CONFIG_STREAM1_MONITOR_PRESENT_MASK (0x00200000U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM1_MONITOR_PRESENT_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_STREAM1_MONITOR_PRESENT_SHIFT (0x00000015U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM1_MONITOR_PRESENT_MAX

#define CSL_CSIRX_DEVICE_CONFIG_STREAM1_MONITOR_PRESENT_MAX (0x00000001U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM2_FIFO_MODE_MASK

#define CSL_CSIRX_DEVICE_CONFIG_STREAM2_FIFO_MODE_MASK (0x00C00000U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM2_FIFO_MODE_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_STREAM2_FIFO_MODE_SHIFT (0x00000016U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM2_FIFO_MODE_MAX

#define CSL_CSIRX_DEVICE_CONFIG_STREAM2_FIFO_MODE_MAX (0x00000003U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM2_NUM_PIXELS_MASK

#define CSL_CSIRX_DEVICE_CONFIG_STREAM2_NUM_PIXELS_MASK (0x03000000U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM2_NUM_PIXELS_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_STREAM2_NUM_PIXELS_SHIFT (0x00000018U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM2_NUM_PIXELS_MAX

#define CSL_CSIRX_DEVICE_CONFIG_STREAM2_NUM_PIXELS_MAX (0x00000003U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM2_MONITOR_PRESENT_MASK

#define CSL_CSIRX_DEVICE_CONFIG_STREAM2_MONITOR_PRESENT_MASK (0x04000000U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM2_MONITOR_PRESENT_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_STREAM2_MONITOR_PRESENT_SHIFT (0x0000001AU)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM2_MONITOR_PRESENT_MAX

#define CSL_CSIRX_DEVICE_CONFIG_STREAM2_MONITOR_PRESENT_MAX (0x00000001U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM3_FIFO_MODE_MASK

#define CSL_CSIRX_DEVICE_CONFIG_STREAM3_FIFO_MODE_MASK (0x18000000U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM3_FIFO_MODE_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_STREAM3_FIFO_MODE_SHIFT (0x0000001BU)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM3_FIFO_MODE_MAX

#define CSL_CSIRX_DEVICE_CONFIG_STREAM3_FIFO_MODE_MAX (0x00000003U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM3_NUM_PIXELS_MASK

#define CSL_CSIRX_DEVICE_CONFIG_STREAM3_NUM_PIXELS_MASK (0x60000000U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM3_NUM_PIXELS_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_STREAM3_NUM_PIXELS_SHIFT (0x0000001DU)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM3_NUM_PIXELS_MAX

#define CSL_CSIRX_DEVICE_CONFIG_STREAM3_NUM_PIXELS_MAX (0x00000003U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM3_MONITOR_PRESENT_MASK

#define CSL_CSIRX_DEVICE_CONFIG_STREAM3_MONITOR_PRESENT_MASK (0x80000000U)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM3_MONITOR_PRESENT_SHIFT

#define CSL_CSIRX_DEVICE_CONFIG_STREAM3_MONITOR_PRESENT_SHIFT (0x0000001FU)

◆ CSL_CSIRX_DEVICE_CONFIG_STREAM3_MONITOR_PRESENT_MAX

#define CSL_CSIRX_DEVICE_CONFIG_STREAM3_MONITOR_PRESENT_MAX (0x00000001U)

◆ CSL_CSIRX_SOFT_RESET_FRONT_MASK

#define CSL_CSIRX_SOFT_RESET_FRONT_MASK (0x00000001U)

◆ CSL_CSIRX_SOFT_RESET_FRONT_SHIFT

#define CSL_CSIRX_SOFT_RESET_FRONT_SHIFT (0x00000000U)

◆ CSL_CSIRX_SOFT_RESET_FRONT_MAX

#define CSL_CSIRX_SOFT_RESET_FRONT_MAX (0x00000001U)

◆ CSL_CSIRX_SOFT_RESET_PROTOCOL_MASK

#define CSL_CSIRX_SOFT_RESET_PROTOCOL_MASK (0x00000002U)

◆ CSL_CSIRX_SOFT_RESET_PROTOCOL_SHIFT

#define CSL_CSIRX_SOFT_RESET_PROTOCOL_SHIFT (0x00000001U)

◆ CSL_CSIRX_SOFT_RESET_PROTOCOL_MAX

#define CSL_CSIRX_SOFT_RESET_PROTOCOL_MAX (0x00000001U)

◆ CSL_CSIRX_STATIC_CFG_SEL_MASK

#define CSL_CSIRX_STATIC_CFG_SEL_MASK (0x00000003U)

◆ CSL_CSIRX_STATIC_CFG_SEL_SHIFT

#define CSL_CSIRX_STATIC_CFG_SEL_SHIFT (0x00000000U)

◆ CSL_CSIRX_STATIC_CFG_SEL_MAX

#define CSL_CSIRX_STATIC_CFG_SEL_MAX (0x00000003U)

◆ CSL_CSIRX_STATIC_CFG_V2P0_SUPPORT_ENABLE_MASK

#define CSL_CSIRX_STATIC_CFG_V2P0_SUPPORT_ENABLE_MASK (0x00000010U)

◆ CSL_CSIRX_STATIC_CFG_V2P0_SUPPORT_ENABLE_SHIFT

#define CSL_CSIRX_STATIC_CFG_V2P0_SUPPORT_ENABLE_SHIFT (0x00000004U)

◆ CSL_CSIRX_STATIC_CFG_V2P0_SUPPORT_ENABLE_MAX

#define CSL_CSIRX_STATIC_CFG_V2P0_SUPPORT_ENABLE_MAX (0x00000001U)

◆ CSL_CSIRX_STATIC_CFG_LANE_NB_MASK

#define CSL_CSIRX_STATIC_CFG_LANE_NB_MASK (0x00000700U)

◆ CSL_CSIRX_STATIC_CFG_LANE_NB_SHIFT

#define CSL_CSIRX_STATIC_CFG_LANE_NB_SHIFT (0x00000008U)

◆ CSL_CSIRX_STATIC_CFG_LANE_NB_MAX

#define CSL_CSIRX_STATIC_CFG_LANE_NB_MAX (0x00000007U)

◆ CSL_CSIRX_STATIC_CFG_DL0_MAP_MASK

#define CSL_CSIRX_STATIC_CFG_DL0_MAP_MASK (0x00070000U)

◆ CSL_CSIRX_STATIC_CFG_DL0_MAP_SHIFT

#define CSL_CSIRX_STATIC_CFG_DL0_MAP_SHIFT (0x00000010U)

◆ CSL_CSIRX_STATIC_CFG_DL0_MAP_MAX

#define CSL_CSIRX_STATIC_CFG_DL0_MAP_MAX (0x00000007U)

◆ CSL_CSIRX_STATIC_CFG_DL1_MAP_MASK

#define CSL_CSIRX_STATIC_CFG_DL1_MAP_MASK (0x00700000U)

◆ CSL_CSIRX_STATIC_CFG_DL1_MAP_SHIFT

#define CSL_CSIRX_STATIC_CFG_DL1_MAP_SHIFT (0x00000014U)

◆ CSL_CSIRX_STATIC_CFG_DL1_MAP_MAX

#define CSL_CSIRX_STATIC_CFG_DL1_MAP_MAX (0x00000007U)

◆ CSL_CSIRX_STATIC_CFG_DL2_MAP_MASK

#define CSL_CSIRX_STATIC_CFG_DL2_MAP_MASK (0x07000000U)

◆ CSL_CSIRX_STATIC_CFG_DL2_MAP_SHIFT

#define CSL_CSIRX_STATIC_CFG_DL2_MAP_SHIFT (0x00000018U)

◆ CSL_CSIRX_STATIC_CFG_DL2_MAP_MAX

#define CSL_CSIRX_STATIC_CFG_DL2_MAP_MAX (0x00000007U)

◆ CSL_CSIRX_STATIC_CFG_DL3_MAP_MASK

#define CSL_CSIRX_STATIC_CFG_DL3_MAP_MASK (0x70000000U)

◆ CSL_CSIRX_STATIC_CFG_DL3_MAP_SHIFT

#define CSL_CSIRX_STATIC_CFG_DL3_MAP_SHIFT (0x0000001CU)

◆ CSL_CSIRX_STATIC_CFG_DL3_MAP_MAX

#define CSL_CSIRX_STATIC_CFG_DL3_MAP_MAX (0x00000007U)

◆ CSL_CSIRX_ERROR_BYPASS_CFG_CRC_MASK

#define CSL_CSIRX_ERROR_BYPASS_CFG_CRC_MASK (0x00000001U)

◆ CSL_CSIRX_ERROR_BYPASS_CFG_CRC_SHIFT

#define CSL_CSIRX_ERROR_BYPASS_CFG_CRC_SHIFT (0x00000000U)

◆ CSL_CSIRX_ERROR_BYPASS_CFG_CRC_MAX

#define CSL_CSIRX_ERROR_BYPASS_CFG_CRC_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_BYPASS_CFG_ECC_MASK

#define CSL_CSIRX_ERROR_BYPASS_CFG_ECC_MASK (0x00000002U)

◆ CSL_CSIRX_ERROR_BYPASS_CFG_ECC_SHIFT

#define CSL_CSIRX_ERROR_BYPASS_CFG_ECC_SHIFT (0x00000001U)

◆ CSL_CSIRX_ERROR_BYPASS_CFG_ECC_MAX

#define CSL_CSIRX_ERROR_BYPASS_CFG_ECC_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_BYPASS_CFG_DATA_ID_MASK

#define CSL_CSIRX_ERROR_BYPASS_CFG_DATA_ID_MASK (0x00000004U)

◆ CSL_CSIRX_ERROR_BYPASS_CFG_DATA_ID_SHIFT

#define CSL_CSIRX_ERROR_BYPASS_CFG_DATA_ID_SHIFT (0x00000002U)

◆ CSL_CSIRX_ERROR_BYPASS_CFG_DATA_ID_MAX

#define CSL_CSIRX_ERROR_BYPASS_CFG_DATA_ID_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_TIMER_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_TIMER_IRQ_MASK (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_TIMER_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_TIMER_IRQ_SHIFT (0x00000000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_TIMER_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_TIMER_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_LB_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_LB_IRQ_MASK (0x00000002U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_LB_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_LB_IRQ_SHIFT (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_LB_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_LB_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_IRQ_MASK (0x00000004U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_IRQ_SHIFT (0x00000002U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_START_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_START_IRQ_MASK (0x00000008U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_START_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_START_IRQ_SHIFT (0x00000003U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_START_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_START_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_STOP_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_STOP_IRQ_MASK (0x00000010U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_STOP_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_STOP_IRQ_SHIFT (0x00000004U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_STOP_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FCC_STOP_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_CNT_ERROR_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_CNT_ERROR_IRQ_MASK (0x00000020U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_CNT_ERROR_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_CNT_ERROR_IRQ_SHIFT (0x00000005U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_CNT_ERROR_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_CNT_ERROR_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_MISMATCH_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_MISMATCH_IRQ_MASK (0x00000040U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_MISMATCH_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_MISMATCH_IRQ_SHIFT (0x00000006U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_MISMATCH_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_FRAME_MISMATCH_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_LINE_CNT_ERROR_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_LINE_CNT_ERROR_IRQ_MASK (0x00000080U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_LINE_CNT_ERROR_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_LINE_CNT_ERROR_IRQ_SHIFT (0x00000007U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM0_LINE_CNT_ERROR_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM0_LINE_CNT_ERROR_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_TIMER_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_TIMER_IRQ_MASK (0x00000100U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_TIMER_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_TIMER_IRQ_SHIFT (0x00000008U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_TIMER_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_TIMER_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_LB_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_LB_IRQ_MASK (0x00000200U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_LB_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_LB_IRQ_SHIFT (0x00000009U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_LB_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_LB_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_IRQ_MASK (0x00000400U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_IRQ_SHIFT (0x0000000AU)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_START_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_START_IRQ_MASK (0x00000800U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_START_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_START_IRQ_SHIFT (0x0000000BU)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_START_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_START_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_STOP_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_STOP_IRQ_MASK (0x00001000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_STOP_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_STOP_IRQ_SHIFT (0x0000000CU)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_STOP_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FCC_STOP_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_CNT_ERROR_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_CNT_ERROR_IRQ_MASK (0x00002000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_CNT_ERROR_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_CNT_ERROR_IRQ_SHIFT (0x0000000DU)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_CNT_ERROR_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_CNT_ERROR_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_MISMATCH_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_MISMATCH_IRQ_MASK (0x00004000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_MISMATCH_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_MISMATCH_IRQ_SHIFT (0x0000000EU)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_MISMATCH_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_FRAME_MISMATCH_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_LINE_CNT_ERROR_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_LINE_CNT_ERROR_IRQ_MASK (0x00008000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_LINE_CNT_ERROR_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_LINE_CNT_ERROR_IRQ_SHIFT (0x0000000FU)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM1_LINE_CNT_ERROR_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM1_LINE_CNT_ERROR_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_TIMER_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_TIMER_IRQ_MASK (0x00010000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_TIMER_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_TIMER_IRQ_SHIFT (0x00000010U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_TIMER_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_TIMER_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_LB_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_LB_IRQ_MASK (0x00020000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_LB_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_LB_IRQ_SHIFT (0x00000011U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_LB_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_LB_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_IRQ_MASK (0x00040000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_IRQ_SHIFT (0x00000012U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_START_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_START_IRQ_MASK (0x00080000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_START_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_START_IRQ_SHIFT (0x00000013U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_START_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_START_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_STOP_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_STOP_IRQ_MASK (0x00100000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_STOP_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_STOP_IRQ_SHIFT (0x00000014U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_STOP_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FCC_STOP_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_CNT_ERROR_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_CNT_ERROR_IRQ_MASK (0x00200000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_CNT_ERROR_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_CNT_ERROR_IRQ_SHIFT (0x00000015U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_CNT_ERROR_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_CNT_ERROR_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_MISMATCH_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_MISMATCH_IRQ_MASK (0x00400000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_MISMATCH_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_MISMATCH_IRQ_SHIFT (0x00000016U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_MISMATCH_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_FRAME_MISMATCH_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_LINE_CNT_ERROR_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_LINE_CNT_ERROR_IRQ_MASK (0x00800000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_LINE_CNT_ERROR_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_LINE_CNT_ERROR_IRQ_SHIFT (0x00000017U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM2_LINE_CNT_ERROR_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM2_LINE_CNT_ERROR_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_TIMER_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_TIMER_IRQ_MASK (0x01000000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_TIMER_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_TIMER_IRQ_SHIFT (0x00000018U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_TIMER_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_TIMER_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_LB_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_LB_IRQ_MASK (0x02000000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_LB_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_LB_IRQ_SHIFT (0x00000019U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_LB_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_LB_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_IRQ_MASK (0x04000000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_IRQ_SHIFT (0x0000001AU)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_START_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_START_IRQ_MASK (0x08000000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_START_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_START_IRQ_SHIFT (0x0000001BU)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_START_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_START_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_STOP_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_STOP_IRQ_MASK (0x10000000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_STOP_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_STOP_IRQ_SHIFT (0x0000001CU)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_STOP_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FCC_STOP_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_CNT_ERROR_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_CNT_ERROR_IRQ_MASK (0x20000000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_CNT_ERROR_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_CNT_ERROR_IRQ_SHIFT (0x0000001DU)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_CNT_ERROR_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_CNT_ERROR_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_MISMATCH_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_MISMATCH_IRQ_MASK (0x40000000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_MISMATCH_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_MISMATCH_IRQ_SHIFT (0x0000001EU)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_MISMATCH_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_FRAME_MISMATCH_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_LINE_CNT_ERROR_IRQ_MASK

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_LINE_CNT_ERROR_IRQ_MASK (0x80000000U)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_LINE_CNT_ERROR_IRQ_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_LINE_CNT_ERROR_IRQ_SHIFT (0x0000001FU)

◆ CSL_CSIRX_MONITOR_IRQS_STREAM3_LINE_CNT_ERROR_IRQ_MAX

#define CSL_CSIRX_MONITOR_IRQS_STREAM3_LINE_CNT_ERROR_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_TIMER_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_TIMER_IRQM_MASK (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_TIMER_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_TIMER_IRQM_SHIFT (0x00000000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_TIMER_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_TIMER_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LB_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LB_IRQM_MASK (0x00000002U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LB_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LB_IRQM_SHIFT (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LB_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LB_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_IRQM_MASK (0x00000004U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_IRQM_SHIFT (0x00000002U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_START_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_START_IRQM_MASK (0x00000008U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_START_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_START_IRQM_SHIFT (0x00000003U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_START_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_START_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_STOP_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_STOP_IRQM_MASK (0x00000010U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_STOP_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_STOP_IRQM_SHIFT (0x00000004U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_STOP_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FCC_STOP_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_CNT_ERROR_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_CNT_ERROR_IRQM_MASK (0x00000020U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_CNT_ERROR_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_CNT_ERROR_IRQM_SHIFT (0x00000005U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_CNT_ERROR_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_CNT_ERROR_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_MISMATCH_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_MISMATCH_IRQM_MASK (0x00000040U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_MISMATCH_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_MISMATCH_IRQM_SHIFT (0x00000006U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_MISMATCH_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_FRAME_MISMATCH_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LINE_CNT_ERROR_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LINE_CNT_ERROR_IRQM_MASK (0x00000080U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LINE_CNT_ERROR_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LINE_CNT_ERROR_IRQM_SHIFT (0x00000007U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LINE_CNT_ERROR_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM0_LINE_CNT_ERROR_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_TIMER_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_TIMER_IRQM_MASK (0x00000100U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_TIMER_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_TIMER_IRQM_SHIFT (0x00000008U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_TIMER_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_TIMER_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LB_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LB_IRQM_MASK (0x00000200U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LB_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LB_IRQM_SHIFT (0x00000009U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LB_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LB_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_IRQM_MASK (0x00000400U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_IRQM_SHIFT (0x0000000AU)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_START_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_START_IRQM_MASK (0x00000800U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_START_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_START_IRQM_SHIFT (0x0000000BU)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_START_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_START_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_STOP_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_STOP_IRQM_MASK (0x00001000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_STOP_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_STOP_IRQM_SHIFT (0x0000000CU)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_STOP_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FCC_STOP_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_CNT_ERROR_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_CNT_ERROR_IRQM_MASK (0x00002000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_CNT_ERROR_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_CNT_ERROR_IRQM_SHIFT (0x0000000DU)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_CNT_ERROR_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_CNT_ERROR_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_MISMATCH_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_MISMATCH_IRQM_MASK (0x00004000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_MISMATCH_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_MISMATCH_IRQM_SHIFT (0x0000000EU)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_MISMATCH_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_FRAME_MISMATCH_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LINE_CNT_ERROR_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LINE_CNT_ERROR_IRQM_MASK (0x00008000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LINE_CNT_ERROR_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LINE_CNT_ERROR_IRQM_SHIFT (0x0000000FU)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LINE_CNT_ERROR_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM1_LINE_CNT_ERROR_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_TIMER_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_TIMER_IRQM_MASK (0x00010000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_TIMER_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_TIMER_IRQM_SHIFT (0x00000010U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_TIMER_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_TIMER_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LB_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LB_IRQM_MASK (0x00020000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LB_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LB_IRQM_SHIFT (0x00000011U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LB_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LB_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_IRQM_MASK (0x00040000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_IRQM_SHIFT (0x00000012U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_START_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_START_IRQM_MASK (0x00080000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_START_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_START_IRQM_SHIFT (0x00000013U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_START_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_START_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_STOP_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_STOP_IRQM_MASK (0x00100000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_STOP_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_STOP_IRQM_SHIFT (0x00000014U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_STOP_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FCC_STOP_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_CNT_ERROR_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_CNT_ERROR_IRQM_MASK (0x00200000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_CNT_ERROR_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_CNT_ERROR_IRQM_SHIFT (0x00000015U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_CNT_ERROR_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_CNT_ERROR_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_MISMATCH_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_MISMATCH_IRQM_MASK (0x00400000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_MISMATCH_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_MISMATCH_IRQM_SHIFT (0x00000016U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_MISMATCH_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_FRAME_MISMATCH_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LINE_CNT_ERROR_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LINE_CNT_ERROR_IRQM_MASK (0x00800000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LINE_CNT_ERROR_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LINE_CNT_ERROR_IRQM_SHIFT (0x00000017U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LINE_CNT_ERROR_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM2_LINE_CNT_ERROR_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_TIMER_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_TIMER_IRQM_MASK (0x01000000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_TIMER_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_TIMER_IRQM_SHIFT (0x00000018U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_TIMER_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_TIMER_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LB_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LB_IRQM_MASK (0x02000000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LB_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LB_IRQM_SHIFT (0x00000019U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LB_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LB_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_IRQM_MASK (0x04000000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_IRQM_SHIFT (0x0000001AU)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_START_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_START_IRQM_MASK (0x08000000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_START_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_START_IRQM_SHIFT (0x0000001BU)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_START_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_START_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_STOP_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_STOP_IRQM_MASK (0x10000000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_STOP_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_STOP_IRQM_SHIFT (0x0000001CU)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_STOP_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FCC_STOP_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_CNT_ERROR_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_CNT_ERROR_IRQM_MASK (0x20000000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_CNT_ERROR_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_CNT_ERROR_IRQM_SHIFT (0x0000001DU)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_CNT_ERROR_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_CNT_ERROR_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_MISMATCH_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_MISMATCH_IRQM_MASK (0x40000000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_MISMATCH_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_MISMATCH_IRQM_SHIFT (0x0000001EU)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_MISMATCH_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_FRAME_MISMATCH_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LINE_CNT_ERROR_IRQM_MASK

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LINE_CNT_ERROR_IRQM_MASK (0x80000000U)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LINE_CNT_ERROR_IRQM_SHIFT

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LINE_CNT_ERROR_IRQM_SHIFT (0x0000001FU)

◆ CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LINE_CNT_ERROR_IRQM_MAX

#define CSL_CSIRX_MONITOR_IRQS_MASK_CFG_STREAM3_LINE_CNT_ERROR_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_SP_RCVD_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_SP_RCVD_IRQ_MASK (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_SP_RCVD_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_SP_RCVD_IRQ_SHIFT (0x00000000U)

◆ CSL_CSIRX_INFO_IRQS_SP_RCVD_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_SP_RCVD_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_LP_RCVD_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_LP_RCVD_IRQ_MASK (0x00000002U)

◆ CSL_CSIRX_INFO_IRQS_LP_RCVD_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_LP_RCVD_IRQ_SHIFT (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_LP_RCVD_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_LP_RCVD_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_SLEEP_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_SLEEP_IRQ_MASK (0x00000004U)

◆ CSL_CSIRX_INFO_IRQS_SLEEP_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_SLEEP_IRQ_SHIFT (0x00000002U)

◆ CSL_CSIRX_INFO_IRQS_SLEEP_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_SLEEP_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_WAKEUP_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_WAKEUP_IRQ_MASK (0x00000008U)

◆ CSL_CSIRX_INFO_IRQS_WAKEUP_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_WAKEUP_IRQ_SHIFT (0x00000003U)

◆ CSL_CSIRX_INFO_IRQS_WAKEUP_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_WAKEUP_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_ECC_SPARES_NONZERO_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_ECC_SPARES_NONZERO_IRQ_MASK (0x00000010U)

◆ CSL_CSIRX_INFO_IRQS_ECC_SPARES_NONZERO_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_ECC_SPARES_NONZERO_IRQ_SHIFT (0x00000004U)

◆ CSL_CSIRX_INFO_IRQS_ECC_SPARES_NONZERO_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_ECC_SPARES_NONZERO_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_DESKEW_ENTRY_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_DESKEW_ENTRY_IRQ_MASK (0x00000020U)

◆ CSL_CSIRX_INFO_IRQS_DESKEW_ENTRY_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_DESKEW_ENTRY_IRQ_SHIFT (0x00000005U)

◆ CSL_CSIRX_INFO_IRQS_DESKEW_ENTRY_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_DESKEW_ENTRY_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_SP_GENERIC_RCVD_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_SP_GENERIC_RCVD_IRQ_MASK (0x00000040U)

◆ CSL_CSIRX_INFO_IRQS_SP_GENERIC_RCVD_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_SP_GENERIC_RCVD_IRQ_SHIFT (0x00000006U)

◆ CSL_CSIRX_INFO_IRQS_SP_GENERIC_RCVD_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_SP_GENERIC_RCVD_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_STREAM0_STOP_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_STREAM0_STOP_IRQ_MASK (0x00000080U)

◆ CSL_CSIRX_INFO_IRQS_STREAM0_STOP_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_STREAM0_STOP_IRQ_SHIFT (0x00000007U)

◆ CSL_CSIRX_INFO_IRQS_STREAM0_STOP_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_STREAM0_STOP_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_STREAM0_ABORT_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_STREAM0_ABORT_IRQ_MASK (0x00000100U)

◆ CSL_CSIRX_INFO_IRQS_STREAM0_ABORT_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_STREAM0_ABORT_IRQ_SHIFT (0x00000008U)

◆ CSL_CSIRX_INFO_IRQS_STREAM0_ABORT_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_STREAM0_ABORT_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_STREAM1_STOP_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_STREAM1_STOP_IRQ_MASK (0x00000200U)

◆ CSL_CSIRX_INFO_IRQS_STREAM1_STOP_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_STREAM1_STOP_IRQ_SHIFT (0x00000009U)

◆ CSL_CSIRX_INFO_IRQS_STREAM1_STOP_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_STREAM1_STOP_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_STREAM1_ABORT_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_STREAM1_ABORT_IRQ_MASK (0x00000400U)

◆ CSL_CSIRX_INFO_IRQS_STREAM1_ABORT_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_STREAM1_ABORT_IRQ_SHIFT (0x0000000AU)

◆ CSL_CSIRX_INFO_IRQS_STREAM1_ABORT_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_STREAM1_ABORT_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_STREAM2_STOP_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_STREAM2_STOP_IRQ_MASK (0x00000800U)

◆ CSL_CSIRX_INFO_IRQS_STREAM2_STOP_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_STREAM2_STOP_IRQ_SHIFT (0x0000000BU)

◆ CSL_CSIRX_INFO_IRQS_STREAM2_STOP_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_STREAM2_STOP_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_STREAM2_ABORT_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_STREAM2_ABORT_IRQ_MASK (0x00001000U)

◆ CSL_CSIRX_INFO_IRQS_STREAM2_ABORT_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_STREAM2_ABORT_IRQ_SHIFT (0x0000000CU)

◆ CSL_CSIRX_INFO_IRQS_STREAM2_ABORT_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_STREAM2_ABORT_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_STREAM3_STOP_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_STREAM3_STOP_IRQ_MASK (0x00002000U)

◆ CSL_CSIRX_INFO_IRQS_STREAM3_STOP_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_STREAM3_STOP_IRQ_SHIFT (0x0000000DU)

◆ CSL_CSIRX_INFO_IRQS_STREAM3_STOP_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_STREAM3_STOP_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_STREAM3_ABORT_IRQ_MASK

#define CSL_CSIRX_INFO_IRQS_STREAM3_ABORT_IRQ_MASK (0x00004000U)

◆ CSL_CSIRX_INFO_IRQS_STREAM3_ABORT_IRQ_SHIFT

#define CSL_CSIRX_INFO_IRQS_STREAM3_ABORT_IRQ_SHIFT (0x0000000EU)

◆ CSL_CSIRX_INFO_IRQS_STREAM3_ABORT_IRQ_MAX

#define CSL_CSIRX_INFO_IRQS_STREAM3_ABORT_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_RCVD_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_RCVD_IRQM_MASK (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_RCVD_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_RCVD_IRQM_SHIFT (0x00000000U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_RCVD_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_RCVD_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_LP_RCVD_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_LP_RCVD_IRQM_MASK (0x00000002U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_LP_RCVD_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_LP_RCVD_IRQM_SHIFT (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_LP_RCVD_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_LP_RCVD_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_SLEEP_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_SLEEP_IRQM_MASK (0x00000004U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_SLEEP_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_SLEEP_IRQM_SHIFT (0x00000002U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_SLEEP_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_SLEEP_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_WAKEUP_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_WAKEUP_IRQM_MASK (0x00000008U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_WAKEUP_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_WAKEUP_IRQM_SHIFT (0x00000003U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_WAKEUP_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_WAKEUP_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_ECC_SPARES_NONZERO_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_ECC_SPARES_NONZERO_IRQM_MASK (0x00000010U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_ECC_SPARES_NONZERO_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_ECC_SPARES_NONZERO_IRQM_SHIFT (0x00000004U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_ECC_SPARES_NONZERO_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_ECC_SPARES_NONZERO_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_DESKEW_ENTRY_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_DESKEW_ENTRY_IRQM_MASK (0x00000020U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_DESKEW_ENTRY_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_DESKEW_ENTRY_IRQM_SHIFT (0x00000005U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_DESKEW_ENTRY_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_DESKEW_ENTRY_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_GENERIC_RCVD_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_GENERIC_RCVD_IRQM_MASK (0x00000040U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_GENERIC_RCVD_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_GENERIC_RCVD_IRQM_SHIFT (0x00000006U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_GENERIC_RCVD_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_SP_GENERIC_RCVD_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_STOP_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_STOP_IRQM_MASK (0x00000080U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_STOP_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_STOP_IRQM_SHIFT (0x00000007U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_STOP_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_STOP_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_ABORT_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_ABORT_IRQM_MASK (0x00000100U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_ABORT_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_ABORT_IRQM_SHIFT (0x00000008U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_ABORT_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM0_ABORT_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_STOP_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_STOP_IRQM_MASK (0x00000200U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_STOP_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_STOP_IRQM_SHIFT (0x00000009U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_STOP_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_STOP_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_ABORT_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_ABORT_IRQM_MASK (0x00000400U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_ABORT_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_ABORT_IRQM_SHIFT (0x0000000AU)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_ABORT_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM1_ABORT_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_STOP_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_STOP_IRQM_MASK (0x00000800U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_STOP_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_STOP_IRQM_SHIFT (0x0000000BU)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_STOP_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_STOP_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_ABORT_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_ABORT_IRQM_MASK (0x00001000U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_ABORT_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_ABORT_IRQM_SHIFT (0x0000000CU)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_ABORT_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM2_ABORT_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_STOP_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_STOP_IRQM_MASK (0x00002000U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_STOP_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_STOP_IRQM_SHIFT (0x0000000DU)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_STOP_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_STOP_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_ABORT_IRQM_MASK

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_ABORT_IRQM_MASK (0x00004000U)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_ABORT_IRQM_SHIFT

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_ABORT_IRQM_SHIFT (0x0000000EU)

◆ CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_ABORT_IRQM_MAX

#define CSL_CSIRX_INFO_IRQS_MASK_CFG_STREAM3_ABORT_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_FRONT_FIFO_OVERFLOW_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_FRONT_FIFO_OVERFLOW_IRQ_MASK (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_FRONT_FIFO_OVERFLOW_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_FRONT_FIFO_OVERFLOW_IRQ_SHIFT (0x00000000U)

◆ CSL_CSIRX_ERROR_IRQS_FRONT_FIFO_OVERFLOW_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_FRONT_FIFO_OVERFLOW_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_PAYLOAD_CRC_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_PAYLOAD_CRC_IRQ_MASK (0x00000010U)

◆ CSL_CSIRX_ERROR_IRQS_PAYLOAD_CRC_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_PAYLOAD_CRC_IRQ_SHIFT (0x00000004U)

◆ CSL_CSIRX_ERROR_IRQS_PAYLOAD_CRC_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_PAYLOAD_CRC_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_HEADER_ECC_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_HEADER_ECC_IRQ_MASK (0x00000020U)

◆ CSL_CSIRX_ERROR_IRQS_HEADER_ECC_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_HEADER_ECC_IRQ_SHIFT (0x00000005U)

◆ CSL_CSIRX_ERROR_IRQS_HEADER_ECC_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_HEADER_ECC_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_HEADER_CORRECTED_ECC_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_HEADER_CORRECTED_ECC_IRQ_MASK (0x00000040U)

◆ CSL_CSIRX_ERROR_IRQS_HEADER_CORRECTED_ECC_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_HEADER_CORRECTED_ECC_IRQ_SHIFT (0x00000006U)

◆ CSL_CSIRX_ERROR_IRQS_HEADER_CORRECTED_ECC_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_HEADER_CORRECTED_ECC_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_DATA_ID_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_DATA_ID_IRQ_MASK (0x00000080U)

◆ CSL_CSIRX_ERROR_IRQS_DATA_ID_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_DATA_ID_IRQ_SHIFT (0x00000007U)

◆ CSL_CSIRX_ERROR_IRQS_DATA_ID_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_DATA_ID_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_INVALID_ACCESS_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_INVALID_ACCESS_IRQ_MASK (0x00000100U)

◆ CSL_CSIRX_ERROR_IRQS_INVALID_ACCESS_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_INVALID_ACCESS_IRQ_SHIFT (0x00000008U)

◆ CSL_CSIRX_ERROR_IRQS_INVALID_ACCESS_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_INVALID_ACCESS_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_SP_INVALID_RCVD_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_SP_INVALID_RCVD_IRQ_MASK (0x00000200U)

◆ CSL_CSIRX_ERROR_IRQS_SP_INVALID_RCVD_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_SP_INVALID_RCVD_IRQ_SHIFT (0x00000009U)

◆ CSL_CSIRX_ERROR_IRQS_SP_INVALID_RCVD_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_SP_INVALID_RCVD_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_FRONT_LP_NO_PAYLOAD_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_FRONT_LP_NO_PAYLOAD_IRQ_MASK (0x00000400U)

◆ CSL_CSIRX_ERROR_IRQS_FRONT_LP_NO_PAYLOAD_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_FRONT_LP_NO_PAYLOAD_IRQ_SHIFT (0x0000000AU)

◆ CSL_CSIRX_ERROR_IRQS_FRONT_LP_NO_PAYLOAD_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_FRONT_LP_NO_PAYLOAD_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_PROT_TRUNCATED_PACKET_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_PROT_TRUNCATED_PACKET_IRQ_MASK (0x00000800U)

◆ CSL_CSIRX_ERROR_IRQS_PROT_TRUNCATED_PACKET_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_PROT_TRUNCATED_PACKET_IRQ_SHIFT (0x0000000BU)

◆ CSL_CSIRX_ERROR_IRQS_PROT_TRUNCATED_PACKET_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_PROT_TRUNCATED_PACKET_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_FRONT_TRUNC_HDR_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_FRONT_TRUNC_HDR_IRQ_MASK (0x00001000U)

◆ CSL_CSIRX_ERROR_IRQS_FRONT_TRUNC_HDR_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_FRONT_TRUNC_HDR_IRQ_SHIFT (0x0000000CU)

◆ CSL_CSIRX_ERROR_IRQS_FRONT_TRUNC_HDR_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_FRONT_TRUNC_HDR_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_STREAM0_FIFO_OVERFLOW_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_STREAM0_FIFO_OVERFLOW_IRQ_MASK (0x00010000U)

◆ CSL_CSIRX_ERROR_IRQS_STREAM0_FIFO_OVERFLOW_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_STREAM0_FIFO_OVERFLOW_IRQ_SHIFT (0x00000010U)

◆ CSL_CSIRX_ERROR_IRQS_STREAM0_FIFO_OVERFLOW_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_STREAM0_FIFO_OVERFLOW_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_STREAM1_FIFO_OVERFLOW_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_STREAM1_FIFO_OVERFLOW_IRQ_MASK (0x00020000U)

◆ CSL_CSIRX_ERROR_IRQS_STREAM1_FIFO_OVERFLOW_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_STREAM1_FIFO_OVERFLOW_IRQ_SHIFT (0x00000011U)

◆ CSL_CSIRX_ERROR_IRQS_STREAM1_FIFO_OVERFLOW_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_STREAM1_FIFO_OVERFLOW_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_STREAM2_FIFO_OVERFLOW_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_STREAM2_FIFO_OVERFLOW_IRQ_MASK (0x00040000U)

◆ CSL_CSIRX_ERROR_IRQS_STREAM2_FIFO_OVERFLOW_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_STREAM2_FIFO_OVERFLOW_IRQ_SHIFT (0x00000012U)

◆ CSL_CSIRX_ERROR_IRQS_STREAM2_FIFO_OVERFLOW_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_STREAM2_FIFO_OVERFLOW_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_STREAM3_FIFO_OVERFLOW_IRQ_MASK

#define CSL_CSIRX_ERROR_IRQS_STREAM3_FIFO_OVERFLOW_IRQ_MASK (0x00080000U)

◆ CSL_CSIRX_ERROR_IRQS_STREAM3_FIFO_OVERFLOW_IRQ_SHIFT

#define CSL_CSIRX_ERROR_IRQS_STREAM3_FIFO_OVERFLOW_IRQ_SHIFT (0x00000013U)

◆ CSL_CSIRX_ERROR_IRQS_STREAM3_FIFO_OVERFLOW_IRQ_MAX

#define CSL_CSIRX_ERROR_IRQS_STREAM3_FIFO_OVERFLOW_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_FIFO_OVERFLOW_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_FIFO_OVERFLOW_IRQM_MASK (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_FIFO_OVERFLOW_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_FIFO_OVERFLOW_IRQM_SHIFT (0x00000000U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_FIFO_OVERFLOW_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_FIFO_OVERFLOW_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_PAYLOAD_CRC_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_PAYLOAD_CRC_IRQM_MASK (0x00000010U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_PAYLOAD_CRC_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_PAYLOAD_CRC_IRQM_SHIFT (0x00000004U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_PAYLOAD_CRC_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_PAYLOAD_CRC_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_ECC_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_ECC_IRQM_MASK (0x00000020U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_ECC_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_ECC_IRQM_SHIFT (0x00000005U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_ECC_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_ECC_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_CORRECTED_ECC_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_CORRECTED_ECC_IRQM_MASK (0x00000040U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_CORRECTED_ECC_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_CORRECTED_ECC_IRQM_SHIFT (0x00000006U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_CORRECTED_ECC_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_HEADER_CORRECTED_ECC_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_DATA_ID_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_DATA_ID_IRQM_MASK (0x00000080U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_DATA_ID_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_DATA_ID_IRQM_SHIFT (0x00000007U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_DATA_ID_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_DATA_ID_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_INVALID_ACCESS_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_INVALID_ACCESS_IRQM_MASK (0x00000100U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_INVALID_ACCESS_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_INVALID_ACCESS_IRQM_SHIFT (0x00000008U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_INVALID_ACCESS_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_INVALID_ACCESS_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_SP_INVALID_RCVD_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_SP_INVALID_RCVD_IRQM_MASK (0x00000200U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_SP_INVALID_RCVD_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_SP_INVALID_RCVD_IRQM_SHIFT (0x00000009U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_SP_INVALID_RCVD_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_SP_INVALID_RCVD_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_LP_NO_PAYLOAD_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_LP_NO_PAYLOAD_IRQM_MASK (0x00000400U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_LP_NO_PAYLOAD_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_LP_NO_PAYLOAD_IRQM_SHIFT (0x0000000AU)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_LP_NO_PAYLOAD_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_LP_NO_PAYLOAD_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_PROT_TRUNCATED_PACKET_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_PROT_TRUNCATED_PACKET_IRQM_MASK (0x00000800U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_PROT_TRUNCATED_PACKET_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_PROT_TRUNCATED_PACKET_IRQM_SHIFT (0x0000000BU)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_PROT_TRUNCATED_PACKET_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_PROT_TRUNCATED_PACKET_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_TRUNC_HDR_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_TRUNC_HDR_IRQM_MASK (0x00001000U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_TRUNC_HDR_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_TRUNC_HDR_IRQM_SHIFT (0x0000000CU)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_TRUNC_HDR_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_FRONT_TRUNC_HDR_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM0_FIFO_OVERFLOW_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM0_FIFO_OVERFLOW_IRQM_MASK (0x00010000U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM0_FIFO_OVERFLOW_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM0_FIFO_OVERFLOW_IRQM_SHIFT (0x00000010U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM0_FIFO_OVERFLOW_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM0_FIFO_OVERFLOW_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM1_FIFO_OVERFLOW_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM1_FIFO_OVERFLOW_IRQM_MASK (0x00020000U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM1_FIFO_OVERFLOW_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM1_FIFO_OVERFLOW_IRQM_SHIFT (0x00000011U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM1_FIFO_OVERFLOW_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM1_FIFO_OVERFLOW_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM2_FIFO_OVERFLOW_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM2_FIFO_OVERFLOW_IRQM_MASK (0x00040000U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM2_FIFO_OVERFLOW_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM2_FIFO_OVERFLOW_IRQM_SHIFT (0x00000012U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM2_FIFO_OVERFLOW_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM2_FIFO_OVERFLOW_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM3_FIFO_OVERFLOW_IRQM_MASK

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM3_FIFO_OVERFLOW_IRQM_MASK (0x00080000U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM3_FIFO_OVERFLOW_IRQM_SHIFT

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM3_FIFO_OVERFLOW_IRQM_SHIFT (0x00000013U)

◆ CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM3_FIFO_OVERFLOW_IRQM_MAX

#define CSL_CSIRX_ERROR_IRQS_MASK_CFG_STREAM3_FIFO_OVERFLOW_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL0_ENABLE_MASK

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL0_ENABLE_MASK (0x00000001U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL0_ENABLE_SHIFT

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL0_ENABLE_SHIFT (0x00000000U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL0_ENABLE_MAX

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL0_ENABLE_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL1_ENABLE_MASK

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL1_ENABLE_MASK (0x00000002U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL1_ENABLE_SHIFT

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL1_ENABLE_SHIFT (0x00000001U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL1_ENABLE_MAX

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL1_ENABLE_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL2_ENABLE_MASK

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL2_ENABLE_MASK (0x00000004U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL2_ENABLE_SHIFT

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL2_ENABLE_SHIFT (0x00000002U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL2_ENABLE_MAX

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL2_ENABLE_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL3_ENABLE_MASK

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL3_ENABLE_MASK (0x00000008U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL3_ENABLE_SHIFT

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL3_ENABLE_SHIFT (0x00000003U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL3_ENABLE_MAX

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL3_ENABLE_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_CL_ENABLE_MASK

#define CSL_CSIRX_DPHY_LANE_CONTROL_CL_ENABLE_MASK (0x00000010U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_CL_ENABLE_SHIFT

#define CSL_CSIRX_DPHY_LANE_CONTROL_CL_ENABLE_SHIFT (0x00000004U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_CL_ENABLE_MAX

#define CSL_CSIRX_DPHY_LANE_CONTROL_CL_ENABLE_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL0_RESET_MASK

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL0_RESET_MASK (0x00001000U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL0_RESET_SHIFT

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL0_RESET_SHIFT (0x0000000CU)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL0_RESET_MAX

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL0_RESET_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL1_RESET_MASK

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL1_RESET_MASK (0x00002000U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL1_RESET_SHIFT

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL1_RESET_SHIFT (0x0000000DU)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL1_RESET_MAX

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL1_RESET_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL2_RESET_MASK

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL2_RESET_MASK (0x00004000U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL2_RESET_SHIFT

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL2_RESET_SHIFT (0x0000000EU)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL2_RESET_MAX

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL2_RESET_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL3_RESET_MASK

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL3_RESET_MASK (0x00008000U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL3_RESET_SHIFT

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL3_RESET_SHIFT (0x0000000FU)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_DL3_RESET_MAX

#define CSL_CSIRX_DPHY_LANE_CONTROL_DL3_RESET_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_CL_RESET_MASK

#define CSL_CSIRX_DPHY_LANE_CONTROL_CL_RESET_MASK (0x00010000U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_CL_RESET_SHIFT

#define CSL_CSIRX_DPHY_LANE_CONTROL_CL_RESET_SHIFT (0x00000010U)

◆ CSL_CSIRX_DPHY_LANE_CONTROL_CL_RESET_MAX

#define CSL_CSIRX_DPHY_LANE_CONTROL_CL_RESET_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_CL_STOPSTATE_MASK

#define CSL_CSIRX_DPHY_STATUS_CL_STOPSTATE_MASK (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_CL_STOPSTATE_SHIFT

#define CSL_CSIRX_DPHY_STATUS_CL_STOPSTATE_SHIFT (0x00000000U)

◆ CSL_CSIRX_DPHY_STATUS_CL_STOPSTATE_MAX

#define CSL_CSIRX_DPHY_STATUS_CL_STOPSTATE_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_CL_ULPSACTIVENOT_MASK

#define CSL_CSIRX_DPHY_STATUS_CL_ULPSACTIVENOT_MASK (0x00000002U)

◆ CSL_CSIRX_DPHY_STATUS_CL_ULPSACTIVENOT_SHIFT

#define CSL_CSIRX_DPHY_STATUS_CL_ULPSACTIVENOT_SHIFT (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_CL_ULPSACTIVENOT_MAX

#define CSL_CSIRX_DPHY_STATUS_CL_ULPSACTIVENOT_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_CL_RXULPSCLKNOT_MASK

#define CSL_CSIRX_DPHY_STATUS_CL_RXULPSCLKNOT_MASK (0x00000004U)

◆ CSL_CSIRX_DPHY_STATUS_CL_RXULPSCLKNOT_SHIFT

#define CSL_CSIRX_DPHY_STATUS_CL_RXULPSCLKNOT_SHIFT (0x00000002U)

◆ CSL_CSIRX_DPHY_STATUS_CL_RXULPSCLKNOT_MAX

#define CSL_CSIRX_DPHY_STATUS_CL_RXULPSCLKNOT_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_DL0_STOPSTATE_MASK

#define CSL_CSIRX_DPHY_STATUS_DL0_STOPSTATE_MASK (0x00000100U)

◆ CSL_CSIRX_DPHY_STATUS_DL0_STOPSTATE_SHIFT

#define CSL_CSIRX_DPHY_STATUS_DL0_STOPSTATE_SHIFT (0x00000008U)

◆ CSL_CSIRX_DPHY_STATUS_DL0_STOPSTATE_MAX

#define CSL_CSIRX_DPHY_STATUS_DL0_STOPSTATE_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_DL0_ULPSACTIVENOT_MASK

#define CSL_CSIRX_DPHY_STATUS_DL0_ULPSACTIVENOT_MASK (0x00000200U)

◆ CSL_CSIRX_DPHY_STATUS_DL0_ULPSACTIVENOT_SHIFT

#define CSL_CSIRX_DPHY_STATUS_DL0_ULPSACTIVENOT_SHIFT (0x00000009U)

◆ CSL_CSIRX_DPHY_STATUS_DL0_ULPSACTIVENOT_MAX

#define CSL_CSIRX_DPHY_STATUS_DL0_ULPSACTIVENOT_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_DL0_RXULPSESC_MASK

#define CSL_CSIRX_DPHY_STATUS_DL0_RXULPSESC_MASK (0x00000400U)

◆ CSL_CSIRX_DPHY_STATUS_DL0_RXULPSESC_SHIFT

#define CSL_CSIRX_DPHY_STATUS_DL0_RXULPSESC_SHIFT (0x0000000AU)

◆ CSL_CSIRX_DPHY_STATUS_DL0_RXULPSESC_MAX

#define CSL_CSIRX_DPHY_STATUS_DL0_RXULPSESC_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_DL1_STOPSTATE_MASK

#define CSL_CSIRX_DPHY_STATUS_DL1_STOPSTATE_MASK (0x00001000U)

◆ CSL_CSIRX_DPHY_STATUS_DL1_STOPSTATE_SHIFT

#define CSL_CSIRX_DPHY_STATUS_DL1_STOPSTATE_SHIFT (0x0000000CU)

◆ CSL_CSIRX_DPHY_STATUS_DL1_STOPSTATE_MAX

#define CSL_CSIRX_DPHY_STATUS_DL1_STOPSTATE_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_DL1_ULPSACTIVENOT_MASK

#define CSL_CSIRX_DPHY_STATUS_DL1_ULPSACTIVENOT_MASK (0x00002000U)

◆ CSL_CSIRX_DPHY_STATUS_DL1_ULPSACTIVENOT_SHIFT

#define CSL_CSIRX_DPHY_STATUS_DL1_ULPSACTIVENOT_SHIFT (0x0000000DU)

◆ CSL_CSIRX_DPHY_STATUS_DL1_ULPSACTIVENOT_MAX

#define CSL_CSIRX_DPHY_STATUS_DL1_ULPSACTIVENOT_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_DL1_RXULPSESC_MASK

#define CSL_CSIRX_DPHY_STATUS_DL1_RXULPSESC_MASK (0x00004000U)

◆ CSL_CSIRX_DPHY_STATUS_DL1_RXULPSESC_SHIFT

#define CSL_CSIRX_DPHY_STATUS_DL1_RXULPSESC_SHIFT (0x0000000EU)

◆ CSL_CSIRX_DPHY_STATUS_DL1_RXULPSESC_MAX

#define CSL_CSIRX_DPHY_STATUS_DL1_RXULPSESC_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_DL2_STOPSTATE_MASK

#define CSL_CSIRX_DPHY_STATUS_DL2_STOPSTATE_MASK (0x00010000U)

◆ CSL_CSIRX_DPHY_STATUS_DL2_STOPSTATE_SHIFT

#define CSL_CSIRX_DPHY_STATUS_DL2_STOPSTATE_SHIFT (0x00000010U)

◆ CSL_CSIRX_DPHY_STATUS_DL2_STOPSTATE_MAX

#define CSL_CSIRX_DPHY_STATUS_DL2_STOPSTATE_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_DL2_ULPSACTIVENOT_MASK

#define CSL_CSIRX_DPHY_STATUS_DL2_ULPSACTIVENOT_MASK (0x00020000U)

◆ CSL_CSIRX_DPHY_STATUS_DL2_ULPSACTIVENOT_SHIFT

#define CSL_CSIRX_DPHY_STATUS_DL2_ULPSACTIVENOT_SHIFT (0x00000011U)

◆ CSL_CSIRX_DPHY_STATUS_DL2_ULPSACTIVENOT_MAX

#define CSL_CSIRX_DPHY_STATUS_DL2_ULPSACTIVENOT_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_DL2_RXULPSESC_MASK

#define CSL_CSIRX_DPHY_STATUS_DL2_RXULPSESC_MASK (0x00040000U)

◆ CSL_CSIRX_DPHY_STATUS_DL2_RXULPSESC_SHIFT

#define CSL_CSIRX_DPHY_STATUS_DL2_RXULPSESC_SHIFT (0x00000012U)

◆ CSL_CSIRX_DPHY_STATUS_DL2_RXULPSESC_MAX

#define CSL_CSIRX_DPHY_STATUS_DL2_RXULPSESC_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_DL3_STOPSTATE_MASK

#define CSL_CSIRX_DPHY_STATUS_DL3_STOPSTATE_MASK (0x00100000U)

◆ CSL_CSIRX_DPHY_STATUS_DL3_STOPSTATE_SHIFT

#define CSL_CSIRX_DPHY_STATUS_DL3_STOPSTATE_SHIFT (0x00000014U)

◆ CSL_CSIRX_DPHY_STATUS_DL3_STOPSTATE_MAX

#define CSL_CSIRX_DPHY_STATUS_DL3_STOPSTATE_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_DL3_ULPSACTIVENOT_MASK

#define CSL_CSIRX_DPHY_STATUS_DL3_ULPSACTIVENOT_MASK (0x00200000U)

◆ CSL_CSIRX_DPHY_STATUS_DL3_ULPSACTIVENOT_SHIFT

#define CSL_CSIRX_DPHY_STATUS_DL3_ULPSACTIVENOT_SHIFT (0x00000015U)

◆ CSL_CSIRX_DPHY_STATUS_DL3_ULPSACTIVENOT_MAX

#define CSL_CSIRX_DPHY_STATUS_DL3_ULPSACTIVENOT_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_STATUS_DL3_RXULPSESC_MASK

#define CSL_CSIRX_DPHY_STATUS_DL3_RXULPSESC_MASK (0x00400000U)

◆ CSL_CSIRX_DPHY_STATUS_DL3_RXULPSESC_SHIFT

#define CSL_CSIRX_DPHY_STATUS_DL3_RXULPSESC_SHIFT (0x00000016U)

◆ CSL_CSIRX_DPHY_STATUS_DL3_RXULPSESC_MAX

#define CSL_CSIRX_DPHY_STATUS_DL3_RXULPSESC_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL0_ERRSOTHS_IRQ_MASK

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL0_ERRSOTHS_IRQ_MASK (0x00000100U)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL0_ERRSOTHS_IRQ_SHIFT

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL0_ERRSOTHS_IRQ_SHIFT (0x00000008U)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL0_ERRSOTHS_IRQ_MAX

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL0_ERRSOTHS_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL1_ERRSOTHS_IRQ_MASK

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL1_ERRSOTHS_IRQ_MASK (0x00001000U)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL1_ERRSOTHS_IRQ_SHIFT

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL1_ERRSOTHS_IRQ_SHIFT (0x0000000CU)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL1_ERRSOTHS_IRQ_MAX

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL1_ERRSOTHS_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL2_ERRSOTHS_IRQ_MASK

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL2_ERRSOTHS_IRQ_MASK (0x00010000U)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL2_ERRSOTHS_IRQ_SHIFT

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL2_ERRSOTHS_IRQ_SHIFT (0x00000010U)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL2_ERRSOTHS_IRQ_MAX

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL2_ERRSOTHS_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL3_ERRSOTHS_IRQ_MASK

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL3_ERRSOTHS_IRQ_MASK (0x00100000U)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL3_ERRSOTHS_IRQ_SHIFT

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL3_ERRSOTHS_IRQ_SHIFT (0x00000014U)

◆ CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL3_ERRSOTHS_IRQ_MAX

#define CSL_CSIRX_DPHY_ERR_STATUS_IRQ_DL3_ERRSOTHS_IRQ_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL0_ERRSOTHS_IRQM_MASK

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL0_ERRSOTHS_IRQM_MASK (0x00000100U)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL0_ERRSOTHS_IRQM_SHIFT

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL0_ERRSOTHS_IRQM_SHIFT (0x00000008U)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL0_ERRSOTHS_IRQM_MAX

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL0_ERRSOTHS_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL1_ERRSOTHS_IRQM_MASK

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL1_ERRSOTHS_IRQM_MASK (0x00001000U)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL1_ERRSOTHS_IRQM_SHIFT

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL1_ERRSOTHS_IRQM_SHIFT (0x0000000CU)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL1_ERRSOTHS_IRQM_MAX

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL1_ERRSOTHS_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL2_ERRSOTHS_IRQM_MASK

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL2_ERRSOTHS_IRQM_MASK (0x00010000U)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL2_ERRSOTHS_IRQM_SHIFT

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL2_ERRSOTHS_IRQM_SHIFT (0x00000010U)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL2_ERRSOTHS_IRQM_MAX

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL2_ERRSOTHS_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL3_ERRSOTHS_IRQM_MASK

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL3_ERRSOTHS_IRQM_MASK (0x00100000U)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL3_ERRSOTHS_IRQM_SHIFT

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL3_ERRSOTHS_IRQM_SHIFT (0x00000014U)

◆ CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL3_ERRSOTHS_IRQM_MAX

#define CSL_CSIRX_DPHY_ERR_IRQ_MASK_CFG_DL3_ERRSOTHS_IRQM_MAX (0x00000001U)

◆ CSL_CSIRX_INTEGRATION_DEBUG_PROT_WORD_COUNT_MASK

#define CSL_CSIRX_INTEGRATION_DEBUG_PROT_WORD_COUNT_MASK (0x0000FFFFU)

◆ CSL_CSIRX_INTEGRATION_DEBUG_PROT_WORD_COUNT_SHIFT

#define CSL_CSIRX_INTEGRATION_DEBUG_PROT_WORD_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_INTEGRATION_DEBUG_PROT_WORD_COUNT_MAX

#define CSL_CSIRX_INTEGRATION_DEBUG_PROT_WORD_COUNT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_INTEGRATION_DEBUG_PROT_DT_MASK

#define CSL_CSIRX_INTEGRATION_DEBUG_PROT_DT_MASK (0x003F0000U)

◆ CSL_CSIRX_INTEGRATION_DEBUG_PROT_DT_SHIFT

#define CSL_CSIRX_INTEGRATION_DEBUG_PROT_DT_SHIFT (0x00000010U)

◆ CSL_CSIRX_INTEGRATION_DEBUG_PROT_DT_MAX

#define CSL_CSIRX_INTEGRATION_DEBUG_PROT_DT_MAX (0x0000003FU)

◆ CSL_CSIRX_INTEGRATION_DEBUG_PROT_VC_MASK

#define CSL_CSIRX_INTEGRATION_DEBUG_PROT_VC_MASK (0x03C00000U)

◆ CSL_CSIRX_INTEGRATION_DEBUG_PROT_VC_SHIFT

#define CSL_CSIRX_INTEGRATION_DEBUG_PROT_VC_SHIFT (0x00000016U)

◆ CSL_CSIRX_INTEGRATION_DEBUG_PROT_VC_MAX

#define CSL_CSIRX_INTEGRATION_DEBUG_PROT_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_INTEGRATION_DEBUG_PROT_FSM_STATE_MASK

#define CSL_CSIRX_INTEGRATION_DEBUG_PROT_FSM_STATE_MASK (0xF0000000U)

◆ CSL_CSIRX_INTEGRATION_DEBUG_PROT_FSM_STATE_SHIFT

#define CSL_CSIRX_INTEGRATION_DEBUG_PROT_FSM_STATE_SHIFT (0x0000001CU)

◆ CSL_CSIRX_INTEGRATION_DEBUG_PROT_FSM_STATE_MAX

#define CSL_CSIRX_INTEGRATION_DEBUG_PROT_FSM_STATE_MAX (0x0000000FU)

◆ CSL_CSIRX_ERROR_DEBUG_DT_MASK

#define CSL_CSIRX_ERROR_DEBUG_DT_MASK (0x0000003FU)

◆ CSL_CSIRX_ERROR_DEBUG_DT_SHIFT

#define CSL_CSIRX_ERROR_DEBUG_DT_SHIFT (0x00000000U)

◆ CSL_CSIRX_ERROR_DEBUG_DT_MAX

#define CSL_CSIRX_ERROR_DEBUG_DT_MAX (0x0000003FU)

◆ CSL_CSIRX_ERROR_DEBUG_VC_MASK

#define CSL_CSIRX_ERROR_DEBUG_VC_MASK (0x000003C0U)

◆ CSL_CSIRX_ERROR_DEBUG_VC_SHIFT

#define CSL_CSIRX_ERROR_DEBUG_VC_SHIFT (0x00000006U)

◆ CSL_CSIRX_ERROR_DEBUG_VC_MAX

#define CSL_CSIRX_ERROR_DEBUG_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_ERROR_DEBUG_DATA_FIELD_MASK

#define CSL_CSIRX_ERROR_DEBUG_DATA_FIELD_MASK (0xFFFF0000U)

◆ CSL_CSIRX_ERROR_DEBUG_DATA_FIELD_SHIFT

#define CSL_CSIRX_ERROR_DEBUG_DATA_FIELD_SHIFT (0x00000010U)

◆ CSL_CSIRX_ERROR_DEBUG_DATA_FIELD_MAX

#define CSL_CSIRX_ERROR_DEBUG_DATA_FIELD_MAX (0x0000FFFFU)

◆ CSL_CSIRX_TEST_GENERIC_CTRL_MASK

#define CSL_CSIRX_TEST_GENERIC_CTRL_MASK (0x0000FFFFU)

◆ CSL_CSIRX_TEST_GENERIC_CTRL_SHIFT

#define CSL_CSIRX_TEST_GENERIC_CTRL_SHIFT (0x00000000U)

◆ CSL_CSIRX_TEST_GENERIC_CTRL_MAX

#define CSL_CSIRX_TEST_GENERIC_CTRL_MAX (0x0000FFFFU)

◆ CSL_CSIRX_TEST_GENERIC_STATUS_MASK

#define CSL_CSIRX_TEST_GENERIC_STATUS_MASK (0xFFFF0000U)

◆ CSL_CSIRX_TEST_GENERIC_STATUS_SHIFT

#define CSL_CSIRX_TEST_GENERIC_STATUS_SHIFT (0x00000010U)

◆ CSL_CSIRX_TEST_GENERIC_STATUS_MAX

#define CSL_CSIRX_TEST_GENERIC_STATUS_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_CTRL_START_MASK

#define CSL_CSIRX_STREAM0_CTRL_START_MASK (0x00000001U)

◆ CSL_CSIRX_STREAM0_CTRL_START_SHIFT

#define CSL_CSIRX_STREAM0_CTRL_START_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM0_CTRL_START_MAX

#define CSL_CSIRX_STREAM0_CTRL_START_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_CTRL_STOP_MASK

#define CSL_CSIRX_STREAM0_CTRL_STOP_MASK (0x00000002U)

◆ CSL_CSIRX_STREAM0_CTRL_STOP_SHIFT

#define CSL_CSIRX_STREAM0_CTRL_STOP_SHIFT (0x00000001U)

◆ CSL_CSIRX_STREAM0_CTRL_STOP_MAX

#define CSL_CSIRX_STREAM0_CTRL_STOP_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_CTRL_ABORT_MASK

#define CSL_CSIRX_STREAM0_CTRL_ABORT_MASK (0x00000004U)

◆ CSL_CSIRX_STREAM0_CTRL_ABORT_SHIFT

#define CSL_CSIRX_STREAM0_CTRL_ABORT_SHIFT (0x00000002U)

◆ CSL_CSIRX_STREAM0_CTRL_ABORT_MAX

#define CSL_CSIRX_STREAM0_CTRL_ABORT_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_CTRL_SOFT_RST_MASK

#define CSL_CSIRX_STREAM0_CTRL_SOFT_RST_MASK (0x00000010U)

◆ CSL_CSIRX_STREAM0_CTRL_SOFT_RST_SHIFT

#define CSL_CSIRX_STREAM0_CTRL_SOFT_RST_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM0_CTRL_SOFT_RST_MAX

#define CSL_CSIRX_STREAM0_CTRL_SOFT_RST_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_STATUS_PROTOCOL_FSM_MASK

#define CSL_CSIRX_STREAM0_STATUS_PROTOCOL_FSM_MASK (0x00000003U)

◆ CSL_CSIRX_STREAM0_STATUS_PROTOCOL_FSM_SHIFT

#define CSL_CSIRX_STREAM0_STATUS_PROTOCOL_FSM_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM0_STATUS_PROTOCOL_FSM_MAX

#define CSL_CSIRX_STREAM0_STATUS_PROTOCOL_FSM_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM0_STATUS_STREAM_FSM_MASK

#define CSL_CSIRX_STREAM0_STATUS_STREAM_FSM_MASK (0x000000F0U)

◆ CSL_CSIRX_STREAM0_STATUS_STREAM_FSM_SHIFT

#define CSL_CSIRX_STREAM0_STATUS_STREAM_FSM_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM0_STATUS_STREAM_FSM_MAX

#define CSL_CSIRX_STREAM0_STATUS_STREAM_FSM_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM0_STATUS_READY_STATE_MASK

#define CSL_CSIRX_STREAM0_STATUS_READY_STATE_MASK (0x00000100U)

◆ CSL_CSIRX_STREAM0_STATUS_READY_STATE_SHIFT

#define CSL_CSIRX_STREAM0_STATUS_READY_STATE_SHIFT (0x00000008U)

◆ CSL_CSIRX_STREAM0_STATUS_READY_STATE_MAX

#define CSL_CSIRX_STREAM0_STATUS_READY_STATE_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_STATUS_RUNNING_MASK

#define CSL_CSIRX_STREAM0_STATUS_RUNNING_MASK (0x80000000U)

◆ CSL_CSIRX_STREAM0_STATUS_RUNNING_SHIFT

#define CSL_CSIRX_STREAM0_STATUS_RUNNING_SHIFT (0x0000001FU)

◆ CSL_CSIRX_STREAM0_STATUS_RUNNING_MAX

#define CSL_CSIRX_STREAM0_STATUS_RUNNING_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT0_MASK

#define CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT0_MASK (0x0000003FU)

◆ CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT0_SHIFT

#define CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT0_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT0_MAX

#define CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT0_MAX (0x0000003FU)

◆ CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT0_MASK

#define CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT0_MASK (0x00000080U)

◆ CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT0_SHIFT

#define CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT0_SHIFT (0x00000007U)

◆ CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT0_MAX

#define CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT0_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT1_MASK

#define CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT1_MASK (0x00003F00U)

◆ CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT1_SHIFT

#define CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT1_SHIFT (0x00000008U)

◆ CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT1_MAX

#define CSL_CSIRX_STREAM0_DATA_CFG_DATATYPE_SELECT1_MAX (0x0000003FU)

◆ CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT1_MASK

#define CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT1_MASK (0x00008000U)

◆ CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT1_SHIFT

#define CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT1_SHIFT (0x0000000FU)

◆ CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT1_MAX

#define CSL_CSIRX_STREAM0_DATA_CFG_ENABLE_DT1_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_DATA_CFG_VC_SELECT_MASK

#define CSL_CSIRX_STREAM0_DATA_CFG_VC_SELECT_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM0_DATA_CFG_VC_SELECT_SHIFT

#define CSL_CSIRX_STREAM0_DATA_CFG_VC_SELECT_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM0_DATA_CFG_VC_SELECT_MAX

#define CSL_CSIRX_STREAM0_DATA_CFG_VC_SELECT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_CFG_INTERFACE_MODE_MASK

#define CSL_CSIRX_STREAM0_CFG_INTERFACE_MODE_MASK (0x00000001U)

◆ CSL_CSIRX_STREAM0_CFG_INTERFACE_MODE_SHIFT

#define CSL_CSIRX_STREAM0_CFG_INTERFACE_MODE_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM0_CFG_INTERFACE_MODE_MAX

#define CSL_CSIRX_STREAM0_CFG_INTERFACE_MODE_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_CFG_LS_LE_MODE_MASK

#define CSL_CSIRX_STREAM0_CFG_LS_LE_MODE_MASK (0x00000002U)

◆ CSL_CSIRX_STREAM0_CFG_LS_LE_MODE_SHIFT

#define CSL_CSIRX_STREAM0_CFG_LS_LE_MODE_SHIFT (0x00000001U)

◆ CSL_CSIRX_STREAM0_CFG_LS_LE_MODE_MAX

#define CSL_CSIRX_STREAM0_CFG_LS_LE_MODE_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_CFG_NUM_PIXELS_MASK

#define CSL_CSIRX_STREAM0_CFG_NUM_PIXELS_MASK (0x00000030U)

◆ CSL_CSIRX_STREAM0_CFG_NUM_PIXELS_SHIFT

#define CSL_CSIRX_STREAM0_CFG_NUM_PIXELS_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM0_CFG_NUM_PIXELS_MAX

#define CSL_CSIRX_STREAM0_CFG_NUM_PIXELS_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM0_CFG_FIFO_MODE_MASK

#define CSL_CSIRX_STREAM0_CFG_FIFO_MODE_MASK (0x00000300U)

◆ CSL_CSIRX_STREAM0_CFG_FIFO_MODE_SHIFT

#define CSL_CSIRX_STREAM0_CFG_FIFO_MODE_SHIFT (0x00000008U)

◆ CSL_CSIRX_STREAM0_CFG_FIFO_MODE_MAX

#define CSL_CSIRX_STREAM0_CFG_FIFO_MODE_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM0_CFG_BPP_BYPASS_MASK

#define CSL_CSIRX_STREAM0_CFG_BPP_BYPASS_MASK (0x00007000U)

◆ CSL_CSIRX_STREAM0_CFG_BPP_BYPASS_SHIFT

#define CSL_CSIRX_STREAM0_CFG_BPP_BYPASS_SHIFT (0x0000000CU)

◆ CSL_CSIRX_STREAM0_CFG_BPP_BYPASS_MAX

#define CSL_CSIRX_STREAM0_CFG_BPP_BYPASS_MAX (0x00000007U)

◆ CSL_CSIRX_STREAM0_CFG_FIFO_FILL_MASK

#define CSL_CSIRX_STREAM0_CFG_FIFO_FILL_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM0_CFG_FIFO_FILL_SHIFT

#define CSL_CSIRX_STREAM0_CFG_FIFO_FILL_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM0_CFG_FIFO_FILL_MAX

#define CSL_CSIRX_STREAM0_CFG_FIFO_FILL_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_VC_MASK

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_VC_MASK (0x0000000FU)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_VC_SHIFT

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_VC_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_VC_MAX

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_EN_MASK

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_EN_MASK (0x00000010U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_EN_SHIFT

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_EN_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_EN_MAX

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_LB_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_VC_MASK

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_VC_MASK (0x000001E0U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_VC_SHIFT

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_VC_SHIFT (0x00000005U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_VC_MAX

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EN_MASK

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EN_MASK (0x00000200U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EN_SHIFT

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EN_SHIFT (0x00000009U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EN_MAX

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EOF_MASK

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EOF_MASK (0x00000400U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EOF_SHIFT

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EOF_SHIFT (0x0000000AU)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EOF_MAX

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_TIMER_EOF_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_VC_MASK

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_VC_MASK (0x00007800U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_VC_SHIFT

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_VC_SHIFT (0x0000000BU)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_VC_MAX

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_EN_MASK

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_EN_MASK (0x00008000U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_EN_SHIFT

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_EN_SHIFT (0x0000000FU)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_EN_MAX

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_MON_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_LENGTH_MASK

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_LENGTH_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_LENGTH_SHIFT

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_LENGTH_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_LENGTH_MAX

#define CSL_CSIRX_STREAM0_MONITOR_CTRL_FRAME_LENGTH_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_MONITOR_FRAME_NB_MASK

#define CSL_CSIRX_STREAM0_MONITOR_FRAME_NB_MASK (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_MONITOR_FRAME_NB_SHIFT

#define CSL_CSIRX_STREAM0_MONITOR_FRAME_NB_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM0_MONITOR_FRAME_NB_MAX

#define CSL_CSIRX_STREAM0_MONITOR_FRAME_NB_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_MONITOR_FRAME_PACKET_SIZE_MASK

#define CSL_CSIRX_STREAM0_MONITOR_FRAME_PACKET_SIZE_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM0_MONITOR_FRAME_PACKET_SIZE_SHIFT

#define CSL_CSIRX_STREAM0_MONITOR_FRAME_PACKET_SIZE_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM0_MONITOR_FRAME_PACKET_SIZE_MAX

#define CSL_CSIRX_STREAM0_MONITOR_FRAME_PACKET_SIZE_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_MONITOR_LB_BYTE_COUNT_MASK

#define CSL_CSIRX_STREAM0_MONITOR_LB_BYTE_COUNT_MASK (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_MONITOR_LB_BYTE_COUNT_SHIFT

#define CSL_CSIRX_STREAM0_MONITOR_LB_BYTE_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM0_MONITOR_LB_BYTE_COUNT_MAX

#define CSL_CSIRX_STREAM0_MONITOR_LB_BYTE_COUNT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_MONITOR_LB_LINE_COUNT_MASK

#define CSL_CSIRX_STREAM0_MONITOR_LB_LINE_COUNT_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM0_MONITOR_LB_LINE_COUNT_SHIFT

#define CSL_CSIRX_STREAM0_MONITOR_LB_LINE_COUNT_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM0_MONITOR_LB_LINE_COUNT_MAX

#define CSL_CSIRX_STREAM0_MONITOR_LB_LINE_COUNT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_TIMER_COUNT_MASK

#define CSL_CSIRX_STREAM0_TIMER_COUNT_MASK (0x01FFFFFFU)

◆ CSL_CSIRX_STREAM0_TIMER_COUNT_SHIFT

#define CSL_CSIRX_STREAM0_TIMER_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM0_TIMER_COUNT_MAX

#define CSL_CSIRX_STREAM0_TIMER_COUNT_MAX (0x01FFFFFFU)

◆ CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_START_MASK

#define CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_START_MASK (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_START_SHIFT

#define CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_START_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_START_MAX

#define CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_START_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_STOP_MASK

#define CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_STOP_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_STOP_SHIFT

#define CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_STOP_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_STOP_MAX

#define CSL_CSIRX_STREAM0_FCC_CFG_FRAME_COUNT_STOP_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_FCC_CTRL_FCC_EN_MASK

#define CSL_CSIRX_STREAM0_FCC_CTRL_FCC_EN_MASK (0x00000001U)

◆ CSL_CSIRX_STREAM0_FCC_CTRL_FCC_EN_SHIFT

#define CSL_CSIRX_STREAM0_FCC_CTRL_FCC_EN_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM0_FCC_CTRL_FCC_EN_MAX

#define CSL_CSIRX_STREAM0_FCC_CTRL_FCC_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM0_FCC_CTRL_FCC_VC_MASK

#define CSL_CSIRX_STREAM0_FCC_CTRL_FCC_VC_MASK (0x0000001EU)

◆ CSL_CSIRX_STREAM0_FCC_CTRL_FCC_VC_SHIFT

#define CSL_CSIRX_STREAM0_FCC_CTRL_FCC_VC_SHIFT (0x00000001U)

◆ CSL_CSIRX_STREAM0_FCC_CTRL_FCC_VC_MAX

#define CSL_CSIRX_STREAM0_FCC_CTRL_FCC_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM0_FCC_CTRL_FRAME_COUNTER_MASK

#define CSL_CSIRX_STREAM0_FCC_CTRL_FRAME_COUNTER_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM0_FCC_CTRL_FRAME_COUNTER_SHIFT

#define CSL_CSIRX_STREAM0_FCC_CTRL_FRAME_COUNTER_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM0_FCC_CTRL_FRAME_COUNTER_MAX

#define CSL_CSIRX_STREAM0_FCC_CTRL_FRAME_COUNTER_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM0_FIFO_FILL_LVL_COUNT_MASK

#define CSL_CSIRX_STREAM0_FIFO_FILL_LVL_COUNT_MASK (0x000003FFU)

◆ CSL_CSIRX_STREAM0_FIFO_FILL_LVL_COUNT_SHIFT

#define CSL_CSIRX_STREAM0_FIFO_FILL_LVL_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM0_FIFO_FILL_LVL_COUNT_MAX

#define CSL_CSIRX_STREAM0_FIFO_FILL_LVL_COUNT_MAX (0x000003FFU)

◆ CSL_CSIRX_STREAM0_FIFO_FILL_LVL_MODE_MASK

#define CSL_CSIRX_STREAM0_FIFO_FILL_LVL_MODE_MASK (0x00003000U)

◆ CSL_CSIRX_STREAM0_FIFO_FILL_LVL_MODE_SHIFT

#define CSL_CSIRX_STREAM0_FIFO_FILL_LVL_MODE_SHIFT (0x0000000CU)

◆ CSL_CSIRX_STREAM0_FIFO_FILL_LVL_MODE_MAX

#define CSL_CSIRX_STREAM0_FIFO_FILL_LVL_MODE_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM1_CTRL_START_MASK

#define CSL_CSIRX_STREAM1_CTRL_START_MASK (0x00000001U)

◆ CSL_CSIRX_STREAM1_CTRL_START_SHIFT

#define CSL_CSIRX_STREAM1_CTRL_START_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM1_CTRL_START_MAX

#define CSL_CSIRX_STREAM1_CTRL_START_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_CTRL_STOP_MASK

#define CSL_CSIRX_STREAM1_CTRL_STOP_MASK (0x00000002U)

◆ CSL_CSIRX_STREAM1_CTRL_STOP_SHIFT

#define CSL_CSIRX_STREAM1_CTRL_STOP_SHIFT (0x00000001U)

◆ CSL_CSIRX_STREAM1_CTRL_STOP_MAX

#define CSL_CSIRX_STREAM1_CTRL_STOP_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_CTRL_ABORT_MASK

#define CSL_CSIRX_STREAM1_CTRL_ABORT_MASK (0x00000004U)

◆ CSL_CSIRX_STREAM1_CTRL_ABORT_SHIFT

#define CSL_CSIRX_STREAM1_CTRL_ABORT_SHIFT (0x00000002U)

◆ CSL_CSIRX_STREAM1_CTRL_ABORT_MAX

#define CSL_CSIRX_STREAM1_CTRL_ABORT_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_CTRL_SOFT_RST_MASK

#define CSL_CSIRX_STREAM1_CTRL_SOFT_RST_MASK (0x00000010U)

◆ CSL_CSIRX_STREAM1_CTRL_SOFT_RST_SHIFT

#define CSL_CSIRX_STREAM1_CTRL_SOFT_RST_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM1_CTRL_SOFT_RST_MAX

#define CSL_CSIRX_STREAM1_CTRL_SOFT_RST_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_STATUS_PROTOCOL_FSM_MASK

#define CSL_CSIRX_STREAM1_STATUS_PROTOCOL_FSM_MASK (0x00000003U)

◆ CSL_CSIRX_STREAM1_STATUS_PROTOCOL_FSM_SHIFT

#define CSL_CSIRX_STREAM1_STATUS_PROTOCOL_FSM_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM1_STATUS_PROTOCOL_FSM_MAX

#define CSL_CSIRX_STREAM1_STATUS_PROTOCOL_FSM_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM1_STATUS_STREAM_FSM_MASK

#define CSL_CSIRX_STREAM1_STATUS_STREAM_FSM_MASK (0x000000F0U)

◆ CSL_CSIRX_STREAM1_STATUS_STREAM_FSM_SHIFT

#define CSL_CSIRX_STREAM1_STATUS_STREAM_FSM_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM1_STATUS_STREAM_FSM_MAX

#define CSL_CSIRX_STREAM1_STATUS_STREAM_FSM_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM1_STATUS_READY_STATE_MASK

#define CSL_CSIRX_STREAM1_STATUS_READY_STATE_MASK (0x00000100U)

◆ CSL_CSIRX_STREAM1_STATUS_READY_STATE_SHIFT

#define CSL_CSIRX_STREAM1_STATUS_READY_STATE_SHIFT (0x00000008U)

◆ CSL_CSIRX_STREAM1_STATUS_READY_STATE_MAX

#define CSL_CSIRX_STREAM1_STATUS_READY_STATE_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_STATUS_RUNNING_MASK

#define CSL_CSIRX_STREAM1_STATUS_RUNNING_MASK (0x80000000U)

◆ CSL_CSIRX_STREAM1_STATUS_RUNNING_SHIFT

#define CSL_CSIRX_STREAM1_STATUS_RUNNING_SHIFT (0x0000001FU)

◆ CSL_CSIRX_STREAM1_STATUS_RUNNING_MAX

#define CSL_CSIRX_STREAM1_STATUS_RUNNING_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT0_MASK

#define CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT0_MASK (0x0000003FU)

◆ CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT0_SHIFT

#define CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT0_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT0_MAX

#define CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT0_MAX (0x0000003FU)

◆ CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT0_MASK

#define CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT0_MASK (0x00000080U)

◆ CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT0_SHIFT

#define CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT0_SHIFT (0x00000007U)

◆ CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT0_MAX

#define CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT0_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT1_MASK

#define CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT1_MASK (0x00003F00U)

◆ CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT1_SHIFT

#define CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT1_SHIFT (0x00000008U)

◆ CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT1_MAX

#define CSL_CSIRX_STREAM1_DATA_CFG_DATATYPE_SELECT1_MAX (0x0000003FU)

◆ CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT1_MASK

#define CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT1_MASK (0x00008000U)

◆ CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT1_SHIFT

#define CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT1_SHIFT (0x0000000FU)

◆ CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT1_MAX

#define CSL_CSIRX_STREAM1_DATA_CFG_ENABLE_DT1_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_DATA_CFG_VC_SELECT_MASK

#define CSL_CSIRX_STREAM1_DATA_CFG_VC_SELECT_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM1_DATA_CFG_VC_SELECT_SHIFT

#define CSL_CSIRX_STREAM1_DATA_CFG_VC_SELECT_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM1_DATA_CFG_VC_SELECT_MAX

#define CSL_CSIRX_STREAM1_DATA_CFG_VC_SELECT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_CFG_INTERFACE_MODE_MASK

#define CSL_CSIRX_STREAM1_CFG_INTERFACE_MODE_MASK (0x00000001U)

◆ CSL_CSIRX_STREAM1_CFG_INTERFACE_MODE_SHIFT

#define CSL_CSIRX_STREAM1_CFG_INTERFACE_MODE_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM1_CFG_INTERFACE_MODE_MAX

#define CSL_CSIRX_STREAM1_CFG_INTERFACE_MODE_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_CFG_LS_LE_MODE_MASK

#define CSL_CSIRX_STREAM1_CFG_LS_LE_MODE_MASK (0x00000002U)

◆ CSL_CSIRX_STREAM1_CFG_LS_LE_MODE_SHIFT

#define CSL_CSIRX_STREAM1_CFG_LS_LE_MODE_SHIFT (0x00000001U)

◆ CSL_CSIRX_STREAM1_CFG_LS_LE_MODE_MAX

#define CSL_CSIRX_STREAM1_CFG_LS_LE_MODE_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_CFG_NUM_PIXELS_MASK

#define CSL_CSIRX_STREAM1_CFG_NUM_PIXELS_MASK (0x00000030U)

◆ CSL_CSIRX_STREAM1_CFG_NUM_PIXELS_SHIFT

#define CSL_CSIRX_STREAM1_CFG_NUM_PIXELS_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM1_CFG_NUM_PIXELS_MAX

#define CSL_CSIRX_STREAM1_CFG_NUM_PIXELS_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM1_CFG_FIFO_MODE_MASK

#define CSL_CSIRX_STREAM1_CFG_FIFO_MODE_MASK (0x00000300U)

◆ CSL_CSIRX_STREAM1_CFG_FIFO_MODE_SHIFT

#define CSL_CSIRX_STREAM1_CFG_FIFO_MODE_SHIFT (0x00000008U)

◆ CSL_CSIRX_STREAM1_CFG_FIFO_MODE_MAX

#define CSL_CSIRX_STREAM1_CFG_FIFO_MODE_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM1_CFG_BPP_BYPASS_MASK

#define CSL_CSIRX_STREAM1_CFG_BPP_BYPASS_MASK (0x00007000U)

◆ CSL_CSIRX_STREAM1_CFG_BPP_BYPASS_SHIFT

#define CSL_CSIRX_STREAM1_CFG_BPP_BYPASS_SHIFT (0x0000000CU)

◆ CSL_CSIRX_STREAM1_CFG_BPP_BYPASS_MAX

#define CSL_CSIRX_STREAM1_CFG_BPP_BYPASS_MAX (0x00000007U)

◆ CSL_CSIRX_STREAM1_CFG_FIFO_FILL_MASK

#define CSL_CSIRX_STREAM1_CFG_FIFO_FILL_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM1_CFG_FIFO_FILL_SHIFT

#define CSL_CSIRX_STREAM1_CFG_FIFO_FILL_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM1_CFG_FIFO_FILL_MAX

#define CSL_CSIRX_STREAM1_CFG_FIFO_FILL_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_VC_MASK

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_VC_MASK (0x0000000FU)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_VC_SHIFT

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_VC_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_VC_MAX

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_EN_MASK

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_EN_MASK (0x00000010U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_EN_SHIFT

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_EN_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_EN_MAX

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_LB_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_VC_MASK

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_VC_MASK (0x000001E0U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_VC_SHIFT

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_VC_SHIFT (0x00000005U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_VC_MAX

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EN_MASK

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EN_MASK (0x00000200U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EN_SHIFT

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EN_SHIFT (0x00000009U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EN_MAX

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EOF_MASK

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EOF_MASK (0x00000400U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EOF_SHIFT

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EOF_SHIFT (0x0000000AU)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EOF_MAX

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_TIMER_EOF_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_VC_MASK

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_VC_MASK (0x00007800U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_VC_SHIFT

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_VC_SHIFT (0x0000000BU)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_VC_MAX

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_EN_MASK

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_EN_MASK (0x00008000U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_EN_SHIFT

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_EN_SHIFT (0x0000000FU)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_EN_MAX

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_MON_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_LENGTH_MASK

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_LENGTH_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_LENGTH_SHIFT

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_LENGTH_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_LENGTH_MAX

#define CSL_CSIRX_STREAM1_MONITOR_CTRL_FRAME_LENGTH_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_MONITOR_FRAME_NB_MASK

#define CSL_CSIRX_STREAM1_MONITOR_FRAME_NB_MASK (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_MONITOR_FRAME_NB_SHIFT

#define CSL_CSIRX_STREAM1_MONITOR_FRAME_NB_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM1_MONITOR_FRAME_NB_MAX

#define CSL_CSIRX_STREAM1_MONITOR_FRAME_NB_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_MONITOR_FRAME_PACKET_SIZE_MASK

#define CSL_CSIRX_STREAM1_MONITOR_FRAME_PACKET_SIZE_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM1_MONITOR_FRAME_PACKET_SIZE_SHIFT

#define CSL_CSIRX_STREAM1_MONITOR_FRAME_PACKET_SIZE_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM1_MONITOR_FRAME_PACKET_SIZE_MAX

#define CSL_CSIRX_STREAM1_MONITOR_FRAME_PACKET_SIZE_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_MONITOR_LB_BYTE_COUNT_MASK

#define CSL_CSIRX_STREAM1_MONITOR_LB_BYTE_COUNT_MASK (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_MONITOR_LB_BYTE_COUNT_SHIFT

#define CSL_CSIRX_STREAM1_MONITOR_LB_BYTE_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM1_MONITOR_LB_BYTE_COUNT_MAX

#define CSL_CSIRX_STREAM1_MONITOR_LB_BYTE_COUNT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_MONITOR_LB_LINE_COUNT_MASK

#define CSL_CSIRX_STREAM1_MONITOR_LB_LINE_COUNT_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM1_MONITOR_LB_LINE_COUNT_SHIFT

#define CSL_CSIRX_STREAM1_MONITOR_LB_LINE_COUNT_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM1_MONITOR_LB_LINE_COUNT_MAX

#define CSL_CSIRX_STREAM1_MONITOR_LB_LINE_COUNT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_TIMER_COUNT_MASK

#define CSL_CSIRX_STREAM1_TIMER_COUNT_MASK (0x01FFFFFFU)

◆ CSL_CSIRX_STREAM1_TIMER_COUNT_SHIFT

#define CSL_CSIRX_STREAM1_TIMER_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM1_TIMER_COUNT_MAX

#define CSL_CSIRX_STREAM1_TIMER_COUNT_MAX (0x01FFFFFFU)

◆ CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_START_MASK

#define CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_START_MASK (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_START_SHIFT

#define CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_START_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_START_MAX

#define CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_START_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_STOP_MASK

#define CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_STOP_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_STOP_SHIFT

#define CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_STOP_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_STOP_MAX

#define CSL_CSIRX_STREAM1_FCC_CFG_FRAME_COUNT_STOP_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_FCC_CTRL_FCC_EN_MASK

#define CSL_CSIRX_STREAM1_FCC_CTRL_FCC_EN_MASK (0x00000001U)

◆ CSL_CSIRX_STREAM1_FCC_CTRL_FCC_EN_SHIFT

#define CSL_CSIRX_STREAM1_FCC_CTRL_FCC_EN_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM1_FCC_CTRL_FCC_EN_MAX

#define CSL_CSIRX_STREAM1_FCC_CTRL_FCC_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM1_FCC_CTRL_FCC_VC_MASK

#define CSL_CSIRX_STREAM1_FCC_CTRL_FCC_VC_MASK (0x0000001EU)

◆ CSL_CSIRX_STREAM1_FCC_CTRL_FCC_VC_SHIFT

#define CSL_CSIRX_STREAM1_FCC_CTRL_FCC_VC_SHIFT (0x00000001U)

◆ CSL_CSIRX_STREAM1_FCC_CTRL_FCC_VC_MAX

#define CSL_CSIRX_STREAM1_FCC_CTRL_FCC_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM1_FCC_CTRL_FRAME_COUNTER_MASK

#define CSL_CSIRX_STREAM1_FCC_CTRL_FRAME_COUNTER_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM1_FCC_CTRL_FRAME_COUNTER_SHIFT

#define CSL_CSIRX_STREAM1_FCC_CTRL_FRAME_COUNTER_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM1_FCC_CTRL_FRAME_COUNTER_MAX

#define CSL_CSIRX_STREAM1_FCC_CTRL_FRAME_COUNTER_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM1_FIFO_FILL_LVL_COUNT_MASK

#define CSL_CSIRX_STREAM1_FIFO_FILL_LVL_COUNT_MASK (0x000003FFU)

◆ CSL_CSIRX_STREAM1_FIFO_FILL_LVL_COUNT_SHIFT

#define CSL_CSIRX_STREAM1_FIFO_FILL_LVL_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM1_FIFO_FILL_LVL_COUNT_MAX

#define CSL_CSIRX_STREAM1_FIFO_FILL_LVL_COUNT_MAX (0x000003FFU)

◆ CSL_CSIRX_STREAM1_FIFO_FILL_LVL_MODE_MASK

#define CSL_CSIRX_STREAM1_FIFO_FILL_LVL_MODE_MASK (0x00003000U)

◆ CSL_CSIRX_STREAM1_FIFO_FILL_LVL_MODE_SHIFT

#define CSL_CSIRX_STREAM1_FIFO_FILL_LVL_MODE_SHIFT (0x0000000CU)

◆ CSL_CSIRX_STREAM1_FIFO_FILL_LVL_MODE_MAX

#define CSL_CSIRX_STREAM1_FIFO_FILL_LVL_MODE_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM2_CTRL_START_MASK

#define CSL_CSIRX_STREAM2_CTRL_START_MASK (0x00000001U)

◆ CSL_CSIRX_STREAM2_CTRL_START_SHIFT

#define CSL_CSIRX_STREAM2_CTRL_START_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM2_CTRL_START_MAX

#define CSL_CSIRX_STREAM2_CTRL_START_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_CTRL_STOP_MASK

#define CSL_CSIRX_STREAM2_CTRL_STOP_MASK (0x00000002U)

◆ CSL_CSIRX_STREAM2_CTRL_STOP_SHIFT

#define CSL_CSIRX_STREAM2_CTRL_STOP_SHIFT (0x00000001U)

◆ CSL_CSIRX_STREAM2_CTRL_STOP_MAX

#define CSL_CSIRX_STREAM2_CTRL_STOP_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_CTRL_ABORT_MASK

#define CSL_CSIRX_STREAM2_CTRL_ABORT_MASK (0x00000004U)

◆ CSL_CSIRX_STREAM2_CTRL_ABORT_SHIFT

#define CSL_CSIRX_STREAM2_CTRL_ABORT_SHIFT (0x00000002U)

◆ CSL_CSIRX_STREAM2_CTRL_ABORT_MAX

#define CSL_CSIRX_STREAM2_CTRL_ABORT_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_CTRL_SOFT_RST_MASK

#define CSL_CSIRX_STREAM2_CTRL_SOFT_RST_MASK (0x00000010U)

◆ CSL_CSIRX_STREAM2_CTRL_SOFT_RST_SHIFT

#define CSL_CSIRX_STREAM2_CTRL_SOFT_RST_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM2_CTRL_SOFT_RST_MAX

#define CSL_CSIRX_STREAM2_CTRL_SOFT_RST_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_STATUS_PROTOCOL_FSM_MASK

#define CSL_CSIRX_STREAM2_STATUS_PROTOCOL_FSM_MASK (0x00000003U)

◆ CSL_CSIRX_STREAM2_STATUS_PROTOCOL_FSM_SHIFT

#define CSL_CSIRX_STREAM2_STATUS_PROTOCOL_FSM_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM2_STATUS_PROTOCOL_FSM_MAX

#define CSL_CSIRX_STREAM2_STATUS_PROTOCOL_FSM_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM2_STATUS_STREAM_FSM_MASK

#define CSL_CSIRX_STREAM2_STATUS_STREAM_FSM_MASK (0x000000F0U)

◆ CSL_CSIRX_STREAM2_STATUS_STREAM_FSM_SHIFT

#define CSL_CSIRX_STREAM2_STATUS_STREAM_FSM_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM2_STATUS_STREAM_FSM_MAX

#define CSL_CSIRX_STREAM2_STATUS_STREAM_FSM_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM2_STATUS_READY_STATE_MASK

#define CSL_CSIRX_STREAM2_STATUS_READY_STATE_MASK (0x00000100U)

◆ CSL_CSIRX_STREAM2_STATUS_READY_STATE_SHIFT

#define CSL_CSIRX_STREAM2_STATUS_READY_STATE_SHIFT (0x00000008U)

◆ CSL_CSIRX_STREAM2_STATUS_READY_STATE_MAX

#define CSL_CSIRX_STREAM2_STATUS_READY_STATE_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_STATUS_RUNNING_MASK

#define CSL_CSIRX_STREAM2_STATUS_RUNNING_MASK (0x80000000U)

◆ CSL_CSIRX_STREAM2_STATUS_RUNNING_SHIFT

#define CSL_CSIRX_STREAM2_STATUS_RUNNING_SHIFT (0x0000001FU)

◆ CSL_CSIRX_STREAM2_STATUS_RUNNING_MAX

#define CSL_CSIRX_STREAM2_STATUS_RUNNING_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT0_MASK

#define CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT0_MASK (0x0000003FU)

◆ CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT0_SHIFT

#define CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT0_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT0_MAX

#define CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT0_MAX (0x0000003FU)

◆ CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT0_MASK

#define CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT0_MASK (0x00000080U)

◆ CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT0_SHIFT

#define CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT0_SHIFT (0x00000007U)

◆ CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT0_MAX

#define CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT0_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT1_MASK

#define CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT1_MASK (0x00003F00U)

◆ CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT1_SHIFT

#define CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT1_SHIFT (0x00000008U)

◆ CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT1_MAX

#define CSL_CSIRX_STREAM2_DATA_CFG_DATATYPE_SELECT1_MAX (0x0000003FU)

◆ CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT1_MASK

#define CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT1_MASK (0x00008000U)

◆ CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT1_SHIFT

#define CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT1_SHIFT (0x0000000FU)

◆ CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT1_MAX

#define CSL_CSIRX_STREAM2_DATA_CFG_ENABLE_DT1_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_DATA_CFG_VC_SELECT_MASK

#define CSL_CSIRX_STREAM2_DATA_CFG_VC_SELECT_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM2_DATA_CFG_VC_SELECT_SHIFT

#define CSL_CSIRX_STREAM2_DATA_CFG_VC_SELECT_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM2_DATA_CFG_VC_SELECT_MAX

#define CSL_CSIRX_STREAM2_DATA_CFG_VC_SELECT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_CFG_INTERFACE_MODE_MASK

#define CSL_CSIRX_STREAM2_CFG_INTERFACE_MODE_MASK (0x00000001U)

◆ CSL_CSIRX_STREAM2_CFG_INTERFACE_MODE_SHIFT

#define CSL_CSIRX_STREAM2_CFG_INTERFACE_MODE_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM2_CFG_INTERFACE_MODE_MAX

#define CSL_CSIRX_STREAM2_CFG_INTERFACE_MODE_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_CFG_LS_LE_MODE_MASK

#define CSL_CSIRX_STREAM2_CFG_LS_LE_MODE_MASK (0x00000002U)

◆ CSL_CSIRX_STREAM2_CFG_LS_LE_MODE_SHIFT

#define CSL_CSIRX_STREAM2_CFG_LS_LE_MODE_SHIFT (0x00000001U)

◆ CSL_CSIRX_STREAM2_CFG_LS_LE_MODE_MAX

#define CSL_CSIRX_STREAM2_CFG_LS_LE_MODE_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_CFG_NUM_PIXELS_MASK

#define CSL_CSIRX_STREAM2_CFG_NUM_PIXELS_MASK (0x00000030U)

◆ CSL_CSIRX_STREAM2_CFG_NUM_PIXELS_SHIFT

#define CSL_CSIRX_STREAM2_CFG_NUM_PIXELS_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM2_CFG_NUM_PIXELS_MAX

#define CSL_CSIRX_STREAM2_CFG_NUM_PIXELS_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM2_CFG_FIFO_MODE_MASK

#define CSL_CSIRX_STREAM2_CFG_FIFO_MODE_MASK (0x00000300U)

◆ CSL_CSIRX_STREAM2_CFG_FIFO_MODE_SHIFT

#define CSL_CSIRX_STREAM2_CFG_FIFO_MODE_SHIFT (0x00000008U)

◆ CSL_CSIRX_STREAM2_CFG_FIFO_MODE_MAX

#define CSL_CSIRX_STREAM2_CFG_FIFO_MODE_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM2_CFG_BPP_BYPASS_MASK

#define CSL_CSIRX_STREAM2_CFG_BPP_BYPASS_MASK (0x00007000U)

◆ CSL_CSIRX_STREAM2_CFG_BPP_BYPASS_SHIFT

#define CSL_CSIRX_STREAM2_CFG_BPP_BYPASS_SHIFT (0x0000000CU)

◆ CSL_CSIRX_STREAM2_CFG_BPP_BYPASS_MAX

#define CSL_CSIRX_STREAM2_CFG_BPP_BYPASS_MAX (0x00000007U)

◆ CSL_CSIRX_STREAM2_CFG_FIFO_FILL_MASK

#define CSL_CSIRX_STREAM2_CFG_FIFO_FILL_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM2_CFG_FIFO_FILL_SHIFT

#define CSL_CSIRX_STREAM2_CFG_FIFO_FILL_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM2_CFG_FIFO_FILL_MAX

#define CSL_CSIRX_STREAM2_CFG_FIFO_FILL_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_VC_MASK

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_VC_MASK (0x0000000FU)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_VC_SHIFT

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_VC_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_VC_MAX

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_EN_MASK

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_EN_MASK (0x00000010U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_EN_SHIFT

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_EN_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_EN_MAX

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_LB_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_VC_MASK

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_VC_MASK (0x000001E0U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_VC_SHIFT

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_VC_SHIFT (0x00000005U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_VC_MAX

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EN_MASK

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EN_MASK (0x00000200U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EN_SHIFT

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EN_SHIFT (0x00000009U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EN_MAX

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EOF_MASK

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EOF_MASK (0x00000400U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EOF_SHIFT

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EOF_SHIFT (0x0000000AU)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EOF_MAX

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_TIMER_EOF_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_VC_MASK

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_VC_MASK (0x00007800U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_VC_SHIFT

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_VC_SHIFT (0x0000000BU)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_VC_MAX

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_EN_MASK

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_EN_MASK (0x00008000U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_EN_SHIFT

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_EN_SHIFT (0x0000000FU)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_EN_MAX

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_MON_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_LENGTH_MASK

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_LENGTH_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_LENGTH_SHIFT

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_LENGTH_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_LENGTH_MAX

#define CSL_CSIRX_STREAM2_MONITOR_CTRL_FRAME_LENGTH_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_MONITOR_FRAME_NB_MASK

#define CSL_CSIRX_STREAM2_MONITOR_FRAME_NB_MASK (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_MONITOR_FRAME_NB_SHIFT

#define CSL_CSIRX_STREAM2_MONITOR_FRAME_NB_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM2_MONITOR_FRAME_NB_MAX

#define CSL_CSIRX_STREAM2_MONITOR_FRAME_NB_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_MONITOR_FRAME_PACKET_SIZE_MASK

#define CSL_CSIRX_STREAM2_MONITOR_FRAME_PACKET_SIZE_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM2_MONITOR_FRAME_PACKET_SIZE_SHIFT

#define CSL_CSIRX_STREAM2_MONITOR_FRAME_PACKET_SIZE_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM2_MONITOR_FRAME_PACKET_SIZE_MAX

#define CSL_CSIRX_STREAM2_MONITOR_FRAME_PACKET_SIZE_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_MONITOR_LB_BYTE_COUNT_MASK

#define CSL_CSIRX_STREAM2_MONITOR_LB_BYTE_COUNT_MASK (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_MONITOR_LB_BYTE_COUNT_SHIFT

#define CSL_CSIRX_STREAM2_MONITOR_LB_BYTE_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM2_MONITOR_LB_BYTE_COUNT_MAX

#define CSL_CSIRX_STREAM2_MONITOR_LB_BYTE_COUNT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_MONITOR_LB_LINE_COUNT_MASK

#define CSL_CSIRX_STREAM2_MONITOR_LB_LINE_COUNT_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM2_MONITOR_LB_LINE_COUNT_SHIFT

#define CSL_CSIRX_STREAM2_MONITOR_LB_LINE_COUNT_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM2_MONITOR_LB_LINE_COUNT_MAX

#define CSL_CSIRX_STREAM2_MONITOR_LB_LINE_COUNT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_TIMER_COUNT_MASK

#define CSL_CSIRX_STREAM2_TIMER_COUNT_MASK (0x01FFFFFFU)

◆ CSL_CSIRX_STREAM2_TIMER_COUNT_SHIFT

#define CSL_CSIRX_STREAM2_TIMER_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM2_TIMER_COUNT_MAX

#define CSL_CSIRX_STREAM2_TIMER_COUNT_MAX (0x01FFFFFFU)

◆ CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_START_MASK

#define CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_START_MASK (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_START_SHIFT

#define CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_START_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_START_MAX

#define CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_START_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_STOP_MASK

#define CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_STOP_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_STOP_SHIFT

#define CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_STOP_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_STOP_MAX

#define CSL_CSIRX_STREAM2_FCC_CFG_FRAME_COUNT_STOP_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_FCC_CTRL_FCC_EN_MASK

#define CSL_CSIRX_STREAM2_FCC_CTRL_FCC_EN_MASK (0x00000001U)

◆ CSL_CSIRX_STREAM2_FCC_CTRL_FCC_EN_SHIFT

#define CSL_CSIRX_STREAM2_FCC_CTRL_FCC_EN_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM2_FCC_CTRL_FCC_EN_MAX

#define CSL_CSIRX_STREAM2_FCC_CTRL_FCC_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM2_FCC_CTRL_FCC_VC_MASK

#define CSL_CSIRX_STREAM2_FCC_CTRL_FCC_VC_MASK (0x0000001EU)

◆ CSL_CSIRX_STREAM2_FCC_CTRL_FCC_VC_SHIFT

#define CSL_CSIRX_STREAM2_FCC_CTRL_FCC_VC_SHIFT (0x00000001U)

◆ CSL_CSIRX_STREAM2_FCC_CTRL_FCC_VC_MAX

#define CSL_CSIRX_STREAM2_FCC_CTRL_FCC_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM2_FCC_CTRL_FRAME_COUNTER_MASK

#define CSL_CSIRX_STREAM2_FCC_CTRL_FRAME_COUNTER_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM2_FCC_CTRL_FRAME_COUNTER_SHIFT

#define CSL_CSIRX_STREAM2_FCC_CTRL_FRAME_COUNTER_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM2_FCC_CTRL_FRAME_COUNTER_MAX

#define CSL_CSIRX_STREAM2_FCC_CTRL_FRAME_COUNTER_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM2_FIFO_FILL_LVL_COUNT_MASK

#define CSL_CSIRX_STREAM2_FIFO_FILL_LVL_COUNT_MASK (0x000003FFU)

◆ CSL_CSIRX_STREAM2_FIFO_FILL_LVL_COUNT_SHIFT

#define CSL_CSIRX_STREAM2_FIFO_FILL_LVL_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM2_FIFO_FILL_LVL_COUNT_MAX

#define CSL_CSIRX_STREAM2_FIFO_FILL_LVL_COUNT_MAX (0x000003FFU)

◆ CSL_CSIRX_STREAM2_FIFO_FILL_LVL_MODE_MASK

#define CSL_CSIRX_STREAM2_FIFO_FILL_LVL_MODE_MASK (0x00003000U)

◆ CSL_CSIRX_STREAM2_FIFO_FILL_LVL_MODE_SHIFT

#define CSL_CSIRX_STREAM2_FIFO_FILL_LVL_MODE_SHIFT (0x0000000CU)

◆ CSL_CSIRX_STREAM2_FIFO_FILL_LVL_MODE_MAX

#define CSL_CSIRX_STREAM2_FIFO_FILL_LVL_MODE_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM3_CTRL_START_MASK

#define CSL_CSIRX_STREAM3_CTRL_START_MASK (0x00000001U)

◆ CSL_CSIRX_STREAM3_CTRL_START_SHIFT

#define CSL_CSIRX_STREAM3_CTRL_START_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM3_CTRL_START_MAX

#define CSL_CSIRX_STREAM3_CTRL_START_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_CTRL_STOP_MASK

#define CSL_CSIRX_STREAM3_CTRL_STOP_MASK (0x00000002U)

◆ CSL_CSIRX_STREAM3_CTRL_STOP_SHIFT

#define CSL_CSIRX_STREAM3_CTRL_STOP_SHIFT (0x00000001U)

◆ CSL_CSIRX_STREAM3_CTRL_STOP_MAX

#define CSL_CSIRX_STREAM3_CTRL_STOP_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_CTRL_ABORT_MASK

#define CSL_CSIRX_STREAM3_CTRL_ABORT_MASK (0x00000004U)

◆ CSL_CSIRX_STREAM3_CTRL_ABORT_SHIFT

#define CSL_CSIRX_STREAM3_CTRL_ABORT_SHIFT (0x00000002U)

◆ CSL_CSIRX_STREAM3_CTRL_ABORT_MAX

#define CSL_CSIRX_STREAM3_CTRL_ABORT_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_CTRL_SOFT_RST_MASK

#define CSL_CSIRX_STREAM3_CTRL_SOFT_RST_MASK (0x00000010U)

◆ CSL_CSIRX_STREAM3_CTRL_SOFT_RST_SHIFT

#define CSL_CSIRX_STREAM3_CTRL_SOFT_RST_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM3_CTRL_SOFT_RST_MAX

#define CSL_CSIRX_STREAM3_CTRL_SOFT_RST_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_STATUS_PROTOCOL_FSM_MASK

#define CSL_CSIRX_STREAM3_STATUS_PROTOCOL_FSM_MASK (0x00000003U)

◆ CSL_CSIRX_STREAM3_STATUS_PROTOCOL_FSM_SHIFT

#define CSL_CSIRX_STREAM3_STATUS_PROTOCOL_FSM_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM3_STATUS_PROTOCOL_FSM_MAX

#define CSL_CSIRX_STREAM3_STATUS_PROTOCOL_FSM_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM3_STATUS_STREAM_FSM_MASK

#define CSL_CSIRX_STREAM3_STATUS_STREAM_FSM_MASK (0x000000F0U)

◆ CSL_CSIRX_STREAM3_STATUS_STREAM_FSM_SHIFT

#define CSL_CSIRX_STREAM3_STATUS_STREAM_FSM_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM3_STATUS_STREAM_FSM_MAX

#define CSL_CSIRX_STREAM3_STATUS_STREAM_FSM_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM3_STATUS_READY_STATE_MASK

#define CSL_CSIRX_STREAM3_STATUS_READY_STATE_MASK (0x00000100U)

◆ CSL_CSIRX_STREAM3_STATUS_READY_STATE_SHIFT

#define CSL_CSIRX_STREAM3_STATUS_READY_STATE_SHIFT (0x00000008U)

◆ CSL_CSIRX_STREAM3_STATUS_READY_STATE_MAX

#define CSL_CSIRX_STREAM3_STATUS_READY_STATE_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_STATUS_RUNNING_MASK

#define CSL_CSIRX_STREAM3_STATUS_RUNNING_MASK (0x80000000U)

◆ CSL_CSIRX_STREAM3_STATUS_RUNNING_SHIFT

#define CSL_CSIRX_STREAM3_STATUS_RUNNING_SHIFT (0x0000001FU)

◆ CSL_CSIRX_STREAM3_STATUS_RUNNING_MAX

#define CSL_CSIRX_STREAM3_STATUS_RUNNING_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT0_MASK

#define CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT0_MASK (0x0000003FU)

◆ CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT0_SHIFT

#define CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT0_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT0_MAX

#define CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT0_MAX (0x0000003FU)

◆ CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT0_MASK

#define CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT0_MASK (0x00000080U)

◆ CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT0_SHIFT

#define CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT0_SHIFT (0x00000007U)

◆ CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT0_MAX

#define CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT0_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT1_MASK

#define CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT1_MASK (0x00003F00U)

◆ CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT1_SHIFT

#define CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT1_SHIFT (0x00000008U)

◆ CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT1_MAX

#define CSL_CSIRX_STREAM3_DATA_CFG_DATATYPE_SELECT1_MAX (0x0000003FU)

◆ CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT1_MASK

#define CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT1_MASK (0x00008000U)

◆ CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT1_SHIFT

#define CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT1_SHIFT (0x0000000FU)

◆ CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT1_MAX

#define CSL_CSIRX_STREAM3_DATA_CFG_ENABLE_DT1_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_DATA_CFG_VC_SELECT_MASK

#define CSL_CSIRX_STREAM3_DATA_CFG_VC_SELECT_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM3_DATA_CFG_VC_SELECT_SHIFT

#define CSL_CSIRX_STREAM3_DATA_CFG_VC_SELECT_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM3_DATA_CFG_VC_SELECT_MAX

#define CSL_CSIRX_STREAM3_DATA_CFG_VC_SELECT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_CFG_INTERFACE_MODE_MASK

#define CSL_CSIRX_STREAM3_CFG_INTERFACE_MODE_MASK (0x00000001U)

◆ CSL_CSIRX_STREAM3_CFG_INTERFACE_MODE_SHIFT

#define CSL_CSIRX_STREAM3_CFG_INTERFACE_MODE_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM3_CFG_INTERFACE_MODE_MAX

#define CSL_CSIRX_STREAM3_CFG_INTERFACE_MODE_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_CFG_LS_LE_MODE_MASK

#define CSL_CSIRX_STREAM3_CFG_LS_LE_MODE_MASK (0x00000002U)

◆ CSL_CSIRX_STREAM3_CFG_LS_LE_MODE_SHIFT

#define CSL_CSIRX_STREAM3_CFG_LS_LE_MODE_SHIFT (0x00000001U)

◆ CSL_CSIRX_STREAM3_CFG_LS_LE_MODE_MAX

#define CSL_CSIRX_STREAM3_CFG_LS_LE_MODE_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_CFG_NUM_PIXELS_MASK

#define CSL_CSIRX_STREAM3_CFG_NUM_PIXELS_MASK (0x00000030U)

◆ CSL_CSIRX_STREAM3_CFG_NUM_PIXELS_SHIFT

#define CSL_CSIRX_STREAM3_CFG_NUM_PIXELS_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM3_CFG_NUM_PIXELS_MAX

#define CSL_CSIRX_STREAM3_CFG_NUM_PIXELS_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM3_CFG_FIFO_MODE_MASK

#define CSL_CSIRX_STREAM3_CFG_FIFO_MODE_MASK (0x00000300U)

◆ CSL_CSIRX_STREAM3_CFG_FIFO_MODE_SHIFT

#define CSL_CSIRX_STREAM3_CFG_FIFO_MODE_SHIFT (0x00000008U)

◆ CSL_CSIRX_STREAM3_CFG_FIFO_MODE_MAX

#define CSL_CSIRX_STREAM3_CFG_FIFO_MODE_MAX (0x00000003U)

◆ CSL_CSIRX_STREAM3_CFG_BPP_BYPASS_MASK

#define CSL_CSIRX_STREAM3_CFG_BPP_BYPASS_MASK (0x00007000U)

◆ CSL_CSIRX_STREAM3_CFG_BPP_BYPASS_SHIFT

#define CSL_CSIRX_STREAM3_CFG_BPP_BYPASS_SHIFT (0x0000000CU)

◆ CSL_CSIRX_STREAM3_CFG_BPP_BYPASS_MAX

#define CSL_CSIRX_STREAM3_CFG_BPP_BYPASS_MAX (0x00000007U)

◆ CSL_CSIRX_STREAM3_CFG_FIFO_FILL_MASK

#define CSL_CSIRX_STREAM3_CFG_FIFO_FILL_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM3_CFG_FIFO_FILL_SHIFT

#define CSL_CSIRX_STREAM3_CFG_FIFO_FILL_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM3_CFG_FIFO_FILL_MAX

#define CSL_CSIRX_STREAM3_CFG_FIFO_FILL_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_VC_MASK

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_VC_MASK (0x0000000FU)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_VC_SHIFT

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_VC_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_VC_MAX

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_EN_MASK

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_EN_MASK (0x00000010U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_EN_SHIFT

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_EN_SHIFT (0x00000004U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_EN_MAX

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_LB_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_VC_MASK

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_VC_MASK (0x000001E0U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_VC_SHIFT

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_VC_SHIFT (0x00000005U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_VC_MAX

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EN_MASK

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EN_MASK (0x00000200U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EN_SHIFT

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EN_SHIFT (0x00000009U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EN_MAX

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EOF_MASK

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EOF_MASK (0x00000400U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EOF_SHIFT

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EOF_SHIFT (0x0000000AU)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EOF_MAX

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_TIMER_EOF_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_VC_MASK

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_VC_MASK (0x00007800U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_VC_SHIFT

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_VC_SHIFT (0x0000000BU)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_VC_MAX

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_EN_MASK

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_EN_MASK (0x00008000U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_EN_SHIFT

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_EN_SHIFT (0x0000000FU)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_EN_MAX

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_MON_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_LENGTH_MASK

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_LENGTH_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_LENGTH_SHIFT

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_LENGTH_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_LENGTH_MAX

#define CSL_CSIRX_STREAM3_MONITOR_CTRL_FRAME_LENGTH_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_MONITOR_FRAME_NB_MASK

#define CSL_CSIRX_STREAM3_MONITOR_FRAME_NB_MASK (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_MONITOR_FRAME_NB_SHIFT

#define CSL_CSIRX_STREAM3_MONITOR_FRAME_NB_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM3_MONITOR_FRAME_NB_MAX

#define CSL_CSIRX_STREAM3_MONITOR_FRAME_NB_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_MONITOR_FRAME_PACKET_SIZE_MASK

#define CSL_CSIRX_STREAM3_MONITOR_FRAME_PACKET_SIZE_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM3_MONITOR_FRAME_PACKET_SIZE_SHIFT

#define CSL_CSIRX_STREAM3_MONITOR_FRAME_PACKET_SIZE_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM3_MONITOR_FRAME_PACKET_SIZE_MAX

#define CSL_CSIRX_STREAM3_MONITOR_FRAME_PACKET_SIZE_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_MONITOR_LB_BYTE_COUNT_MASK

#define CSL_CSIRX_STREAM3_MONITOR_LB_BYTE_COUNT_MASK (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_MONITOR_LB_BYTE_COUNT_SHIFT

#define CSL_CSIRX_STREAM3_MONITOR_LB_BYTE_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM3_MONITOR_LB_BYTE_COUNT_MAX

#define CSL_CSIRX_STREAM3_MONITOR_LB_BYTE_COUNT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_MONITOR_LB_LINE_COUNT_MASK

#define CSL_CSIRX_STREAM3_MONITOR_LB_LINE_COUNT_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM3_MONITOR_LB_LINE_COUNT_SHIFT

#define CSL_CSIRX_STREAM3_MONITOR_LB_LINE_COUNT_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM3_MONITOR_LB_LINE_COUNT_MAX

#define CSL_CSIRX_STREAM3_MONITOR_LB_LINE_COUNT_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_TIMER_COUNT_MASK

#define CSL_CSIRX_STREAM3_TIMER_COUNT_MASK (0x01FFFFFFU)

◆ CSL_CSIRX_STREAM3_TIMER_COUNT_SHIFT

#define CSL_CSIRX_STREAM3_TIMER_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM3_TIMER_COUNT_MAX

#define CSL_CSIRX_STREAM3_TIMER_COUNT_MAX (0x01FFFFFFU)

◆ CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_START_MASK

#define CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_START_MASK (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_START_SHIFT

#define CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_START_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_START_MAX

#define CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_START_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_STOP_MASK

#define CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_STOP_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_STOP_SHIFT

#define CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_STOP_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_STOP_MAX

#define CSL_CSIRX_STREAM3_FCC_CFG_FRAME_COUNT_STOP_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_FCC_CTRL_FCC_EN_MASK

#define CSL_CSIRX_STREAM3_FCC_CTRL_FCC_EN_MASK (0x00000001U)

◆ CSL_CSIRX_STREAM3_FCC_CTRL_FCC_EN_SHIFT

#define CSL_CSIRX_STREAM3_FCC_CTRL_FCC_EN_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM3_FCC_CTRL_FCC_EN_MAX

#define CSL_CSIRX_STREAM3_FCC_CTRL_FCC_EN_MAX (0x00000001U)

◆ CSL_CSIRX_STREAM3_FCC_CTRL_FCC_VC_MASK

#define CSL_CSIRX_STREAM3_FCC_CTRL_FCC_VC_MASK (0x0000001EU)

◆ CSL_CSIRX_STREAM3_FCC_CTRL_FCC_VC_SHIFT

#define CSL_CSIRX_STREAM3_FCC_CTRL_FCC_VC_SHIFT (0x00000001U)

◆ CSL_CSIRX_STREAM3_FCC_CTRL_FCC_VC_MAX

#define CSL_CSIRX_STREAM3_FCC_CTRL_FCC_VC_MAX (0x0000000FU)

◆ CSL_CSIRX_STREAM3_FCC_CTRL_FRAME_COUNTER_MASK

#define CSL_CSIRX_STREAM3_FCC_CTRL_FRAME_COUNTER_MASK (0xFFFF0000U)

◆ CSL_CSIRX_STREAM3_FCC_CTRL_FRAME_COUNTER_SHIFT

#define CSL_CSIRX_STREAM3_FCC_CTRL_FRAME_COUNTER_SHIFT (0x00000010U)

◆ CSL_CSIRX_STREAM3_FCC_CTRL_FRAME_COUNTER_MAX

#define CSL_CSIRX_STREAM3_FCC_CTRL_FRAME_COUNTER_MAX (0x0000FFFFU)

◆ CSL_CSIRX_STREAM3_FIFO_FILL_LVL_COUNT_MASK

#define CSL_CSIRX_STREAM3_FIFO_FILL_LVL_COUNT_MASK (0x000003FFU)

◆ CSL_CSIRX_STREAM3_FIFO_FILL_LVL_COUNT_SHIFT

#define CSL_CSIRX_STREAM3_FIFO_FILL_LVL_COUNT_SHIFT (0x00000000U)

◆ CSL_CSIRX_STREAM3_FIFO_FILL_LVL_COUNT_MAX

#define CSL_CSIRX_STREAM3_FIFO_FILL_LVL_COUNT_MAX (0x000003FFU)

◆ CSL_CSIRX_STREAM3_FIFO_FILL_LVL_MODE_MASK

#define CSL_CSIRX_STREAM3_FIFO_FILL_LVL_MODE_MASK (0x00003000U)

◆ CSL_CSIRX_STREAM3_FIFO_FILL_LVL_MODE_SHIFT

#define CSL_CSIRX_STREAM3_FIFO_FILL_LVL_MODE_SHIFT (0x0000000CU)

◆ CSL_CSIRX_STREAM3_FIFO_FILL_LVL_MODE_MAX

#define CSL_CSIRX_STREAM3_FIFO_FILL_LVL_MODE_MAX (0x00000003U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_CORR_ERR_MASK

#define CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_CORR_ERR_MASK (0x00000001U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_CORR_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_CORR_ERR_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_CORR_ERR_MAX

#define CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_CORR_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_UNCORR_ERR_MASK

#define CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_UNCORR_ERR_MASK (0x00000002U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_UNCORR_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_UNCORR_ERR_SHIFT (0x00000001U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_UNCORR_ERR_MAX

#define CSL_CSIRX_ASF_INT_STATUS_ASF_SRAM_UNCORR_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_DAP_ERR_MASK

#define CSL_CSIRX_ASF_INT_STATUS_ASF_DAP_ERR_MASK (0x00000004U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_DAP_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_STATUS_ASF_DAP_ERR_SHIFT (0x00000002U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_DAP_ERR_MAX

#define CSL_CSIRX_ASF_INT_STATUS_ASF_DAP_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_CSR_ERR_MASK

#define CSL_CSIRX_ASF_INT_STATUS_ASF_CSR_ERR_MASK (0x00000008U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_CSR_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_STATUS_ASF_CSR_ERR_SHIFT (0x00000003U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_CSR_ERR_MAX

#define CSL_CSIRX_ASF_INT_STATUS_ASF_CSR_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_TRANS_TO_ERR_MASK

#define CSL_CSIRX_ASF_INT_STATUS_ASF_TRANS_TO_ERR_MASK (0x00000010U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_TRANS_TO_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_STATUS_ASF_TRANS_TO_ERR_SHIFT (0x00000004U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_TRANS_TO_ERR_MAX

#define CSL_CSIRX_ASF_INT_STATUS_ASF_TRANS_TO_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_PROTOCOL_ERR_MASK

#define CSL_CSIRX_ASF_INT_STATUS_ASF_PROTOCOL_ERR_MASK (0x00000020U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_PROTOCOL_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_STATUS_ASF_PROTOCOL_ERR_SHIFT (0x00000005U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_PROTOCOL_ERR_MAX

#define CSL_CSIRX_ASF_INT_STATUS_ASF_PROTOCOL_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_INTEGRITY_ERR_MASK

#define CSL_CSIRX_ASF_INT_STATUS_ASF_INTEGRITY_ERR_MASK (0x00000040U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_INTEGRITY_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_STATUS_ASF_INTEGRITY_ERR_SHIFT (0x00000006U)

◆ CSL_CSIRX_ASF_INT_STATUS_ASF_INTEGRITY_ERR_MAX

#define CSL_CSIRX_ASF_INT_STATUS_ASF_INTEGRITY_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_STATUS_RESERVED_31_7_MASK

#define CSL_CSIRX_ASF_INT_STATUS_RESERVED_31_7_MASK (0xFFFFFF80U)

◆ CSL_CSIRX_ASF_INT_STATUS_RESERVED_31_7_SHIFT

#define CSL_CSIRX_ASF_INT_STATUS_RESERVED_31_7_SHIFT (0x00000007U)

◆ CSL_CSIRX_ASF_INT_STATUS_RESERVED_31_7_MAX

#define CSL_CSIRX_ASF_INT_STATUS_RESERVED_31_7_MAX (0x01FFFFFFU)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_CORR_ERR_MASK

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_CORR_ERR_MASK (0x00000001U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_CORR_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_CORR_ERR_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_CORR_ERR_MAX

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_CORR_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_UNCORR_ERR_MASK

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_UNCORR_ERR_MASK (0x00000002U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_UNCORR_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_UNCORR_ERR_SHIFT (0x00000001U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_UNCORR_ERR_MAX

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_SRAM_UNCORR_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_DAP_ERR_MASK

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_DAP_ERR_MASK (0x00000004U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_DAP_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_DAP_ERR_SHIFT (0x00000002U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_DAP_ERR_MAX

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_DAP_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_CSR_ERR_MASK

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_CSR_ERR_MASK (0x00000008U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_CSR_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_CSR_ERR_SHIFT (0x00000003U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_CSR_ERR_MAX

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_CSR_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_TRANS_TO_ERR_MASK

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_TRANS_TO_ERR_MASK (0x00000010U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_TRANS_TO_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_TRANS_TO_ERR_SHIFT (0x00000004U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_TRANS_TO_ERR_MAX

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_TRANS_TO_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_PROTOCOL_ERR_MASK

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_PROTOCOL_ERR_MASK (0x00000020U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_PROTOCOL_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_PROTOCOL_ERR_SHIFT (0x00000005U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_PROTOCOL_ERR_MAX

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_PROTOCOL_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_INTEGRITY_ERR_MASK

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_INTEGRITY_ERR_MASK (0x00000040U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_INTEGRITY_ERR_SHIFT

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_INTEGRITY_ERR_SHIFT (0x00000006U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_INTEGRITY_ERR_MAX

#define CSL_CSIRX_ASF_INT_RAW_STATUS_ASF_INTEGRITY_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_RESERVED_31_7_MASK

#define CSL_CSIRX_ASF_INT_RAW_STATUS_RESERVED_31_7_MASK (0xFFFFFF80U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_RESERVED_31_7_SHIFT

#define CSL_CSIRX_ASF_INT_RAW_STATUS_RESERVED_31_7_SHIFT (0x00000007U)

◆ CSL_CSIRX_ASF_INT_RAW_STATUS_RESERVED_31_7_MAX

#define CSL_CSIRX_ASF_INT_RAW_STATUS_RESERVED_31_7_MAX (0x01FFFFFFU)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_CORR_ERR_MASK_MASK

#define CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_CORR_ERR_MASK_MASK (0x00000001U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_CORR_ERR_MASK_SHIFT

#define CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_CORR_ERR_MASK_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_CORR_ERR_MASK_MAX

#define CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_CORR_ERR_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_UNCORR_ERR_MASK_MASK

#define CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_UNCORR_ERR_MASK_MASK (0x00000002U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_UNCORR_ERR_MASK_SHIFT

#define CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_UNCORR_ERR_MASK_SHIFT (0x00000001U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_UNCORR_ERR_MASK_MAX

#define CSL_CSIRX_ASF_INT_MASK_ASF_SRAM_UNCORR_ERR_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_DAP_ERR_MASK_MASK

#define CSL_CSIRX_ASF_INT_MASK_ASF_DAP_ERR_MASK_MASK (0x00000004U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_DAP_ERR_MASK_SHIFT

#define CSL_CSIRX_ASF_INT_MASK_ASF_DAP_ERR_MASK_SHIFT (0x00000002U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_DAP_ERR_MASK_MAX

#define CSL_CSIRX_ASF_INT_MASK_ASF_DAP_ERR_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_CSR_ERR_MASK_MASK

#define CSL_CSIRX_ASF_INT_MASK_ASF_CSR_ERR_MASK_MASK (0x00000008U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_CSR_ERR_MASK_SHIFT

#define CSL_CSIRX_ASF_INT_MASK_ASF_CSR_ERR_MASK_SHIFT (0x00000003U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_CSR_ERR_MASK_MAX

#define CSL_CSIRX_ASF_INT_MASK_ASF_CSR_ERR_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_TRANS_TO_ERR_MASK_MASK

#define CSL_CSIRX_ASF_INT_MASK_ASF_TRANS_TO_ERR_MASK_MASK (0x00000010U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_TRANS_TO_ERR_MASK_SHIFT

#define CSL_CSIRX_ASF_INT_MASK_ASF_TRANS_TO_ERR_MASK_SHIFT (0x00000004U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_TRANS_TO_ERR_MASK_MAX

#define CSL_CSIRX_ASF_INT_MASK_ASF_TRANS_TO_ERR_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_PROTOCOL_ERR_MASK_MASK

#define CSL_CSIRX_ASF_INT_MASK_ASF_PROTOCOL_ERR_MASK_MASK (0x00000020U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_PROTOCOL_ERR_MASK_SHIFT

#define CSL_CSIRX_ASF_INT_MASK_ASF_PROTOCOL_ERR_MASK_SHIFT (0x00000005U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_PROTOCOL_ERR_MASK_MAX

#define CSL_CSIRX_ASF_INT_MASK_ASF_PROTOCOL_ERR_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_INTEGRITY_ERR_MASK_MASK

#define CSL_CSIRX_ASF_INT_MASK_ASF_INTEGRITY_ERR_MASK_MASK (0x00000040U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_INTEGRITY_ERR_MASK_SHIFT

#define CSL_CSIRX_ASF_INT_MASK_ASF_INTEGRITY_ERR_MASK_SHIFT (0x00000006U)

◆ CSL_CSIRX_ASF_INT_MASK_ASF_INTEGRITY_ERR_MASK_MAX

#define CSL_CSIRX_ASF_INT_MASK_ASF_INTEGRITY_ERR_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_MASK_RESERVED_31_7_MASK

#define CSL_CSIRX_ASF_INT_MASK_RESERVED_31_7_MASK (0xFFFFFF80U)

◆ CSL_CSIRX_ASF_INT_MASK_RESERVED_31_7_SHIFT

#define CSL_CSIRX_ASF_INT_MASK_RESERVED_31_7_SHIFT (0x00000007U)

◆ CSL_CSIRX_ASF_INT_MASK_RESERVED_31_7_MAX

#define CSL_CSIRX_ASF_INT_MASK_RESERVED_31_7_MAX (0x01FFFFFFU)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_CORR_ERR_TEST_MASK

#define CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_CORR_ERR_TEST_MASK (0x00000001U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_CORR_ERR_TEST_SHIFT

#define CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_CORR_ERR_TEST_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_CORR_ERR_TEST_MAX

#define CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_CORR_ERR_TEST_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_UNCORR_ERR_TEST_MASK

#define CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_UNCORR_ERR_TEST_MASK (0x00000002U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_UNCORR_ERR_TEST_SHIFT

#define CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_UNCORR_ERR_TEST_SHIFT (0x00000001U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_UNCORR_ERR_TEST_MAX

#define CSL_CSIRX_ASF_INT_TEST_ASF_SRAM_UNCORR_ERR_TEST_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_DAP_ERR_TEST_MASK

#define CSL_CSIRX_ASF_INT_TEST_ASF_DAP_ERR_TEST_MASK (0x00000004U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_DAP_ERR_TEST_SHIFT

#define CSL_CSIRX_ASF_INT_TEST_ASF_DAP_ERR_TEST_SHIFT (0x00000002U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_DAP_ERR_TEST_MAX

#define CSL_CSIRX_ASF_INT_TEST_ASF_DAP_ERR_TEST_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_CSR_ERR_TEST_MASK

#define CSL_CSIRX_ASF_INT_TEST_ASF_CSR_ERR_TEST_MASK (0x00000008U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_CSR_ERR_TEST_SHIFT

#define CSL_CSIRX_ASF_INT_TEST_ASF_CSR_ERR_TEST_SHIFT (0x00000003U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_CSR_ERR_TEST_MAX

#define CSL_CSIRX_ASF_INT_TEST_ASF_CSR_ERR_TEST_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_TRANS_TO_ERR_TEST_MASK

#define CSL_CSIRX_ASF_INT_TEST_ASF_TRANS_TO_ERR_TEST_MASK (0x00000010U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_TRANS_TO_ERR_TEST_SHIFT

#define CSL_CSIRX_ASF_INT_TEST_ASF_TRANS_TO_ERR_TEST_SHIFT (0x00000004U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_TRANS_TO_ERR_TEST_MAX

#define CSL_CSIRX_ASF_INT_TEST_ASF_TRANS_TO_ERR_TEST_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_PROTOCOL_ERR_TEST_MASK

#define CSL_CSIRX_ASF_INT_TEST_ASF_PROTOCOL_ERR_TEST_MASK (0x00000020U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_PROTOCOL_ERR_TEST_SHIFT

#define CSL_CSIRX_ASF_INT_TEST_ASF_PROTOCOL_ERR_TEST_SHIFT (0x00000005U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_PROTOCOL_ERR_TEST_MAX

#define CSL_CSIRX_ASF_INT_TEST_ASF_PROTOCOL_ERR_TEST_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_INTEGRITY_ERR_TEST_MASK

#define CSL_CSIRX_ASF_INT_TEST_ASF_INTEGRITY_ERR_TEST_MASK (0x00000040U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_INTEGRITY_ERR_TEST_SHIFT

#define CSL_CSIRX_ASF_INT_TEST_ASF_INTEGRITY_ERR_TEST_SHIFT (0x00000006U)

◆ CSL_CSIRX_ASF_INT_TEST_ASF_INTEGRITY_ERR_TEST_MAX

#define CSL_CSIRX_ASF_INT_TEST_ASF_INTEGRITY_ERR_TEST_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_INT_TEST_RESERVED_31_7_MASK

#define CSL_CSIRX_ASF_INT_TEST_RESERVED_31_7_MASK (0xFFFFFF80U)

◆ CSL_CSIRX_ASF_INT_TEST_RESERVED_31_7_SHIFT

#define CSL_CSIRX_ASF_INT_TEST_RESERVED_31_7_SHIFT (0x00000007U)

◆ CSL_CSIRX_ASF_INT_TEST_RESERVED_31_7_MAX

#define CSL_CSIRX_ASF_INT_TEST_RESERVED_31_7_MAX (0x01FFFFFFU)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_CORR_ERR_MASK

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_CORR_ERR_MASK (0x00000001U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_CORR_ERR_SHIFT

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_CORR_ERR_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_CORR_ERR_MAX

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_CORR_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_UNCORR_ERR_MASK

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_UNCORR_ERR_MASK (0x00000002U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_UNCORR_ERR_SHIFT

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_UNCORR_ERR_SHIFT (0x00000001U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_UNCORR_ERR_MAX

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_SRAM_UNCORR_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_DAP_ERR_MASK

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_DAP_ERR_MASK (0x00000004U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_DAP_ERR_SHIFT

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_DAP_ERR_SHIFT (0x00000002U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_DAP_ERR_MAX

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_DAP_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_CSR_ERR_MASK

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_CSR_ERR_MASK (0x00000008U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_CSR_ERR_SHIFT

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_CSR_ERR_SHIFT (0x00000003U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_CSR_ERR_MAX

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_CSR_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_TRANS_TO_ERR_MASK

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_TRANS_TO_ERR_MASK (0x00000010U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_TRANS_TO_ERR_SHIFT

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_TRANS_TO_ERR_SHIFT (0x00000004U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_TRANS_TO_ERR_MAX

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_TRANS_TO_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_PROTOCOL_ERR_MASK

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_PROTOCOL_ERR_MASK (0x00000020U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_PROTOCOL_ERR_SHIFT

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_PROTOCOL_ERR_SHIFT (0x00000005U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_PROTOCOL_ERR_MAX

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_PROTOCOL_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_INTEGRITY_ERR_MASK

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_INTEGRITY_ERR_MASK (0x00000040U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_INTEGRITY_ERR_SHIFT

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_INTEGRITY_ERR_SHIFT (0x00000006U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_INTEGRITY_ERR_MAX

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_ASF_INTEGRITY_ERR_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_RESERVED_31_7_MASK

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_RESERVED_31_7_MASK (0xFFFFFF80U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_RESERVED_31_7_SHIFT

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_RESERVED_31_7_SHIFT (0x00000007U)

◆ CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_RESERVED_31_7_MAX

#define CSL_CSIRX_ASF_FATAL_NONFATAL_SELECT_RESERVED_31_7_MAX (0x01FFFFFFU)

◆ CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_ADDR_MASK

#define CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_ADDR_MASK (0x00FFFFFFU)

◆ CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_ADDR_SHIFT

#define CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_ADDR_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_ADDR_MAX

#define CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_ADDR_MAX (0x00FFFFFFU)

◆ CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_INST_MASK

#define CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_INST_MASK (0xFF000000U)

◆ CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_INST_SHIFT

#define CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_INST_SHIFT (0x00000018U)

◆ CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_INST_MAX

#define CSL_CSIRX_ASF_SRAM_CORR_FAULT_STATUS_ASF_SRAM_CORR_FAULT_INST_MAX (0x000000FFU)

◆ CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_ADDR_MASK

#define CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_ADDR_MASK (0x00FFFFFFU)

◆ CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_ADDR_SHIFT

#define CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_ADDR_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_ADDR_MAX

#define CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_ADDR_MAX (0x00FFFFFFU)

◆ CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_INST_MASK

#define CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_INST_MASK (0xFF000000U)

◆ CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_INST_SHIFT

#define CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_INST_SHIFT (0x00000018U)

◆ CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_INST_MAX

#define CSL_CSIRX_ASF_SRAM_UNCORR_FAULT_STATUS_ASF_SRAM_UNCORR_FAULT_INST_MAX (0x000000FFU)

◆ CSL_CSIRX_ASF_SRAM_FAULT_STATS_ASF_SRAM_FAULT_CORR_STATS_MASK

#define CSL_CSIRX_ASF_SRAM_FAULT_STATS_ASF_SRAM_FAULT_CORR_STATS_MASK (0x0000FFFFU)

◆ CSL_CSIRX_ASF_SRAM_FAULT_STATS_ASF_SRAM_FAULT_CORR_STATS_SHIFT

#define CSL_CSIRX_ASF_SRAM_FAULT_STATS_ASF_SRAM_FAULT_CORR_STATS_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_SRAM_FAULT_STATS_ASF_SRAM_FAULT_CORR_STATS_MAX

#define CSL_CSIRX_ASF_SRAM_FAULT_STATS_ASF_SRAM_FAULT_CORR_STATS_MAX (0x0000FFFFU)

◆ CSL_CSIRX_ASF_SRAM_FAULT_STATS_RESERVED_31_16_MASK

#define CSL_CSIRX_ASF_SRAM_FAULT_STATS_RESERVED_31_16_MASK (0xFFFF0000U)

◆ CSL_CSIRX_ASF_SRAM_FAULT_STATS_RESERVED_31_16_SHIFT

#define CSL_CSIRX_ASF_SRAM_FAULT_STATS_RESERVED_31_16_SHIFT (0x00000010U)

◆ CSL_CSIRX_ASF_SRAM_FAULT_STATS_RESERVED_31_16_MAX

#define CSL_CSIRX_ASF_SRAM_FAULT_STATS_RESERVED_31_16_MAX (0x0000FFFFU)

◆ CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_CTRL_MASK

#define CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_CTRL_MASK (0x0000FFFFU)

◆ CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_CTRL_SHIFT

#define CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_CTRL_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_CTRL_MAX

#define CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_CTRL_MAX (0x0000FFFFU)

◆ CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_EN_MASK

#define CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_EN_MASK (0x80000000U)

◆ CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_EN_SHIFT

#define CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_EN_SHIFT (0x0000001FU)

◆ CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_EN_MAX

#define CSL_CSIRX_ASF_TRANS_TO_CTRL_ASF_TRANS_TO_EN_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_TRANS_TO_FAULT_MASK_ASF_TRANS_TO_FAULT_0_MASK_MASK

#define CSL_CSIRX_ASF_TRANS_TO_FAULT_MASK_ASF_TRANS_TO_FAULT_0_MASK_MASK (0x00000001U)

◆ CSL_CSIRX_ASF_TRANS_TO_FAULT_MASK_ASF_TRANS_TO_FAULT_0_MASK_SHIFT

#define CSL_CSIRX_ASF_TRANS_TO_FAULT_MASK_ASF_TRANS_TO_FAULT_0_MASK_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_TRANS_TO_FAULT_MASK_ASF_TRANS_TO_FAULT_0_MASK_MAX

#define CSL_CSIRX_ASF_TRANS_TO_FAULT_MASK_ASF_TRANS_TO_FAULT_0_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_TRANS_TO_FAULT_STATUS_ASF_TRANS_TO_FAULT_0_STATUS_MASK

#define CSL_CSIRX_ASF_TRANS_TO_FAULT_STATUS_ASF_TRANS_TO_FAULT_0_STATUS_MASK (0x00000001U)

◆ CSL_CSIRX_ASF_TRANS_TO_FAULT_STATUS_ASF_TRANS_TO_FAULT_0_STATUS_SHIFT

#define CSL_CSIRX_ASF_TRANS_TO_FAULT_STATUS_ASF_TRANS_TO_FAULT_0_STATUS_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_TRANS_TO_FAULT_STATUS_ASF_TRANS_TO_FAULT_0_STATUS_MAX

#define CSL_CSIRX_ASF_TRANS_TO_FAULT_STATUS_ASF_TRANS_TO_FAULT_0_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_0_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_0_MASK_MASK (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_0_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_0_MASK_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_0_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_0_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_1_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_1_MASK_MASK (0x00000002U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_1_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_1_MASK_SHIFT (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_1_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_1_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_2_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_2_MASK_MASK (0x00000004U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_2_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_2_MASK_SHIFT (0x00000002U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_2_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_2_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_3_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_3_MASK_MASK (0x00000008U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_3_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_3_MASK_SHIFT (0x00000003U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_3_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_3_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_4_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_4_MASK_MASK (0x00000010U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_4_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_4_MASK_SHIFT (0x00000004U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_4_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_4_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_5_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_5_MASK_MASK (0x00000020U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_5_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_5_MASK_SHIFT (0x00000005U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_5_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_5_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_6_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_6_MASK_MASK (0x00000040U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_6_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_6_MASK_SHIFT (0x00000006U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_6_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_6_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_7_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_7_MASK_MASK (0x00000080U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_7_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_7_MASK_SHIFT (0x00000007U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_7_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_7_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_8_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_8_MASK_MASK (0x00000100U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_8_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_8_MASK_SHIFT (0x00000008U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_8_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_8_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_9_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_9_MASK_MASK (0x00000200U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_9_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_9_MASK_SHIFT (0x00000009U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_9_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_9_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_10_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_10_MASK_MASK (0x00000400U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_10_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_10_MASK_SHIFT (0x0000000AU)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_10_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_10_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_11_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_11_MASK_MASK (0x00000800U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_11_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_11_MASK_SHIFT (0x0000000BU)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_11_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_11_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_12_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_12_MASK_MASK (0x00001000U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_12_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_12_MASK_SHIFT (0x0000000CU)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_12_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_12_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_13_MASK_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_13_MASK_MASK (0x00002000U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_13_MASK_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_13_MASK_SHIFT (0x0000000DU)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_13_MASK_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_MASK_ASF_PROTOCOL_FAULT_13_MASK_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_0_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_0_STATUS_MASK (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_0_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_0_STATUS_SHIFT (0x00000000U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_0_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_0_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_1_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_1_STATUS_MASK (0x00000002U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_1_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_1_STATUS_SHIFT (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_1_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_1_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_2_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_2_STATUS_MASK (0x00000004U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_2_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_2_STATUS_SHIFT (0x00000002U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_2_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_2_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_3_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_3_STATUS_MASK (0x00000008U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_3_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_3_STATUS_SHIFT (0x00000003U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_3_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_3_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_4_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_4_STATUS_MASK (0x00000010U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_4_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_4_STATUS_SHIFT (0x00000004U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_4_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_4_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_5_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_5_STATUS_MASK (0x00000020U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_5_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_5_STATUS_SHIFT (0x00000005U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_5_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_5_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_6_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_6_STATUS_MASK (0x00000040U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_6_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_6_STATUS_SHIFT (0x00000006U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_6_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_6_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_7_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_7_STATUS_MASK (0x00000080U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_7_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_7_STATUS_SHIFT (0x00000007U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_7_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_7_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_8_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_8_STATUS_MASK (0x00000100U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_8_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_8_STATUS_SHIFT (0x00000008U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_8_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_8_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_9_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_9_STATUS_MASK (0x00000200U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_9_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_9_STATUS_SHIFT (0x00000009U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_9_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_9_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_10_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_10_STATUS_MASK (0x00000400U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_10_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_10_STATUS_SHIFT (0x0000000AU)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_10_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_10_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_11_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_11_STATUS_MASK (0x00000800U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_11_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_11_STATUS_SHIFT (0x0000000BU)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_11_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_11_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_12_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_12_STATUS_MASK (0x00001000U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_12_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_12_STATUS_SHIFT (0x0000000CU)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_12_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_12_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_13_STATUS_MASK

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_13_STATUS_MASK (0x00002000U)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_13_STATUS_SHIFT

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_13_STATUS_SHIFT (0x0000000DU)

◆ CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_13_STATUS_MAX

#define CSL_CSIRX_ASF_PROTOCOL_FAULT_STATUS_ASF_PROTOCOL_FAULT_13_STATUS_MAX (0x00000001U)

◆ CSL_CSIRX_ID_PROD_VER_VERSION_ID_MASK

#define CSL_CSIRX_ID_PROD_VER_VERSION_ID_MASK (0x0000FFFFU)

◆ CSL_CSIRX_ID_PROD_VER_VERSION_ID_SHIFT

#define CSL_CSIRX_ID_PROD_VER_VERSION_ID_SHIFT (0x00000000U)

◆ CSL_CSIRX_ID_PROD_VER_VERSION_ID_MAX

#define CSL_CSIRX_ID_PROD_VER_VERSION_ID_MAX (0x0000FFFFU)

◆ CSL_CSIRX_ID_PROD_VER_PRODUCT_ID_MASK

#define CSL_CSIRX_ID_PROD_VER_PRODUCT_ID_MASK (0xFFFF0000U)

◆ CSL_CSIRX_ID_PROD_VER_PRODUCT_ID_SHIFT

#define CSL_CSIRX_ID_PROD_VER_PRODUCT_ID_SHIFT (0x00000010U)

◆ CSL_CSIRX_ID_PROD_VER_PRODUCT_ID_MAX

#define CSL_CSIRX_ID_PROD_VER_PRODUCT_ID_MAX (0x0000FFFFU)

Data Structures

Macros