Introduction

Typedefs
typedef uint32_t	SDL_ECC_MemType
	This enumerator indicate ECC memory type. More...

typedef uint32_t	SDL_ECC_MemSubType
	This enumerator indicate ECC memory Sub Type. More...

typedef void(*	SDL_ECC_ErrorCallback_t) (uint32_t errorSrc, uint32_t address)

typedef void(*	SDL_ECC_VIMDEDVector_t) (void)

Macros
#define	SDL_ECC_MEMTYPE_MCU_R5F0_CORE (0u)
	Select RAM MCU R5F core 0 memory type. More...

#define	SDL_ECC_MEMTYPE_MCU_R5F1_CORE (1u)
	Select RAM MCU R5F core 1 memory type. More...

#define	SDL_ECC_MEMTYPE_MCU_ADC0 (2u)
	Select MCU ADC0 type. More...

#define	SDL_ECC_MEMTYPE_MCU_ADC1 (3u)
	Select MCU ADC1 type. More...

#define	SDL_ECC_MEMTYPE_MCU_CPSW0 (4u)
	Select MCU CPSW0 type. More...

#define	SDL_ECC_MEMTYPE_MCU_FSS0_HPB0 (5u)
	Select MCU Flash Subsystem Hyperbus 0 type. More...

#define	SDL_ECC_MEMTYPE_MCU_FSS0_OSPI0 (6u)
	Select MCU Flash Subsystem Octal Spi0 type. More...

#define	SDL_ECC_MEMTYPE_MCU_FSS0_OSPI1 (7u)
	Select MCU Flash Subsystem Octal Spi0 type. More...

#define	SDL_ECC_MEMTYPE_MCU_MCAN0 (8u)
	Select MCU MCAN0 type. More...

#define	SDL_ECC_MEMTYPE_MCU_MCAN1 (9u)
	Select MCU MCAN1 type. More...

#define	SDL_ECC_MEMTYPE_MCU_MSRAM0 (10u)
	Select MCU MSRAM0 type. More...

#define	SDL_ECC_MEMTYPE_MCU_NAVSS0 (11u)
	Select MCU NAVSS 0 type. More...

#define	SDL_ECC_MEMTYPE_MCU_PDMA0 (12u)
	Select MCU PDMA0 type. More...

#define	SDL_ECC_MEMTYPE_MCU_PDMA1 (13u)
	Select MCU PDMA0 type. More...

#define	SDL_ECC_MEMTYPE_MCU_PSRAM0 (14u)
	Select MCU PSRAM0 type. More...

#define	SDL_ECC_MEMTYPE_MCU_CBASS_ECC_AGGR0 (15u)
	Select MCU CBASS type. More...

#define	SDL_ECC_MEMTYPE_MAIN_MSMC_AGGR0 (16u)
	Select Main MSMC AGGR0 type. More...

#define	SDL_ECC_MEMTYPE_MAIN_MSMC_AGGR1 (17u)
	Select Main MSMC AGGR1 type. More...

#define	SDL_ECC_MEMTYPE_MAIN_MSMC_AGGR2 (18u)
	Select Main MSMC AGGR2 type. More...

#define	SDL_ECC_MEMTYPE_MAIN_A72_AGGR0 (19u)
	Select Main A72 AGGR0 type. More...

#define	SDL_ECC_MEMTYPE_MAX (SDL_ECC_MEMTYPE_MAIN_A72_AGGR0 + 1U)

#define	SDL_ECC_R5F_MEM_SUBTYPE_ITAG_RAM0_VECTOR_ID (0U)
	Select memory subtype ITAG RAM0. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_ITAG_RAM1_VECTOR_ID (1U)
	Select memory subtype ITAG RAM1. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_ITAG_RAM2_VECTOR_ID (2U)
	Select memory subtype ITAG RAM2. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_ITAG_RAM3_VECTOR_ID (3U)
	Select memory subtype ITAG RAM3. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_IDATA_BANK0_VECTOR_ID (4U)
	Select memory subtype IDATA BANK0. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_IDATA_BANK1_VECTOR_ID (5U)
	Select memory subtype IDATA BANK1. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_IDATA_BANK2_VECTOR_ID (6U)
	Select memory subtype IDATA BANK2. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_IDATA_BANK3_VECTOR_ID (7U)
	Select memory subtype IDATA BANK3. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DTAG_RAM0_VECTOR_ID (8U)
	Select memory subtype DTAG RAM0. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DTAG_RAM1_VECTOR_ID (9U)
	Select memory subtype DTAG RAM1. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DTAG_RAM2_VECTOR_ID (10U)
	Select memory subtype DTAG RAM2. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DTAG_RAM3_VECTOR_ID (11U)
	Select memory subtype DTAG RAM3. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DDIRTY_RAM_VECTOR_ID (12U)
	Select memory subtype DDIRTY RAM. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM0_VECTOR_ID (13U)
	Select memory subtype DDATA RAM0. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM1_VECTOR_ID (14U)
	Select memory subtype DDATA RAM1. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM2_VECTOR_ID (15U)
	Select memory subtype DDATA RAM2. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM3_VECTOR_ID (16U)
	Select memory subtype DDATA RAM3. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM4_VECTOR_ID (17U)
	Select memory subtype DDATA RAM4. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM5_VECTOR_ID (18U)
	Select memory subtype DDATA RAM5. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM6_VECTOR_ID (19U)
	Select memory subtype DDATA RAM6. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM7_VECTOR_ID (20U)
	Select memory subtype DDATA RAM7. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK0_VECTOR_ID (21U)
	Select memory subtype ATCM0 BANK0. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK1_VECTOR_ID (22U)
	Select memory subtype ATCM0 BANK1. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_B0TCM0_BANK0_VECTOR_ID (23U)
	Select memory subtype B0TCM0 BANK0. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_B0TCM0_BANK1_VECTOR_ID (24U)
	Select memory subtype B0TCM0 BANK1. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_B1TCM0_BANK0_VECTOR_ID (25U)
	Select memory subtype B1TCM0 BANK0. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_B1TCM0_BANK1_VECTOR_ID (26U)
	Select memory subtype B1TCM0 BANK1. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_KS_VIM_RAM_VECTOR_ID (27U)
	Select memory subtype VIM RAM. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_VBUSM2AXI_EDC_VECTOR_ID (28U)
	Select memory subtype VBUSM2AXI EDC. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_AXI2VBUSM_MEM_MST_WRITE_EDC_VECTOR_ID (29U)
	Select memory subtype AXI2VBUSM MEM MST WRITE EDC. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_AXI2VBUSM_MEM_MST_READ_EDC_VECTOR_ID (30U)
	Select memory subtype AXI2VBUSM MEM MST READ EDC. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_AXI2VBUSM_PERIPH_MST_WRITE_EDC_VECTOR_ID (31U)
	Select memory subtype AXI2VBUSM PERIPH MST WRITE EDC. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_AXI2VBUSM_PERIPH_MST_READ_EDC_VECTOR_ID (32U)
	Select memory subtype AXI2VBUSM PERIPH MST READ EDC. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_AHB2VBUSP_EDC_VECTOR_ID (33U)
	Select memory subtype AHB2VBUSP EDC. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_SCRP_EDC_VECTOR_ID (34U)
	Select memory subtype SCRP EDC. More...

#define	SDL_ECC_R5F_MEM_SUBTYPE_ECC_AGGR_EDC_ID (35U)
	Select memory subtype ECC AGGR EDC. More...

#define	SDL_ECC_MAIN_MSMC_MEM_INTERCONN_SUBTYPE (20) /* SDL_COMPUTE_CLUSTER0_MSMC_ECC_AGGR0_MSMC_MMR_BUSECC_RAM_ID */
	Select memory subtype MSMC MMR BusECC. More...

#define	SDL_ECC_MAIN_MSMC_CACHE_TAG_MEM_INTERCONN_SUBTYPE (85) /SDL_COMPUTE_CLUSTER0_MSMC_ECC_AGGR0_RMW2_CACHE_TAG_PIPE_BUSECC_RAM_ID /
	Select memory subtype MSMC_ECC_AGGR0_RMW2_CACHE_TAG_PIPE_BUSECC. More...

#define	SDL_ECC_MAIN_MSMC_MEM_WRAPPER_SUBTYPE (100) /* SDL_COMPUTE_CLUSTER0_MSMC_ECC_AGGR0_CLEC_SRAM_RAMECC_RAM_ID */
	Select memory subtype MSMC CLEC SRAM ECC. More...

#define	SDL_ECC_MAIN_MSMC_MEM_CLEC_EDC_CTRL_BUSECC_SUBTYPE (107)/* SDL_COMPUTE_CLUSTER0_MSMC_ECC_AGGR0_CLEC_J7ES_CLEC_EDC_CTRL_BUSECC_RAM_ID */
	Select memory subtype MSMC CLEC_EDC_CTRL_BUSECC ECC. More...

#define	SDL_ECC_MCU_CBASS_MEM_SUBTYPE_WR_RAMECC_ID (0U)
	Select memory subtype write ramecc. More...

#define	SDL_ECC_MCU_CBASS_MEM_SUBTYPE_RD_RAMECC_ID (1U)
	Select memory subtype read ramecc. More...

#define	SDL_ECC_MCU_CBASS_MEM_SUBTYPE_EDC_CTRL_ID (2U)
	Select memory subtype edc control. More...

Macro Definition Documentation

◆ SDL_ECC_MEMTYPE_MCU_R5F0_CORE

#define SDL_ECC_MEMTYPE_MCU_R5F0_CORE (0u)

Select RAM MCU R5F core 0 memory type.

◆ SDL_ECC_MEMTYPE_MCU_R5F1_CORE

#define SDL_ECC_MEMTYPE_MCU_R5F1_CORE (1u)

Select RAM MCU R5F core 1 memory type.

◆ SDL_ECC_MEMTYPE_MCU_ADC0

#define SDL_ECC_MEMTYPE_MCU_ADC0 (2u)

Select MCU ADC0 type.

◆ SDL_ECC_MEMTYPE_MCU_ADC1

#define SDL_ECC_MEMTYPE_MCU_ADC1 (3u)

Select MCU ADC1 type.

◆ SDL_ECC_MEMTYPE_MCU_CPSW0

#define SDL_ECC_MEMTYPE_MCU_CPSW0 (4u)

Select MCU CPSW0 type.

◆ SDL_ECC_MEMTYPE_MCU_FSS0_HPB0

#define SDL_ECC_MEMTYPE_MCU_FSS0_HPB0 (5u)

Select MCU Flash Subsystem Hyperbus 0 type.

◆ SDL_ECC_MEMTYPE_MCU_FSS0_OSPI0

#define SDL_ECC_MEMTYPE_MCU_FSS0_OSPI0 (6u)

Select MCU Flash Subsystem Octal Spi0 type.

◆ SDL_ECC_MEMTYPE_MCU_FSS0_OSPI1

#define SDL_ECC_MEMTYPE_MCU_FSS0_OSPI1 (7u)

Select MCU Flash Subsystem Octal Spi0 type.

◆ SDL_ECC_MEMTYPE_MCU_MCAN0

#define SDL_ECC_MEMTYPE_MCU_MCAN0 (8u)

Select MCU MCAN0 type.

◆ SDL_ECC_MEMTYPE_MCU_MCAN1

#define SDL_ECC_MEMTYPE_MCU_MCAN1 (9u)

Select MCU MCAN1 type.

◆ SDL_ECC_MEMTYPE_MCU_MSRAM0

#define SDL_ECC_MEMTYPE_MCU_MSRAM0 (10u)

Select MCU MSRAM0 type.

◆ SDL_ECC_MEMTYPE_MCU_NAVSS0

#define SDL_ECC_MEMTYPE_MCU_NAVSS0 (11u)

Select MCU NAVSS 0 type.

◆ SDL_ECC_MEMTYPE_MCU_PDMA0

#define SDL_ECC_MEMTYPE_MCU_PDMA0 (12u)

Select MCU PDMA0 type.

◆ SDL_ECC_MEMTYPE_MCU_PDMA1

#define SDL_ECC_MEMTYPE_MCU_PDMA1 (13u)

Select MCU PDMA0 type.

◆ SDL_ECC_MEMTYPE_MCU_PSRAM0

#define SDL_ECC_MEMTYPE_MCU_PSRAM0 (14u)

Select MCU PSRAM0 type.

◆ SDL_ECC_MEMTYPE_MCU_CBASS_ECC_AGGR0

#define SDL_ECC_MEMTYPE_MCU_CBASS_ECC_AGGR0 (15u)

Select MCU CBASS type.

◆ SDL_ECC_MEMTYPE_MAIN_MSMC_AGGR0

#define SDL_ECC_MEMTYPE_MAIN_MSMC_AGGR0 (16u)

Select Main MSMC AGGR0 type.

◆ SDL_ECC_MEMTYPE_MAIN_MSMC_AGGR1

#define SDL_ECC_MEMTYPE_MAIN_MSMC_AGGR1 (17u)

Select Main MSMC AGGR1 type.

◆ SDL_ECC_MEMTYPE_MAIN_MSMC_AGGR2

#define SDL_ECC_MEMTYPE_MAIN_MSMC_AGGR2 (18u)

Select Main MSMC AGGR2 type.

◆ SDL_ECC_MEMTYPE_MAIN_A72_AGGR0

#define SDL_ECC_MEMTYPE_MAIN_A72_AGGR0 (19u)

Select Main A72 AGGR0 type.

◆ SDL_ECC_MEMTYPE_MAX

#define SDL_ECC_MEMTYPE_MAX (SDL_ECC_MEMTYPE_MAIN_A72_AGGR0 + 1U)

◆ SDL_ECC_R5F_MEM_SUBTYPE_ITAG_RAM0_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_ITAG_RAM0_VECTOR_ID (0U)

Select memory subtype ITAG RAM0.

◆ SDL_ECC_R5F_MEM_SUBTYPE_ITAG_RAM1_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_ITAG_RAM1_VECTOR_ID (1U)

Select memory subtype ITAG RAM1.

◆ SDL_ECC_R5F_MEM_SUBTYPE_ITAG_RAM2_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_ITAG_RAM2_VECTOR_ID (2U)

Select memory subtype ITAG RAM2.

◆ SDL_ECC_R5F_MEM_SUBTYPE_ITAG_RAM3_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_ITAG_RAM3_VECTOR_ID (3U)

Select memory subtype ITAG RAM3.

◆ SDL_ECC_R5F_MEM_SUBTYPE_IDATA_BANK0_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_IDATA_BANK0_VECTOR_ID (4U)

Select memory subtype IDATA BANK0.

◆ SDL_ECC_R5F_MEM_SUBTYPE_IDATA_BANK1_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_IDATA_BANK1_VECTOR_ID (5U)

Select memory subtype IDATA BANK1.

◆ SDL_ECC_R5F_MEM_SUBTYPE_IDATA_BANK2_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_IDATA_BANK2_VECTOR_ID (6U)

Select memory subtype IDATA BANK2.

◆ SDL_ECC_R5F_MEM_SUBTYPE_IDATA_BANK3_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_IDATA_BANK3_VECTOR_ID (7U)

Select memory subtype IDATA BANK3.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DTAG_RAM0_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DTAG_RAM0_VECTOR_ID (8U)

Select memory subtype DTAG RAM0.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DTAG_RAM1_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DTAG_RAM1_VECTOR_ID (9U)

Select memory subtype DTAG RAM1.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DTAG_RAM2_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DTAG_RAM2_VECTOR_ID (10U)

Select memory subtype DTAG RAM2.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DTAG_RAM3_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DTAG_RAM3_VECTOR_ID (11U)

Select memory subtype DTAG RAM3.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DDIRTY_RAM_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DDIRTY_RAM_VECTOR_ID (12U)

Select memory subtype DDIRTY RAM.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM0_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM0_VECTOR_ID (13U)

Select memory subtype DDATA RAM0.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM1_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM1_VECTOR_ID (14U)

Select memory subtype DDATA RAM1.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM2_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM2_VECTOR_ID (15U)

Select memory subtype DDATA RAM2.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM3_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM3_VECTOR_ID (16U)

Select memory subtype DDATA RAM3.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM4_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM4_VECTOR_ID (17U)

Select memory subtype DDATA RAM4.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM5_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM5_VECTOR_ID (18U)

Select memory subtype DDATA RAM5.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM6_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM6_VECTOR_ID (19U)

Select memory subtype DDATA RAM6.

◆ SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM7_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_DDATA_RAM7_VECTOR_ID (20U)

Select memory subtype DDATA RAM7.

◆ SDL_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK0_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK0_VECTOR_ID (21U)

Select memory subtype ATCM0 BANK0.

◆ SDL_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK1_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK1_VECTOR_ID (22U)

Select memory subtype ATCM0 BANK1.

◆ SDL_ECC_R5F_MEM_SUBTYPE_B0TCM0_BANK0_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_B0TCM0_BANK0_VECTOR_ID (23U)

Select memory subtype B0TCM0 BANK0.

◆ SDL_ECC_R5F_MEM_SUBTYPE_B0TCM0_BANK1_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_B0TCM0_BANK1_VECTOR_ID (24U)

Select memory subtype B0TCM0 BANK1.

◆ SDL_ECC_R5F_MEM_SUBTYPE_B1TCM0_BANK0_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_B1TCM0_BANK0_VECTOR_ID (25U)

Select memory subtype B1TCM0 BANK0.

◆ SDL_ECC_R5F_MEM_SUBTYPE_B1TCM0_BANK1_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_B1TCM0_BANK1_VECTOR_ID (26U)

Select memory subtype B1TCM0 BANK1.

◆ SDL_ECC_R5F_MEM_SUBTYPE_KS_VIM_RAM_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_KS_VIM_RAM_VECTOR_ID (27U)

Select memory subtype VIM RAM.

◆ SDL_ECC_R5F_MEM_SUBTYPE_VBUSM2AXI_EDC_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_VBUSM2AXI_EDC_VECTOR_ID (28U)

Select memory subtype VBUSM2AXI EDC.

◆ SDL_ECC_R5F_MEM_SUBTYPE_AXI2VBUSM_MEM_MST_WRITE_EDC_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_AXI2VBUSM_MEM_MST_WRITE_EDC_VECTOR_ID (29U)

Select memory subtype AXI2VBUSM MEM MST WRITE EDC.

◆ SDL_ECC_R5F_MEM_SUBTYPE_AXI2VBUSM_MEM_MST_READ_EDC_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_AXI2VBUSM_MEM_MST_READ_EDC_VECTOR_ID (30U)

Select memory subtype AXI2VBUSM MEM MST READ EDC.

◆ SDL_ECC_R5F_MEM_SUBTYPE_AXI2VBUSM_PERIPH_MST_WRITE_EDC_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_AXI2VBUSM_PERIPH_MST_WRITE_EDC_VECTOR_ID (31U)

Select memory subtype AXI2VBUSM PERIPH MST WRITE EDC.

◆ SDL_ECC_R5F_MEM_SUBTYPE_AXI2VBUSM_PERIPH_MST_READ_EDC_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_AXI2VBUSM_PERIPH_MST_READ_EDC_VECTOR_ID (32U)

Select memory subtype AXI2VBUSM PERIPH MST READ EDC.

◆ SDL_ECC_R5F_MEM_SUBTYPE_AHB2VBUSP_EDC_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_AHB2VBUSP_EDC_VECTOR_ID (33U)

Select memory subtype AHB2VBUSP EDC.

◆ SDL_ECC_R5F_MEM_SUBTYPE_SCRP_EDC_VECTOR_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_SCRP_EDC_VECTOR_ID (34U)

Select memory subtype SCRP EDC.

◆ SDL_ECC_R5F_MEM_SUBTYPE_ECC_AGGR_EDC_ID

#define SDL_ECC_R5F_MEM_SUBTYPE_ECC_AGGR_EDC_ID (35U)

Select memory subtype ECC AGGR EDC.

◆ SDL_ECC_MAIN_MSMC_MEM_INTERCONN_SUBTYPE

#define SDL_ECC_MAIN_MSMC_MEM_INTERCONN_SUBTYPE (20) /* SDL_COMPUTE_CLUSTER0_MSMC_ECC_AGGR0_MSMC_MMR_BUSECC_RAM_ID */

Select memory subtype MSMC MMR BusECC.

◆ SDL_ECC_MAIN_MSMC_CACHE_TAG_MEM_INTERCONN_SUBTYPE

#define SDL_ECC_MAIN_MSMC_CACHE_TAG_MEM_INTERCONN_SUBTYPE (85) /*SDL_COMPUTE_CLUSTER0_MSMC_ECC_AGGR0_RMW2_CACHE_TAG_PIPE_BUSECC_RAM_ID */

Select memory subtype MSMC_ECC_AGGR0_RMW2_CACHE_TAG_PIPE_BUSECC.

◆ SDL_ECC_MAIN_MSMC_MEM_WRAPPER_SUBTYPE

#define SDL_ECC_MAIN_MSMC_MEM_WRAPPER_SUBTYPE (100) /* SDL_COMPUTE_CLUSTER0_MSMC_ECC_AGGR0_CLEC_SRAM_RAMECC_RAM_ID */

Select memory subtype MSMC CLEC SRAM ECC.

◆ SDL_ECC_MAIN_MSMC_MEM_CLEC_EDC_CTRL_BUSECC_SUBTYPE

#define SDL_ECC_MAIN_MSMC_MEM_CLEC_EDC_CTRL_BUSECC_SUBTYPE (107)/* SDL_COMPUTE_CLUSTER0_MSMC_ECC_AGGR0_CLEC_J7ES_CLEC_EDC_CTRL_BUSECC_RAM_ID */

Select memory subtype MSMC CLEC_EDC_CTRL_BUSECC ECC.

◆ SDL_ECC_MCU_CBASS_MEM_SUBTYPE_WR_RAMECC_ID

#define SDL_ECC_MCU_CBASS_MEM_SUBTYPE_WR_RAMECC_ID (0U)

Select memory subtype write ramecc.

◆ SDL_ECC_MCU_CBASS_MEM_SUBTYPE_RD_RAMECC_ID

#define SDL_ECC_MCU_CBASS_MEM_SUBTYPE_RD_RAMECC_ID (1U)

Select memory subtype read ramecc.

◆ SDL_ECC_MCU_CBASS_MEM_SUBTYPE_EDC_CTRL_ID

#define SDL_ECC_MCU_CBASS_MEM_SUBTYPE_EDC_CTRL_ID (2U)

Select memory subtype edc control.

Typedef Documentation

◆ SDL_ECC_MemType

typedef uint32_t SDL_ECC_MemType

This enumerator indicate ECC memory type.

◆ SDL_ECC_MemSubType

typedef uint32_t SDL_ECC_MemSubType

This enumerator indicate ECC memory Sub Type.

◆ SDL_ECC_ErrorCallback_t

typedef void(* SDL_ECC_ErrorCallback_t) (uint32_t errorSrc, uint32_t address)

/brief Format of ECC error Call back function

◆ SDL_ECC_VIMDEDVector_t

typedef void(* SDL_ECC_VIMDEDVector_t) (void)

/brief Format of VIM DED vector function