PDK API Guide for J721E
CSL_CPSW_CPPI_P0_HOSTBLKSPRI Struct Reference

Detailed Description

Holds CSL_CPSW_CPPI_P0_HOSTBLKSPRI register contents. This is not used for 2 port switch.

Data Fields

Uint32 p0HostBlksPri7
 
Uint32 p0HostBlksPri6
 
Uint32 p0HostBlksPri5
 
Uint32 p0HostBlksPri4
 
Uint32 p0HostBlksPri3
 
Uint32 p0HostBlksPri2
 
Uint32 p0HostBlksPri1
 
Uint32 p0HostBlksPri0
 

Field Documentation

◆ p0HostBlksPri7

Uint32 CSL_CPSW_CPPI_P0_HOSTBLKSPRI::p0HostBlksPri7

Host Blocks Per Priority 7

◆ p0HostBlksPri6

Uint32 CSL_CPSW_CPPI_P0_HOSTBLKSPRI::p0HostBlksPri6

Host Blocks Per Priority 6

◆ p0HostBlksPri5

Uint32 CSL_CPSW_CPPI_P0_HOSTBLKSPRI::p0HostBlksPri5

Host Blocks Per Priority 5

◆ p0HostBlksPri4

Uint32 CSL_CPSW_CPPI_P0_HOSTBLKSPRI::p0HostBlksPri4

Host Blocks Per Priority 4

◆ p0HostBlksPri3

Uint32 CSL_CPSW_CPPI_P0_HOSTBLKSPRI::p0HostBlksPri3

Host Blocks Per Priority 3

◆ p0HostBlksPri2

Uint32 CSL_CPSW_CPPI_P0_HOSTBLKSPRI::p0HostBlksPri2

Host Blocks Per Priority 2

◆ p0HostBlksPri1

Uint32 CSL_CPSW_CPPI_P0_HOSTBLKSPRI::p0HostBlksPri1

Host Blocks Per Priority 1

◆ p0HostBlksPri0

Uint32 CSL_CPSW_CPPI_P0_HOSTBLKSPRI::p0HostBlksPri0

Host Blocks Per Priority 0