PDK API Guide for J721E
pmic.h
Go to the documentation of this file.
1 /******************************************************************************
2  * Copyright (c) 2020 Texas Instruments Incorporated - https://www.ti.com
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  *
8  * Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  *
11  * Redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the
14  * distribution.
15  *
16  * Neither the name of Texas Instruments Incorporated nor the names of
17  * its contributors may be used to endorse or promote products derived
18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  *
32  *****************************************************************************/
33 
68 /* @} */
69 
85 #ifndef PMIC_H_
86 #define PMIC_H_
87 
88 /* ========================================================================= */
89 /* Include Files */
90 /* ========================================================================= */
91 #include <pmic_types.h>
92 #include <pmic_core.h>
93 #include <pmic_gpio.h>
94 #include <pmic_rtc.h>
95 #include <pmic_irq.h>
96 #include <pmic_power.h>
97 #include <pmic_wdg.h>
98 #include <pmic_esm.h>
99 #include <pmic_fsm.h>
100 
101 #ifdef __cplusplus
102 extern "C" {
103 #endif
104 /* ========================================================================= */
105 /* Macros & Typedefs */
106 /* ========================================================================= */
107 
117 #define PMIC_ST_SUCCESS (0)
118 
119 #define PMIC_ST_ERR_INV_HANDLE (-((int32_t)1))
120 
121 #define PMIC_ST_ERR_NULL_PARAM (-((int32_t)2))
122 
123 #define PMIC_ST_ERR_INV_PARAM (-((int32_t)3))
124 
125 #define PMIC_ST_ERR_INV_DEVICE (-((int32_t)4))
126 
127 #define PMIC_ST_ERR_NULL_FPTR (-((int32_t)5))
128 
129 #define PMIC_ST_ERR_INV_SUBSYSTEM (-((int32_t)6))
130 
132 #define PMIC_ST_ERR_INSUFFICIENT_CFG (-((int32_t)7))
133 
134 #define PMIC_ST_ERR_I2C_COMM_FAIL (-((int32_t)8))
135 
136 #define PMIC_ST_ERR_SPI_COMM_FAIL (-((int32_t)9))
137 
138 #define PMIC_ST_ERR_DATA_IO_CRC (-((int32_t)10))
139 
140 #define PMIC_ST_ERR_INTF_SETUP_FAILED (-((int32_t)11))
141 
142 #define PMIC_ST_ERR_COMM_INTF_INIT_FAIL (-((int32_t)12))
143 
145 #define PMIC_ST_ERR_UNINIT (-((int32_t)13))
146 
147 #define PMIC_ST_ERR_INV_VOLTAGE (-((int32_t)14))
148 
149 #define PMIC_ST_ERR_INV_REGULATOR (-((int32_t)15))
150 
151 #define PMIC_ST_ERR_INV_PGOOD_LEVEL (-((int32_t)16))
152 
153 #define PMIC_ST_ERR_INV_TEMP_THRESHOLD (-((int32_t)17))
154 
155 #define PMIC_ST_ERR_INV_GPIO (-((int32_t)18))
156 
157 #define PMIC_ST_ERR_INV_GPIO_FUNC (-((int32_t)19))
158 
159 #define PMIC_ST_ERR_INV_GPIO_LINE_PARAMS (-((int32_t)20))
160 
161 #define PMIC_ST_ERR_PIN_NOT_GPIO (-((int32_t)21))
162 
164 #define PMIC_ST_ERR_INV_WDG_WINDOW (-((int32_t)22))
165 
166 #define PMIC_ST_ERR_INV_WDG_ANSWER (-((int32_t)23))
167 
168 #define PMIC_ST_ERR_WDG_EARLY_ANSWER (-((int32_t)24))
169 
170 #define PMIC_ST_ERR_INV_ESM_TARGET (-((int32_t)25))
171 
172 #define PMIC_ST_ERR_INV_ESM_MODE (-((int32_t)26))
173 
174 #define PMIC_ST_ERR_INV_INT (-((int32_t)27))
175 
176 #define PMIC_ST_ERR_CLEAR_INT_FAILED (-((int32_t)28))
177 
178 #define PMIC_ST_ERR_INV_TIME (-((int32_t)29))
179 
180 #define PMIC_ST_ERR_INV_DATE (-((int32_t)30))
181 
182 #define PMIC_ST_ERR_RTC_STOP_FAIL (-((int32_t)31))
183 
184 #define PMIC_ST_ERR_FAIL (-((int32_t)32))
185 
186 #define PMIC_ST_ERR_ESM_STARTED (-((int32_t)33))
187 
189 #define PMIC_ST_ERR_INV_ESM_VAL (-((int32_t)34))
190 
191 #define PMIC_ST_WARN_INV_DEVICE_ID (-((int32_t)35))
192 
194 #define PMIC_ST_ERR_INV_EN_DRV_PIN_CFG (-((int32_t)36))
195 
197 #define PMIC_ST_ERR_INV_COMM_MODE (-((int32_t)37))
198 
199 #define PMIC_ST_ERR_CRC_STATUS_FAIL (-((int32_t)38))
200 
201 #define PMIC_ST_ERR_REG_LOCKED_WR_FAIL (-((int32_t)39))
202 
204 #define PMIC_ST_ERR_NOT_SUPPORTED (-((int32_t)40))
205 /* @} */
206 
213 #define PMIC_DEV_LEO_TPS6594X (0U)
214 #define PMIC_DEV_HERA_LP8764X (1U)
215 /* @} */
216 
223 #define PMIC_INTF_SINGLE_I2C (0U)
224 #define PMIC_INTF_DUAL_I2C (1U)
225 #define PMIC_INTF_SPI (2U)
226 /* @} */
227 
238 #define PMIC_I2C_STANDARD_MODE (0U)
239 
240 #define PMIC_I2C_FORCED_HS_MODE (1U)
241 /* @} */
242 
249 #define PMIC_MAIN_INST (1U << 0U)
250 #define PMIC_QA_INST (1U << 1U)
251 
254 #define PMIC_NVM_INST (1U << 2U)
255 /* @} */
256 
265 #define PMIC_CFG_DEVICE_TYPE_VALID (0U)
266 
268 #define PMIC_CFG_COMM_MODE_VALID (1U)
269 
271 #define PMIC_CFG_SLAVEADDR_VALID (2U)
272 
274 #define PMIC_CFG_QASLAVEADDR_VALID (3U)
275 
277 #define PMIC_CFG_NVMSLAVEADDR_VALID (4U)
278 
280 #define PMIC_CFG_COMM_HANDLE_VALID (5U)
281 
283 #define PMIC_CFG_QACOMM_HANDLE_VALID (6U)
284 
286 #define PMIC_CFG_COMM_IO_RD_VALID (7U)
287 
289 #define PMIC_CFG_COMM_IO_WR_VALID (8U)
290 
292 #define PMIC_CFG_CRITSEC_START_VALID (9U)
293 
295 #define PMIC_CFG_CRITSEC_STOP_VALID (10U)
296 
298 #define PMIC_CFG_I2C1_SPEED_VALID (11U)
299 
301 #define PMIC_CFG_I2C2_SPEED_VALID (12U)
302 /* @} */
303 
313 #define PMIC_CFG_DEVICE_TYPE_VALID_SHIFT (1U << PMIC_CFG_DEVICE_TYPE_VALID)
314 #define PMIC_CFG_COMM_MODE_VALID_SHIFT (1U << PMIC_CFG_COMM_MODE_VALID)
315 #define PMIC_CFG_SLAVEADDR_VALID_SHIFT (1U << PMIC_CFG_SLAVEADDR_VALID)
316 #define PMIC_CFG_QASLAVEADDR_VALID_SHIFT (1U << PMIC_CFG_QASLAVEADDR_VALID)
317 #define PMIC_CFG_NVMSLAVEADDR_VALID_SHIFT (1U << PMIC_CFG_NVMSLAVEADDR_VALID)
318 #define PMIC_CFG_COMM_HANDLE_VALID_SHIFT (1U << PMIC_CFG_COMM_HANDLE_VALID)
319 #define PMIC_CFG_QACOMM_HANDLE_VALID_SHIFT (1U << PMIC_CFG_QACOMM_HANDLE_VALID)
320 #define PMIC_CFG_COMM_IO_RD_VALID_SHIFT (1U << PMIC_CFG_COMM_IO_RD_VALID)
321 #define PMIC_CFG_COMM_IO_WR_VALID_SHIFT (1U << PMIC_CFG_COMM_IO_WR_VALID)
322 #define PMIC_CFG_CRITSEC_START_VALID_SHIFT (1U << PMIC_CFG_CRITSEC_START_VALID)
323 #define PMIC_CFG_CRITSEC_STOP_VALID_SHIFT (1U << PMIC_CFG_CRITSEC_STOP_VALID)
324 #define PMIC_CFG_I2C1_SPEED_VALID_SHIFT (1U << PMIC_CFG_I2C1_SPEED_VALID)
325 #define PMIC_CFG_I2C2_SPEED_VALID_SHIFT (1U << PMIC_CFG_I2C2_SPEED_VALID)
326 /* @} */
327 
328 /*==========================================================================*/
329 /* Structures and Enums */
330 /*==========================================================================*/
420 typedef struct Pmic_CoreCfg_s {
421  uint32_t validParams;
422  uint32_t instType;
423  uint8_t pmicDeviceType;
424  uint8_t commMode;
425  uint8_t slaveAddr;
426  uint8_t qaSlaveAddr;
427  uint8_t nvmSlaveAddr;
428  uint8_t i2c1Speed;
429  uint8_t i2c2Speed;
430  void *pCommHandle;
432  int32_t (*pFnPmicCommIoRead)(struct Pmic_CoreHandle_s *pmicCorehandle,
433  uint8_t instType,
434  uint16_t regAddr,
435  uint8_t *pRxBuf,
436  uint8_t bufLen);
437  int32_t (*pFnPmicCommIoWrite)(struct Pmic_CoreHandle_s *pmicCorehandle,
438  uint8_t instType,
439  uint16_t regAddr,
440  uint8_t *pTxBuf,
441  uint8_t bufLen);
442  void (*pFnPmicCritSecStart)(void);
443  void (*pFnPmicCritSecStop)(void);
445 
446 /*==========================================================================*/
447 /* Function Declarations */
448 /*==========================================================================*/
480 int32_t Pmic_init(const Pmic_CoreCfg_t *pPmicConfigData,
481  Pmic_CoreHandle_t *pPmicCoreHandle);
482 
499 int32_t Pmic_deinit(Pmic_CoreHandle_t *pPmicCoreHandle);
500 
501 #ifdef __cplusplus
502 }
503 
504 #endif /* __cplusplus */
505 
506 #endif /* PMIC_H_ */
507 
508 /* @} */
void * pQACommHandle
Definition: pmic.h:431
uint8_t qaSlaveAddr
Definition: pmic.h:426
uint32_t instType
Definition: pmic.h:422
PMIC Low Level Driver API/interface file for ESM API.
int32_t Pmic_deinit(Pmic_CoreHandle_t *pPmicCoreHandle)
API to DeInitilizes an existing PMIC Instance.
uint8_t slaveAddr
Definition: pmic.h:425
PMIC Driver Common data types file.
uint32_t validParams
Definition: pmic.h:421
PMIC Low Level Driver API/interface file for WatchDog APIs.
uint8_t nvmSlaveAddr
Definition: pmic.h:427
PMIC Low Level Driver API/interface file for GPIO API.
void * pCommHandle
Definition: pmic.h:430
uint8_t i2c2Speed
Definition: pmic.h:429
PMIC Interface Handle. Contains various PMIC driver instance specific information....
Definition: pmic_types.h:148
uint8_t pmicDeviceType
Definition: pmic.h:423
uint8_t commMode
Definition: pmic.h:424
PMIC Low Level Driver API/interface file for FSM API.
PMIC Driver Common API/interface file.
int32_t Pmic_init(const Pmic_CoreCfg_t *pPmicConfigData, Pmic_CoreHandle_t *pPmicCoreHandle)
API to Initialize pmic core handle for PMIC LLD.
PMIC configuration structure. Contains various parameters which are needed to prepare PMIC driver han...
Definition: pmic.h:420
uint8_t i2c1Speed
Definition: pmic.h:428
PMIC Driver RTC API/interface file.
PMIC Power Resources Driver Interface file.
PMIC IRQ Driver API/interface file.