Detailed Description

Structure containing parameters for ADC MCAL channel configuration. In term of ADC hardware, this represents the step configuration. There are ADC_NUM_CHANNEL steps in the ADC hardware and each step could be mapped to an actual hardware input channel.

Data Fields
uint32	hwChannelId

uint32	openDelay

uint32	sampleDelay

uint32	rangeCheckEnable

Adc_AveragingMode	averagingMode

Field Documentation

◆ hwChannelId

uint32 Adc_ChannelConfigType::hwChannelId

The hardware channel number from which input is given. Valid values: ADC_MIN_HW_CHANNEL_ID to ADC_MAX_HW_CHANNEL_ID 0x0 = Channel 1 0x1 = Channel 2 0x2 = Channel 3 0x3 = Channel 4 0x4 = Channel 5 0x5 = Channel 6 0x6 = Channel 7 0x7 = Channel 8 0x8 = VREFP 0x9 = VREFN

◆ openDelay

uint32 Adc_ChannelConfigType::openDelay

Number of ADC clock cycles to wait after applying the step configuration registers and before sending the start of ADC conversion. Valid values: ADC_MIN_OPEN_DELAY to ADC_MAX_OPEN_DELAY

◆ sampleDelay

uint32 Adc_ChannelConfigType::sampleDelay

Number of ADC clock cycles to hold SOC high. The actual delay is +1 of this value. Valid values: ADC_MIN_SAMPLE_DELAY to ADC_MAX_SAMPLE_DELAY

◆ rangeCheckEnable

uint32 Adc_ChannelConfigType::rangeCheckEnable

Option to enable range check per channel. Enabled if it is TRUE Disabled if it is FALSE

Note: Since there are no standard MCAL API for this feature, this is not supported by the ADC driver. So set this to FALSE

◆ averagingMode

Adc_AveragingMode Adc_ChannelConfigType::averagingMode

Option for averaging the sampled data. Refer enum Adc_AveragingMode