MCUSW
Execute In Place (XIP) Application

Introduction

In situations where the internal RAM provided in device is not sufficient enough to store the applications, the application could reside in on-board memory and still be able to execute (XIP). With this mechanisim, the memory required to host an application is only limited by the on-board memory included.

This application demonstrates execute-in-place, where in CAN Profiling Application is executed from OSPI memory. i.e. The secondary boot loader, will not fetch the CAN Profiling Application from on-board Flash to RAM. Instead execute it from the on-board memory.

The section provides measured performance when operating in XIP versus executing application from internal RAM of the device

Table below list SoC/Cores on which this demo application is tested

SoC Host Core Comments
J721E MCU 1 0 MCAL could be hosted on other cores but this demo application runs only on MCU 1 0, at this point of time.
J7200 MCU 1 0 MCAL could be hosted on other cores but this demo application runs only on MCU 1 0, at this point of time.

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Flow Chart

demo_can_profile_flowchart.png
CAN Profiling Application

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Compile Time Configurations

  1. APP_NUM_MSG_PER_ITERATION Controls the number of messages that would be sent per iteration
  2. APP_NUM_ITERATION Number of iterations, total can messages sent would be APP_NUM_MSG_PER_ITERATION * APP_NUM_ITERATION
  3. APP_INSTANCE_1_INST_IN_CFG_ONLY Use first instance of CAN peripheral configured
  4. CAN_TX_ONLY_MODE Used to configure in CAN in tx only mode

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Customizing Examples Application

The profiling application is configured to operate in loop-back mode by default. This application can be configured to operate in transmit-only, receive-only or loopback mode.

The below table lists the configuration changes required to change mode. Please ensure to recompile post modifications.

TX Only

For TX Only Flag Value Location
APP_INSTANCE_1_INST_IN_CFG_ONLY STD_ON mcusw\mcuss_demos\profiling\can\can_profile.h
CAN_LOOPBACK_ENABLE STD_OFF mcusw\mcuss_demos\mcal_config\Can_Demo_Cfg\output\generated\soc\j72xx\mcu1_0\include\Can_Cfg.h
CAN_TX_ONLY_MODE STD_ON mcusw\mcuss_demos\profiling\can\can_profile.h

This application would transmit CAN FD messages with extended ID (0xC0) at nominal-rate of 1 Mbps, data-rate at 5 Mbps

RX Only

For RX Only Flag Value Location
APP_INSTANCE_1_INST_IN_CFG_ONLY STD_ON mcusw\mcuss_demos\profiling\can\can_profile.h
CAN_LOOPBACK_ENABLE STD_OFF mcusw\mcuss_demos\mcal_config\Can_Demo_Cfg\output\generated\soc\j72xx\mcu1_0\include\Can_Cfg.h
CAN_TX_ONLY_MODE STD_OFF mcusw\mcuss_demos\profiling\can\can_profile.h

This application setup to receive CAN FD messages with extended ID (0xC0) at nominal-rate of 1 Mbps, data-rate at 5 Mbps

Loopback (default)

For Internal Loopback (default) Flag Value Location
APP_INSTANCE_1_INST_IN_CFG_ONLY STD_OFF mcusw\mcuss_demos\profiling\can\can_profile.h
CAN_LOOPBACK_ENABLE STD_ON mcusw\mcuss_demos\mcal_config\Can_Demo_Cfg\output\generated\soc\j72xx\mcu1_0\include\Can_Cfg.h
CAN_TX_ONLY_MODE X mcusw\mcuss_demos\profiling\can\can_profile.h

No additional connections / setup is required in this mode

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Test Setup / Configurations used

Loopback mode

  1. Supported EVM / SoC
    Can_Profiling_CanLoopbackMode.png
    Loopback Setup

    TX Only mode

  1. CAN_HIGH of all the nodes on the bus shall be connected together. Similary CAN_LOW of all the nodes on the bus shall be connected together.
    Can_Profiling_CanTxOnlySetup.png
    DRA80X TxOnly Setup
    canbootapp_j721e_can_tx_setup_closeup.png
    J721E TxOnly Setup

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Steps to build

We need to have the following binaries built from pdk:

  • sbl_cust_img that loads SYSFW, initializes the OSPI flash in execute-in-place (XIP) mode
  • sbl_boot_xip_entry that provides the entry point to the binary which executes from OSPI

Building sbl_cust_img

Go to (SDK Install Directory)/pdk_jacinto_07.x.x/packages/ti/build and run the following: 

make sbl_cust_img

Building sbl_boot_xip_entry

Go to (SDK Install Directory)/pdk_jacinto_07.x.x/packages/ti/build and run the following: 

make sbl_boot_xip_entry

Building can_profile_xip_app

Go to (SDK Install Directory)/mcusw/build and run the following: 

make can_profile_xip_app BUILD_OS_TYPE=tirtos

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Steps to flash

Install uniflash 6.0 from https://www.ti.com/tool/UNIFLASH

For using OSPI the SW3 switch setting should be : 0XXX_XXXX_XX

Specific SW setting for different boot modes-

Mode Switch Settings
UART SW8: 0000_0000, SW9: 0111_0000
OSPI (J721E) SW8: 0000_0000, SW9: 0100_0000
OSPI (J7200) SW8: 1000_0010, SW9: 0011_0000
  • Change the boot mode to UART boot mode.
  • Connect to the second instance of UART (/dev/ttyUSB1 in linux, COMxx in Windows) and power on. One should see 'CCC...' being printed on the console. Once validated, note down the instance number and close the instance of the UART (the UART device needs to be free to transfer data)
  • Navigate to the uniflash installed directory, dslite.sh should be present here.

  • Run the following commands to flash

    1. UART SBL and sysfw : ./dslite.sh –mode processors -c /dev/ttyUSB1 -f (Path to Uniflash Install Directory)/processors/FlashWriter/j72xx_evm/uart_j72xx_evm_flash_programmer_release.tiimage -i 0
    2. CUST SBL : ./dslite.sh –mode processors -c /dev/ttyUSB1 -f (SDK Install Directory)/pdk_jacinto_07.x.x/packages/ti/boot/sbl/binary/j72xx_evm/cust/bin/sbl_cust_img_mcu1_0_release.tiimage -d 3 -o 0
    3. tifs.bin : ./dslite.sh –mode processors -c /dev/ttyUSB1 -f (SDK Install Directory)/pdk_jacinto_07.x.x/packages/ti/drv/sciclient/soc/Vx/tifs.bin -d 3 -o 80000
    4. sbl_boot_xip_entry : ./dslite.sh –mode processors -c /dev/ttyUSB1 -f (SDK Install Directory)/pdk_jacinto_07.x.x/packages/ti/boot/sbl/example/k3MulticoreApp/binary/j72xx/sbl_baremetal_boot_xip_entry_j72xx_evm_mcu1_0TestApp_release.appimage -d 3 -o 100000
    5. Can Profile XIP App : ./dslite.sh –mode processors -c /dev/ttyUSB1 -f (SDK Install Directory)/mcusw/binary/can_profile_xip_app/bin/j72xx_evm/can_profile_xip_app_mcu1_0_release.xer5f.bin -d 3 -o 1C0000
    6. OSPI Phy Tuning Bin : ./dslite.sh –mode processors -c /dev/ttyUSB1 -f (SDK Install Directory)/pdk/packages/ti/board/src/flash/nor/ospi/nor_spi_patterns.bin -d 3 -o 3FC0000

    Power off the board and change the bootmode to OSPI. Connect to second instance of UART and Power on the board. You should see the logs on the MCU uart console

    Note : In Windows, dslite.bat needs to be used instead of dslite.sh and during flashing if you get any error "Unknown response from the target", please disconnect UART cable and connect once again then try to flash. Note : In case of J7200 flash OSPI Phy Tuning bin file at location 3FC0000 and for J721E at 3FE0000.

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BIOS Care abouts to run on XIP mode

Cache needs to be always ON and following BIOS setting change should be added in sysbios cfg file.

var Cache = xdc.useModule('ti.sysbios.family.arm.v7r.Cache');

Cache.skipEarlyCacheStartup = true;

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Document Revision History

Revision Date Author Description Status
0.1 03 Feb 2020 Sujith S Initial Version Under Review
0.2 06 Feb 2020 Sunil M S Updated Logs and Performance Nos Approved
0.3 17 Feb 2020 Sujith S Re Organized, user guide Approved
0.4 02 Nov 2020 Nikki S J7200 updated Approved