Introduction

Data Structures
struct	CSL_CPGMAC_SL_VERSION
	Holds the Sliver submodule's version info. More...

struct	CSL_CPGMAC_SL_MACSTATUS
	Holds MAC status register contents. More...

Macros
#define	CSL_CPGMAC_SL_MACCONTROL_FULLDUPLEX_EN (1 << 0u)
	MAC control register configuration definitions. More...

#define	CSL_CPGMAC_SL_MACCONTROL_LOOPBACK_EN (1 << 1u)

#define	CSL_CPGMAC_SL_MACCONTROL_RX_FLOW_EN (1 << 3u)

#define	CSL_CPGMAC_SL_MACCONTROL_TX_FLOW_EN (1 << 4u)

#define	CSL_CPGMAC_SL_MACCONTROL_GMII_EN (1 << 5u)

#define	CSL_CPGMAC_SL_MACCONTROL_TX_PACE_EN (1 << 6u)

#define	CSL_CPGMAC_SL_MACCONTROL_GIG_EN (1 << 7u)

#define	CSL_CPGMAC_SL_MACCONTROL_TX_SHORT_GAP_EN (1 << 10u)

#define	CSL_CPGMAC_SL_MACCONTROL_CMD_IDLE_EN (1 << 11u)

#define	CSL_CPGMAC_SL_MACCONTROL_CASTAGNOLI_CRC (1 << 12u)

#define	CSL_CPGMAC_SL_MACCONTROL_IFCTL_A_EN (1 << 15u)

#define	CSL_CPGMAC_SL_MACCONTROL_IFCTL_B_EN (1 << 16u)

#define	CSL_CPGMAC_SL_MACCONTROL_GIG_FORCE_EN (1 << 17u)

#define	CSL_CPGMAC_SL_MACCONTROL_EXT_EN (1 << 18u)

#define	CSL_CPGMAC_SL_MACCONTROL_EXT_EN_RX_FLOW (1 << 19u)

#define	CSL_CPGMAC_SL_MACCONTROL_EXT_EN_TX_FLOW (1 << 20u)

#define	CSL_CPGMAC_SL_MACCONTROL_RX_CEF_EN (1 << 22u)

#define	CSL_CPGMAC_SL_MACCONTROL_RX_CSF_EN (1 << 23u)

#define	CSL_CPGMAC_SL_MACCONTROL_RX_CMF_EN (1 << 24u)

Macro Definition Documentation

#define CSL_CPGMAC_SL_MACCONTROL_FULLDUPLEX_EN (1 << 0u)

MAC control register configuration definitions.

Constants for passing parameters to the functions.Enable full duplex mode

#define CSL_CPGMAC_SL_MACCONTROL_LOOPBACK_EN (1 << 1u)

Enable loopback mode

#define CSL_CPGMAC_SL_MACCONTROL_RX_FLOW_EN (1 << 3u)

Enable Rx flow control mode

#define CSL_CPGMAC_SL_MACCONTROL_TX_FLOW_EN (1 << 4u)

Enable Tx flow control mode

#define CSL_CPGMAC_SL_MACCONTROL_GMII_EN (1 << 5u)

Enable GMII

#define CSL_CPGMAC_SL_MACCONTROL_TX_PACE_EN (1 << 6u)

Enable Tx pacing

#define CSL_CPGMAC_SL_MACCONTROL_GIG_EN (1 << 7u)

Enable Gigabit mode

#define CSL_CPGMAC_SL_MACCONTROL_TX_SHORT_GAP_EN (1 << 10u)

Enable Tx short gap

#define CSL_CPGMAC_SL_MACCONTROL_CMD_IDLE_EN (1 << 11u)

Enable idle mode

#define CSL_CPGMAC_SL_MACCONTROL_CASTAGNOLI_CRC (1 << 12u)

Enable idle mode

#define CSL_CPGMAC_SL_MACCONTROL_IFCTL_A_EN (1 << 15u)

Set IFCTL_A bit to 1

#define CSL_CPGMAC_SL_MACCONTROL_IFCTL_B_EN (1 << 16u)

Set IFCTL_B bit to 1

#define CSL_CPGMAC_SL_MACCONTROL_GIG_FORCE_EN (1 << 17u)

Enable forced Gigabit mode

#define CSL_CPGMAC_SL_MACCONTROL_EXT_EN (1 << 18u)

Enable external control mode

#define CSL_CPGMAC_SL_MACCONTROL_EXT_EN_RX_FLOW (1 << 19u)

Enable external receive flow control mode

#define CSL_CPGMAC_SL_MACCONTROL_EXT_EN_TX_FLOW (1 << 20u)

Enable external transmit flow control mode

#define CSL_CPGMAC_SL_MACCONTROL_RX_CEF_EN (1 << 22u)

Enable Rx copy error frames mode

#define CSL_CPGMAC_SL_MACCONTROL_RX_CSF_EN (1 << 23u)

Enable Rx copy short frames mode

#define CSL_CPGMAC_SL_MACCONTROL_RX_CMF_EN (1 << 24u)

Enable Rx copy MAC control frames mode