PDK API Guide for J721E
CPSW Management Data I/O (MDIO) API

Introduction

Data Structures

struct  CpswMdio_PhyStatus
 MDIO PHY status. More...
 
struct  CpswMdio_Clause22ReadRegInArgs
 Input args for CPSW_MDIO_IOCTL_CLAUSE22_READ_REG command. More...
 
struct  CpswMdio_Clause45ReadRegInArgs
 Input args for CPSW_MDIO_IOCTL_CLAUSE45_READ_REG command. More...
 
struct  CpswMdio_Clause22WriteRegInArgs
 Input args for CPSW_MDIO_IOCTL_CLAUSE22_WRITE_REG command. More...
 
struct  CpswMdio_Clause45WriteRegInArgs
 Input args for CPSW_MDIO_IOCTL_CLAUSE45_WRITE_REG command. More...
 
struct  CpswMdio_Version
 MDIO hardware version. More...
 
struct  CpswMdio_Config
 MDIO module configuration. More...
 

Typedefs

typedef struct CpswMdio_Obj_s * CpswMdio_Handle
 MDIO submodule handle. More...
 

Enumerations

enum  CpswMdio_Ioctl_e {
  CPSW_MDIO_IOCTL_GET_VERSION = CPSW_MDIO_PUBLIC_IOCTL(0U), CPSW_MDIO_IOCTL_GET_ALIVE_STATUS = CPSW_MDIO_PUBLIC_IOCTL(1U), CPSW_MDIO_IOCTL_GET_LINK_STATUS = CPSW_MDIO_PUBLIC_IOCTL(2U), CPSW_MDIO_IOCTL_CLAUSE22_READ_REG = CPSW_MDIO_PUBLIC_IOCTL(3U),
  CPSW_MDIO_IOCTL_CLAUSE22_WRITE_REG = CPSW_MDIO_PUBLIC_IOCTL(4U), CPSW_MDIO_IOCTL_CLAUSE45_READ_REG = CPSW_MDIO_PUBLIC_IOCTL(5U), CPSW_MDIO_IOCTL_CLAUSE45_WRITE_REG = CPSW_MDIO_PUBLIC_IOCTL(6U), CPSW_MDIO_IOCTL_CLAUSE22_READ_REG_ASYNC = CPSW_MDIO_PUBLIC_IOCTL(7U),
  CPSW_MDIO_IOCTL_CLAUSE22_WRITE_REG_ASYNC = CPSW_MDIO_PUBLIC_IOCTL(8U), CPSW_MDIO_IOCTL_CLAUSE45_READ_REG_ASYNC = CPSW_MDIO_PUBLIC_IOCTL(9U), CPSW_MDIO_IOCTL_CLAUSE45_WRITE_REG_ASYNC = CPSW_MDIO_PUBLIC_IOCTL(10U), CPSW_MDIO_IOCTL_GET_POLL_ENABLE_MASK = CPSW_MDIO_PUBLIC_IOCTL(11U),
  CPSW_MDIO_IOCTL_PRINT_REGS = CPSW_MDIO_PUBLIC_IOCTL(12U)
}
 MDIO IOCTL commands. More...
 
enum  CpswMdio_OperatingMode { CPSW_MDIO_MODE_NORMAL = 0U, CPSW_MDIO_MODE_STATE_CHANGE = 1U, CPSW_MDIO_MODE_MANUAL = 2U }
 MDIO operating mode. More...
 
enum  CpswMdio_UserChannel { CPSW_MDIO_USER_CHANNEL_0 = 0U, CPSW_MDIO_USER_CHANNEL_1 = 1U, CPSW_MDIO_USER_CHANNEL_LAST = CPSW_MDIO_USER_CHANNEL_1 }
 MDIO user channels (also known as user groups) More...
 
enum  CpswMdio_FrameFormat { CPSW_MDIO_FRAME_FORMAT_CLAUSE22 = 0U, CPSW_MDIO_FRAME_FORMAT_CLAUSE45 = 1U }
 Frame format. More...
 
enum  CpswMdio_Clause45Mmd {
  CPSW_MDIO_MMD_PMA_PMD = 1U, CPSW_MDIO_MMD_WIS = 2U, CPSW_MDIO_MMD_PCS = 3U, CPSW_MDIO_MMD_PHY_XS = 4U,
  CPSW_MDIO_MMD_DTE_XS = 5U, CPSW_MDIO_MMD_VENDOR_1 = 30U, CPSW_MDIO_MMD_VENDOR_2 = 31U
}
 Clause-45 MDIO Manageable Device (MMD) addresses. More...
 

Macros

#define CPSW_MDIO_PUBLIC_IOCTL(x)   (CPSW_IOCTL_MDIO_BASE | CPSW_IOCTL_MIN(x))
 Helper macro to create IOCTL commands for MDIO submodule. More...
 
#define CPSW_MDIO_PHY_ADDR_MASK(addr)   (1U << (addr))
 Create a MDIO PHY mask from a PHY address. More...
 
#define CPSW_MDIO_IS_PHY_ADDR_SET(mask, addr)   (((mask) & (1U << (addr))) != 0U)
 Check if the corresponding PHY address mask is set. More...
 
#define CPSW_MDIO_PHY_ADDR_MASK_NONE   (0x00000000U)
 MDIO PHY address mask for no PHYs present. More...
 
#define CPSW_MDIO_PHY_ADDR_MASK_ALL   (0xFFFFFFFFU)
 MDIO PHY address mask for all PHYs present. More...
 
#define CPSW_MDIO_MAX_PHY_CNT   (31U)
 Maximum number of PHYs supported on MDIO bus. More...
 

Macro Definition Documentation

#define CPSW_MDIO_PUBLIC_IOCTL (   x)    (CPSW_IOCTL_MDIO_BASE | CPSW_IOCTL_MIN(x))

Helper macro to create IOCTL commands for MDIO submodule.

#define CPSW_MDIO_PHY_ADDR_MASK (   addr)    (1U << (addr))

Create a MDIO PHY mask from a PHY address.

#define CPSW_MDIO_IS_PHY_ADDR_SET (   mask,
  addr 
)    (((mask) & (1U << (addr))) != 0U)

Check if the corresponding PHY address mask is set.

#define CPSW_MDIO_PHY_ADDR_MASK_NONE   (0x00000000U)

MDIO PHY address mask for no PHYs present.

#define CPSW_MDIO_PHY_ADDR_MASK_ALL   (0xFFFFFFFFU)

MDIO PHY address mask for all PHYs present.

#define CPSW_MDIO_MAX_PHY_CNT   (31U)

Maximum number of PHYs supported on MDIO bus.

Typedef Documentation

typedef struct CpswMdio_Obj_s* CpswMdio_Handle

MDIO submodule handle.

MDIO submodule opaque handle used to call any MDIO related APIs.

Enumeration Type Documentation

MDIO IOCTL commands.

Enumerator
CPSW_MDIO_IOCTL_GET_VERSION 

Get the hardware version of the MDIO submodule.

IOCTL parameters:

CPSW_MDIO_IOCTL_GET_ALIVE_STATUS 

Get PHY alive status.

IOCTL parameters:

  • inArgs: uint8_t
  • outArgs: bool
CPSW_MDIO_IOCTL_GET_LINK_STATUS 

Get PHY link status.

IOCTL parameters:

  • inArgs: uint8_t
  • outArgs: bool
CPSW_MDIO_IOCTL_CLAUSE22_READ_REG 

Read a PHY register using clause-22 frame.

IOCTL parameters:

CPSW_MDIO_IOCTL_CLAUSE22_WRITE_REG 

Write a PHY register using clause-22 frame.

IOCTL parameters:

CPSW_MDIO_IOCTL_CLAUSE45_READ_REG 

Read a PHY register using clause-45 frame.

IOCTL parameters:

CPSW_MDIO_IOCTL_CLAUSE45_WRITE_REG 

Write a PHY register using clause-45 frame.

IOCTL parameters:

CPSW_MDIO_IOCTL_CLAUSE22_READ_REG_ASYNC 

Read a PHY register asynchronously using clause-22 frame.

Reads a PHY register asynchronously using a clause-22 frame. The completion event is reported via CpswMdio_UserAccessCallback passed to the MDIO submodule at open time.

IOCTL parameters:

CPSW_MDIO_IOCTL_CLAUSE22_WRITE_REG_ASYNC 

Write a PHY register asynchronously using clause-22 frame.

Writes a PHY register asynchronously using a clause-22 frame. The completion event is reported via CpswMdio_UserAccessCallback passed to the MDIO submodule at open time.

IOCTL parameters:

CPSW_MDIO_IOCTL_CLAUSE45_READ_REG_ASYNC 

Read a PHY register asynchronously using clause-45 frame.

Reads a PHY register asynchronously using a clause-45 frame. The completion event is reported via CpswMdio_UserAccessCallback passed to the MDIO submodule at open time.

IOCTL parameters:

CPSW_MDIO_IOCTL_CLAUSE45_WRITE_REG_ASYNC 

Write a PHY register asynchronously using clause-45 frame.

Writes a PHY register asynchronously using a clause-45 frame. The completion event is reported via CpswMdio_UserAccessCallback passed to the MDIO submodule at open time.

IOCTL parameters:

CPSW_MDIO_IOCTL_GET_POLL_ENABLE_MASK 

Get link state change poll enable mask.

Gets a mask of PHY addresses whose state change is being monitored by MDIO (either in Normal Mode or State Change Mode).

IOCTL parameters:

  • inArgs: None
  • outArgs: uint32_t
CPSW_MDIO_IOCTL_PRINT_REGS 

Print MDIO registers.

IOCTL parameters:

  • inArgs: None
  • outArgs: None

MDIO operating mode.

Enumerator
CPSW_MDIO_MODE_NORMAL 

Normal mode (used to monitor up to 2 PHY devices)

CPSW_MDIO_MODE_STATE_CHANGE 

State change mode (used to detect changes on any PHY device)

CPSW_MDIO_MODE_MANUAL 

Manual mode (slow GPIO, not used for MDIO PHY operations)

MDIO user channels (also known as user groups)

Enumerator
CPSW_MDIO_USER_CHANNEL_0 

User channel (user group) 0

CPSW_MDIO_USER_CHANNEL_1 

User channel (user group) 1

CPSW_MDIO_USER_CHANNEL_LAST 

Last user chanenl

Frame format.

Enumerator
CPSW_MDIO_FRAME_FORMAT_CLAUSE22 

Clause 22 frame format

CPSW_MDIO_FRAME_FORMAT_CLAUSE45 

Clause 45 frame format

Clause-45 MDIO Manageable Device (MMD) addresses.

Enumerator
CPSW_MDIO_MMD_PMA_PMD 

PMA/PMD

CPSW_MDIO_MMD_WIS 

WIS

CPSW_MDIO_MMD_PCS 

PCS

CPSW_MDIO_MMD_PHY_XS 

PHY XS

CPSW_MDIO_MMD_DTE_XS 

DTE XS

CPSW_MDIO_MMD_VENDOR_1 

Vendor specific 1

CPSW_MDIO_MMD_VENDOR_2 

Vendor specific 2