CPSW DMA CPPI protocol specific info

Introduction

Data Structures
struct	CpswDma_rxProtoInfo
	Rx Protcol info structure. More...
struct	CpswDma_txProtoInfo
	Tx protocol info structure. More...

Macros
#define	CPSWDMA_CPPI_TXINFO_WORD0_FLOWID_SHIFT   (0U)
	CPPI TX Info Word 0 - Flow Id bit shift. More...
#define	CPSWDMA_CPPI_TXINFO_WORD0_FLOWID_MASK   (((uint32_t) 0xFFU) << CPSWDMA_CPPI_TXINFO_WORD0_FLOWID_SHIFT)
	CPPI TX Info Word 0 - Flow ID bit mask. More...
#define	CPSWDMA_CPPI_TXINFO_WORD0_CRCTYPE_SHIFT   (22U)
	CPPI TX Info Word 0 - CRC Type bit shift. More...
#define	CPSWDMA_CPPI_TXINFO_WORD0_CRCTYPE_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXINFO_WORD0_CRCTYPE_SHIFT)
	CPPI TX Info Word 0 - CRC Type bit mask. More...
#define	CPSWDMA_CPPI_TXINFO_WORD0_PASSCRC_SHIFT   (23U)
	CPPI TX Info Word 0 - Pass CRC bit shift. More...
#define	CPSWDMA_CPPI_TXINFO_WORD0_PASSCRC_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXINFO_WORD0_PASSCRC_SHIFT)
	CPPI TX Info Word 0 - Pass CRC bit mask. More...
#define	CPSWDMA_CPPI_TXINFO_WORD0_PKTTYPE_SHIFT   (27U)
	CPPI TX Info Word 0 - Packet Type bit shift. More...
#define	CPSWDMA_CPPI_TXINFO_WORD0_PKTTYPE_MASK   (((uint32_t) 0x1FU) << CPSWDMA_CPPI_TXINFO_WORD0_PKTTYPE_SHIFT)
	CPPI TX Info Word 0 - Packet Type bit mask. More...
#define	CPSWDMA_CPPI_TXINFO_WORD1_PKTLEN_SHIFT   (0U)
	CPPI TX Info Word 1 - Packet Length bit shift. More...
#define	CPSWDMA_CPPI_TXINFO_WORD1_PKTLEN_MASK   (((uint32_t) 0x3FFF) << CPSWDMA_CPPI_TXINFO_WORD1_PKTLEN_SHIFT)
	CPPI TX Info Word 1 - Packet Length bit mask. More...
#define	CPSWDMA_CPPI_TXINFO_WORD3_SRCID_SHIFT   (16U)
	CPPI TX Info Word 3 - Source Id bit shift. More...
#define	CPSWDMA_CPPI_TXINFO_WORD3_SRCID_MASK   (((uint32_t) 0xFF) << CPSWDMA_CPPI_TXINFO_WORD3_SRCID_SHIFT)
	CPPI TX Info Word 3 - Source Id bit mask. More...
#define	CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ADD_SHIFT   (0U)
	CPPI TX Status Word 2- Checksum Add bit shift. More...
#define	CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ADD_MASK   (((uint32_t) 0xFFFF) << CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ADD_SHIFT)
	CPPI TX Status Word 2 - Checksum Add bit mask. More...
#define	CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ERR_SHIFT   (16U)
	CPPI TX Status Word 2 - Checksum Error bit shift. More...
#define	CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ERR_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ERR_SHIFT)
	CPPI TX Status Word 2 - Checksum Error bit mask. More...
#define	CPSWDMA_CPPI_TXSTATUS_WORD2_FRAGMENT_SHIFT   (17U)
	CPPI TX Status Word 2 - IP Fragment bit shift. More...
#define	CPSWDMA_CPPI_TXSTATUS_WORD2_FRAGMENT_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_FRAGMENT_SHIFT)
	CPPI TX Status Word 2 - IP Fragment bit mask. More...
#define	CPSWDMA_CPPI_TXSTATUS_WORD2_TCP_UDP_N_SHIFT   (18U)
	CPPI TX Status Word 2 - TCP or UDP bit shift. More...
#define	CPSWDMA_CPPI_TXSTATUS_WORD2_TCP_UDP_N_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_TCP_UDP_N_SHIFT)
	CPPI TX Status Word 2 - TCP or UDP bit mask. More...
#define	CPSWDMA_CPPI_TXSTATUS_WORD2_IPV6_VALID_SHIFT   (19U)
	CPPI TX Status Word 2 - IPv6 Valid bit shift. More...
#define	CPSWDMA_CPPI_TXSTATUS_WORD2_IPV6_VALID_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_IPV6_VALID_SHIFT)
	CPPI TX Status Word 2 - IPv6 Valid bit mask. More...
#define	CPSWDMA_CPPI_TXSTATUS_WORD2_IPV4_VALID_SHIFT   (20U)
	CPPI TX Status Word 2 - IPv4 Valid bit shift. More...
#define	CPSWDMA_CPPI_TXSTATUS_WORD2_IPV4_VALID_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_IPV4_VALID_SHIFT)
	CPPI TX Status Word 2 - IPv4 Valid bit mask. More...
#define	CPSWDMA_CPPI_RXINFO_WORD0_CRCTYPE_SHIFT   (22U)
	CPPI RX Info Word 0 - CRC Type bit shift. More...
#define	CPSWDMA_CPPI_RXINFO_WORD0_CRCTYPE_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_RXINFO_WORD0_CRCTYPE_SHIFT)
	CPPI RX Info Word 0 - CRC Type bit mask. More...
#define	CPSWDMA_CPPI_RXINFO_WORD0_PASSCRC_SHIFT   (23U)
	CPPI RX Info Word 0 - Pass CRC bit shift. More...
#define	CPSWDMA_CPPI_RXINFO_WORD0_PASSCRC_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_RXINFO_WORD0_PASSCRC_SHIFT)
	CPPI RX Info Word 0 - Pass CRC bit mask. More...
#define	CPSWDMA_CPPI_RXINFO_WORD2_TOPORT_SHIFT   (16U)
	CPPI RX Info Word 2 - Port To Send bit shift. More...
#define	CPSWDMA_CPPI_RXINFO_WORD2_TOPORT_MASK   (((uint32_t) 0x1FU) << CPSWDMA_CPPI_RXINFO_WORD2_TOPORT_SHIFT)
	CPPI RX Info Word 2 - Port To Send bit mask. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD1_SEQID_SHIFT   (0U)
	CPPI RX Control Word 1 - Timesync Sequence Id bit shift. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD1_SEQID_MASK   (((uint32_t) 0xFFFFU) << CPSWDMA_CPPI_RXCTRL_WORD1_SEQID_SHIFT)
	CPPI RX Control Word 1 - Timesync Sequence Id bit mask. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD1_MSGTYPE_SHIFT   (16U)
	CPPI RX Control Word 1 - Timesync Message Type bit shift. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD1_MSGTYPE_MASK   (((uint32_t) 0xFU) << CPSWDMA_CPPI_RXCTRL_WORD1_MSGTYPE_SHIFT)
	CPPI RX Control Word 1 - Timesync Message Type bit mask. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD1_DOMAIN_SHIFT   (20U)
	CPPI RX Control Word 1 - Timesync Domain bit shift. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD1_DOMAIN_MASK   (((uint32_t) 0xFFU) << CPSWDMA_CPPI_RXCTRL_WORD1_DOMAIN_SHIFT)
	CPPI RX Control Word 1 - Timesync Domain bit mask. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD1_TSEN_SHIFT   (31U)
	CPPI RX Control Word 1 - Timestamp Enabled bit shift. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD1_TSEN_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_RXCTRL_WORD1_TSEN_SHIFT)
	CPPI RX Control Word 1 - Timestamp Enabled bit mask. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_BYTECNT_SHIFT   (0U)
	CPPI RX Control Word 2 - Checksum Byte Count bit shift. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_BYTECNT_MASK   (((uint32_t) 0x3FFFU) << CPSWDMA_CPPI_RXCTRL_WORD1_SEQID_SHIFT)
	CPPI RX Control Word 2 - Checksum Byte Count bit mask. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_INV_SHIFT   (15U)
	CPPI RX Control Word 2 - Inverted Checksum bit shift. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_INV_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_INV_SHIFT)
	CPPI RX Control Word 2 - Inverted Checksum bit mask. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_STARTBYTE_SHIFT   (16U)
	CPPI RX Control Word 2 - Checksum Start Byte bit shift. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_STARTBYTE_MASK   (((uint32_t) 0xFFU) << CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_STARTBYTE_SHIFT)
	CPPI RX Control Word 2 - Checksum Start Byte bit mask. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_RESULT_SHIFT   (24U)
	CPPI RX Control Word 2 - Checksum Result bit shift. More...
#define	CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_RESULT_MASK   (((uint32_t) 0xFFU) << CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_RESULT_SHIFT)
	CPPI RX Control Word 2 - Checksum Result bit mask. More...
#define	CPSWDMA_CPPIPSI_GET_IPV4_FLAG(chkSumInfo)   CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_IPV4_VALID)
	Get IPv4 flag from CPPI TX Status Word 2. More...
#define	CPSWDMA_CPPIPSI_GET_IPV6_FLAG(chkSumInfo)   CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_IPV6_VALID)
	Get IPv6 flag from CPPI TX Status Word 2. More...
#define	CPSWDMA_CPPIPSI_GET_TCPUDP_N_FLAG(chkSumInfo)   CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_TCP_UDP_N)
	Get TCP or UDP flag from CPPI TX Status Word 2. More...
#define	CPSWDMA_CPPIPSI_GET_FRAGMENT_FLAG(chkSumInfo)   CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_FRAGMENT)
	Get IP Fragment flag from CPPI TX Status Word 2. More...
#define	CPSWDMA_CPPIPSI_GET_CHKSUM_ERR_FLAG(chkSumInfo)   CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ERR)
	Get Checksum Error flag from CPPI TX Status Word 2. More...
#define	CPSWDMA_CPPIPSI_GET_CHKSUM_RESULT(chkSumInfo)   CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ADD)
	Get Checksum Result from CPPI TX Status Word 2. More...
#define	CPSWDMA_CPPIPSI_SET_CHKSUM_RES(chkSumInfo, val)   CPSW_FINS(chkSumInfo, CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_RESULT, val)
	Set Checksum Result into CPPI RX Control Word 2. More...
#define	CPSWDMA_CPPIPSI_SET_CHKSUM_STARTBYTE(chkSumInfo, val)   CPSW_FINS(chkSumInfo, CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_STARTBYTE, val)
	Set Checksum Start Byte into CPPI RX Control Word 2. More...
#define	CPSWDMA_CPPIPSI_SET_CHKSUM_INV_FLAG(chkSumInfo, val)   CPSW_FINS(chkSumInfo, CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_INV, val)
	Set Invert Checksum flag into CPPI RX Control Word 2. More...
#define	CPSWDMA_CPPIPSI_SET_CHKSUM_BYTECNT(chkSumInfo, val)   CPSW_FINS(chkSumInfo, CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_BYTECNT, val)
	Set Checksum Byte Count into CPPI RX Control Word 2. More...
#define	CPSWDMA_CPPIPSI_SET_TSEN(tsInfo, val)   CPSW_FINS(tsInfo, CPSWDMA_CPPI_RXCTRL_WORD1_TSEN, val)
	Set Timestamp enable bit into CPPI RX Control Word 1. More...
#define	CPSWDMA_CPPIPSI_SET_DOMAIN(tsInfo, val)   CPSW_FINS(tsInfo, CPSWDMA_CPPI_RXCTRL_WORD1_DOMAIN, val)
	Set domain value into CPPI RX Control Word 1. More...
#define	CPSWDMA_CPPIPSI_SET_MSGTYPE(tsInfo, val)   CPSW_FINS(tsInfo, CPSWDMA_CPPI_RXCTRL_WORD1_MSGTYPE, val)
	Set message type value into CPPI RX Control Word 1. More...
#define	CPSWDMA_CPPIPSI_SET_SEQID(tsInfo, val)   CPSW_FINS(tsInfo, CPSWDMA_CPPI_RXCTRL_WORD1_SEQID, val)
	Set sequence Id value into CPPI RX Control Word 1. More...

Macro Definition Documentation

#define CPSWDMA_CPPI_TXINFO_WORD0_FLOWID_SHIFT   (0U)

CPPI TX Info Word 0 - Flow Id bit shift.

#define CPSWDMA_CPPI_TXINFO_WORD0_FLOWID_MASK   (((uint32_t) 0xFFU) << CPSWDMA_CPPI_TXINFO_WORD0_FLOWID_SHIFT)

CPPI TX Info Word 0 - Flow ID bit mask.

#define CPSWDMA_CPPI_TXINFO_WORD0_CRCTYPE_SHIFT   (22U)

CPPI TX Info Word 0 - CRC Type bit shift.

#define CPSWDMA_CPPI_TXINFO_WORD0_CRCTYPE_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXINFO_WORD0_CRCTYPE_SHIFT)

CPPI TX Info Word 0 - CRC Type bit mask.

#define CPSWDMA_CPPI_TXINFO_WORD0_PASSCRC_SHIFT   (23U)

CPPI TX Info Word 0 - Pass CRC bit shift.

#define CPSWDMA_CPPI_TXINFO_WORD0_PASSCRC_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXINFO_WORD0_PASSCRC_SHIFT)

CPPI TX Info Word 0 - Pass CRC bit mask.

#define CPSWDMA_CPPI_TXINFO_WORD0_PKTTYPE_SHIFT   (27U)

CPPI TX Info Word 0 - Packet Type bit shift.

#define CPSWDMA_CPPI_TXINFO_WORD0_PKTTYPE_MASK   (((uint32_t) 0x1FU) << CPSWDMA_CPPI_TXINFO_WORD0_PKTTYPE_SHIFT)

CPPI TX Info Word 0 - Packet Type bit mask.

#define CPSWDMA_CPPI_TXINFO_WORD1_PKTLEN_SHIFT   (0U)

CPPI TX Info Word 1 - Packet Length bit shift.

#define CPSWDMA_CPPI_TXINFO_WORD1_PKTLEN_MASK   (((uint32_t) 0x3FFF) << CPSWDMA_CPPI_TXINFO_WORD1_PKTLEN_SHIFT)

CPPI TX Info Word 1 - Packet Length bit mask.

#define CPSWDMA_CPPI_TXINFO_WORD3_SRCID_SHIFT   (16U)

CPPI TX Info Word 3 - Source Id bit shift.

#define CPSWDMA_CPPI_TXINFO_WORD3_SRCID_MASK   (((uint32_t) 0xFF) << CPSWDMA_CPPI_TXINFO_WORD3_SRCID_SHIFT)

CPPI TX Info Word 3 - Source Id bit mask.

#define CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ADD_SHIFT   (0U)

CPPI TX Status Word 2- Checksum Add bit shift.

#define CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ADD_MASK   (((uint32_t) 0xFFFF) << CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ADD_SHIFT)

CPPI TX Status Word 2 - Checksum Add bit mask.

#define CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ERR_SHIFT   (16U)

CPPI TX Status Word 2 - Checksum Error bit shift.

#define CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ERR_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ERR_SHIFT)

CPPI TX Status Word 2 - Checksum Error bit mask.

#define CPSWDMA_CPPI_TXSTATUS_WORD2_FRAGMENT_SHIFT   (17U)

CPPI TX Status Word 2 - IP Fragment bit shift.

#define CPSWDMA_CPPI_TXSTATUS_WORD2_FRAGMENT_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_FRAGMENT_SHIFT)

CPPI TX Status Word 2 - IP Fragment bit mask.

#define CPSWDMA_CPPI_TXSTATUS_WORD2_TCP_UDP_N_SHIFT   (18U)

CPPI TX Status Word 2 - TCP or UDP bit shift.

#define CPSWDMA_CPPI_TXSTATUS_WORD2_TCP_UDP_N_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_TCP_UDP_N_SHIFT)

CPPI TX Status Word 2 - TCP or UDP bit mask.

#define CPSWDMA_CPPI_TXSTATUS_WORD2_IPV6_VALID_SHIFT   (19U)

CPPI TX Status Word 2 - IPv6 Valid bit shift.

#define CPSWDMA_CPPI_TXSTATUS_WORD2_IPV6_VALID_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_IPV6_VALID_SHIFT)

CPPI TX Status Word 2 - IPv6 Valid bit mask.

#define CPSWDMA_CPPI_TXSTATUS_WORD2_IPV4_VALID_SHIFT   (20U)

CPPI TX Status Word 2 - IPv4 Valid bit shift.

#define CPSWDMA_CPPI_TXSTATUS_WORD2_IPV4_VALID_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_IPV4_VALID_SHIFT)

CPPI TX Status Word 2 - IPv4 Valid bit mask.

#define CPSWDMA_CPPI_RXINFO_WORD0_CRCTYPE_SHIFT   (22U)

CPPI RX Info Word 0 - CRC Type bit shift.

#define CPSWDMA_CPPI_RXINFO_WORD0_CRCTYPE_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_RXINFO_WORD0_CRCTYPE_SHIFT)

CPPI RX Info Word 0 - CRC Type bit mask.

#define CPSWDMA_CPPI_RXINFO_WORD0_PASSCRC_SHIFT   (23U)

CPPI RX Info Word 0 - Pass CRC bit shift.

#define CPSWDMA_CPPI_RXINFO_WORD0_PASSCRC_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_RXINFO_WORD0_PASSCRC_SHIFT)

CPPI RX Info Word 0 - Pass CRC bit mask.

#define CPSWDMA_CPPI_RXINFO_WORD2_TOPORT_SHIFT   (16U)

CPPI RX Info Word 2 - Port To Send bit shift.

#define CPSWDMA_CPPI_RXINFO_WORD2_TOPORT_MASK   (((uint32_t) 0x1FU) << CPSWDMA_CPPI_RXINFO_WORD2_TOPORT_SHIFT)

CPPI RX Info Word 2 - Port To Send bit mask.

#define CPSWDMA_CPPI_RXCTRL_WORD1_SEQID_SHIFT   (0U)

CPPI RX Control Word 1 - Timesync Sequence Id bit shift.

#define CPSWDMA_CPPI_RXCTRL_WORD1_SEQID_MASK   (((uint32_t) 0xFFFFU) << CPSWDMA_CPPI_RXCTRL_WORD1_SEQID_SHIFT)

CPPI RX Control Word 1 - Timesync Sequence Id bit mask.

#define CPSWDMA_CPPI_RXCTRL_WORD1_MSGTYPE_SHIFT   (16U)

CPPI RX Control Word 1 - Timesync Message Type bit shift.

#define CPSWDMA_CPPI_RXCTRL_WORD1_MSGTYPE_MASK   (((uint32_t) 0xFU) << CPSWDMA_CPPI_RXCTRL_WORD1_MSGTYPE_SHIFT)

CPPI RX Control Word 1 - Timesync Message Type bit mask.

#define CPSWDMA_CPPI_RXCTRL_WORD1_DOMAIN_SHIFT   (20U)

CPPI RX Control Word 1 - Timesync Domain bit shift.

#define CPSWDMA_CPPI_RXCTRL_WORD1_DOMAIN_MASK   (((uint32_t) 0xFFU) << CPSWDMA_CPPI_RXCTRL_WORD1_DOMAIN_SHIFT)

CPPI RX Control Word 1 - Timesync Domain bit mask.

#define CPSWDMA_CPPI_RXCTRL_WORD1_TSEN_SHIFT   (31U)

CPPI RX Control Word 1 - Timestamp Enabled bit shift.

#define CPSWDMA_CPPI_RXCTRL_WORD1_TSEN_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_RXCTRL_WORD1_TSEN_SHIFT)

CPPI RX Control Word 1 - Timestamp Enabled bit mask.

#define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_BYTECNT_SHIFT   (0U)

CPPI RX Control Word 2 - Checksum Byte Count bit shift.

#define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_BYTECNT_MASK   (((uint32_t) 0x3FFFU) << CPSWDMA_CPPI_RXCTRL_WORD1_SEQID_SHIFT)

CPPI RX Control Word 2 - Checksum Byte Count bit mask.

#define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_INV_SHIFT   (15U)

CPPI RX Control Word 2 - Inverted Checksum bit shift.

#define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_INV_MASK   (((uint32_t) 0x1U) << CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_INV_SHIFT)

CPPI RX Control Word 2 - Inverted Checksum bit mask.

#define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_STARTBYTE_SHIFT   (16U)

CPPI RX Control Word 2 - Checksum Start Byte bit shift.

#define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_STARTBYTE_MASK   (((uint32_t) 0xFFU) << CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_STARTBYTE_SHIFT)

CPPI RX Control Word 2 - Checksum Start Byte bit mask.

#define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_RESULT_SHIFT   (24U)

CPPI RX Control Word 2 - Checksum Result bit shift.

#define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_RESULT_MASK   (((uint32_t) 0xFFU) << CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_RESULT_SHIFT)

CPPI RX Control Word 2 - Checksum Result bit mask.

#define CPSWDMA_CPPIPSI_GET_IPV4_FLAG

(

chkSumInfo

)

CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_IPV4_VALID)

Get IPv4 flag from CPPI TX Status Word 2.

#define CPSWDMA_CPPIPSI_GET_IPV6_FLAG

(

chkSumInfo

)

CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_IPV6_VALID)

Get IPv6 flag from CPPI TX Status Word 2.

#define CPSWDMA_CPPIPSI_GET_TCPUDP_N_FLAG

(

chkSumInfo

)

CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_TCP_UDP_N)

Get TCP or UDP flag from CPPI TX Status Word 2.

#define CPSWDMA_CPPIPSI_GET_FRAGMENT_FLAG

(

chkSumInfo

)

CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_FRAGMENT)

Get IP Fragment flag from CPPI TX Status Word 2.

#define CPSWDMA_CPPIPSI_GET_CHKSUM_ERR_FLAG

(

chkSumInfo

)

CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ERR)

Get Checksum Error flag from CPPI TX Status Word 2.

#define CPSWDMA_CPPIPSI_GET_CHKSUM_RESULT

(

chkSumInfo

)

CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ADD)

Get Checksum Result from CPPI TX Status Word 2.

#define CPSWDMA_CPPIPSI_SET_CHKSUM_RES	(		chkSumInfo,
			val
	)		CPSW_FINS(chkSumInfo, CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_RESULT, val)

Set Checksum Result into CPPI RX Control Word 2.

#define CPSWDMA_CPPIPSI_SET_CHKSUM_STARTBYTE	(		chkSumInfo,
			val
	)		CPSW_FINS(chkSumInfo, CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_STARTBYTE, val)

Set Checksum Start Byte into CPPI RX Control Word 2.

#define CPSWDMA_CPPIPSI_SET_CHKSUM_INV_FLAG	(		chkSumInfo,
			val
	)		CPSW_FINS(chkSumInfo, CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_INV, val)

Set Invert Checksum flag into CPPI RX Control Word 2.

#define CPSWDMA_CPPIPSI_SET_CHKSUM_BYTECNT	(		chkSumInfo,
			val
	)		CPSW_FINS(chkSumInfo, CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_BYTECNT, val)

Set Checksum Byte Count into CPPI RX Control Word 2.

#define CPSWDMA_CPPIPSI_SET_TSEN	(		tsInfo,
			val
	)		CPSW_FINS(tsInfo, CPSWDMA_CPPI_RXCTRL_WORD1_TSEN, val)

Set Timestamp enable bit into CPPI RX Control Word 1.

#define CPSWDMA_CPPIPSI_SET_DOMAIN	(		tsInfo,
			val
	)		CPSW_FINS(tsInfo, CPSWDMA_CPPI_RXCTRL_WORD1_DOMAIN, val)

Set domain value into CPPI RX Control Word 1.

#define CPSWDMA_CPPIPSI_SET_MSGTYPE	(		tsInfo,
			val
	)		CPSW_FINS(tsInfo, CPSWDMA_CPPI_RXCTRL_WORD1_MSGTYPE, val)

Set message type value into CPPI RX Control Word 1.

#define CPSWDMA_CPPIPSI_SET_SEQID	(		tsInfo,
			val
	)		CPSW_FINS(tsInfo, CPSWDMA_CPPI_RXCTRL_WORD1_SEQID, val)

Set sequence Id value into CPPI RX Control Word 1.