PDK API Guide for J721E
cpsw_phy.h
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32 
45 #ifndef CPSW_PHY_H_
46 #define CPSW_PHY_H_
47 
48 /* ========================================================================== */
49 /* Include Files */
50 /* ========================================================================== */
51 
52 #include <ti/csl/csl_types.h>
53 
54 #include "cpsw_mdio.h"
55 #include "cpsw_types.h"
56 #include "cpsw_macport.h"
57 
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61 
62 /* ========================================================================== */
63 /* Macros */
64 /* ========================================================================== */
65 
67 #define CPSW_PHY_EXTENDED_CFG_SIZE_MAX (128U)
68 
70 #define CPSW_PHY_FSM_TICK_PERIOD_MS (100U)
71 
78 #define CPSW_PHY_INVALID_PHYADDR (~0U)
79 
80 /* TODO: Currently, always assume auto-detect */
82 #define CPSW_PHY_DEVID_AUTODETECT (~0U)
83 
85 #define CPSW_PHY_USE_DEFAULT (~0U)
86 
88 #define CPSW_PHY_NWAY_AUTOMDIX_ENABLE (1U << 15)
89 
91 #define CPSW_PHY_MIIMDIO_MDIXFLIP (1U << 28)
92 
93 /* These events are returned as result param by CpswPhy_tick() to allow the upper
94  * layer to track PHY status */
95 
97 #define CPSW_PHY_EVENT_NOCHANGE (0U)
98 
100 #define CPSW_PHY_EVENT_LINKDOWN (1U)
101 
103 #define CPSW_PHY_EVENT_LINKUP (2U)
104 
106 #define CPSW_PHY_EVENT_PHYERROR (3U)
107 
109 #define CPSW_PHY_EVENT_LPBK (4U)
110 
112 #define CPSW_PHY_IS_ADDR_VALID(addr) ((addr) <= 31U)
113 
115 #define CPSW_PHY_PUBLIC_IOCTL(x) (CPSW_IOCTL_PHY_BASE | CPSW_IOCTL_MIN(x))
116 
117 /* ========================================================================== */
118 /* Structures and Enums */
119 /* ========================================================================== */
120 
125 {
134 
143 
152 
162 
172 
182 
191 
200 
209 
218 
227 
236 
245 
254 
263 
272 
281 
290 };
291 
295 typedef struct CpswPhy_GenericInArgs_s
296 {
300 
301 /* TODO: Remove - it's unused */
307 typedef struct CpswPhy_GetModeOutArgs_s
308 {
311 
314 
316  bool loopback;
318 
324 typedef struct CpswPhy_SetModeInArgs
325 {
328 
330  uint32_t mode;
331 
335 
339 typedef struct CpswPhy_ComplianceTestInArgs_s
340 {
343 
345  uint32_t testMode;
347 
351 typedef struct CpswPhy_ReadRegInArgs_s
352 {
355 
357  uint16_t reg;
359 
363 typedef struct CpswPhy_WriteRegInArgs_s
364 {
367 
369  uint16_t reg;
370 
372  uint16_t val;
374 
378 typedef struct CpswPhy_Clause45ReadRegInArgs_s
379 {
382 
385 
387  uint16_t reg;
389 
393 typedef struct CpswPhy_Clause45WriteRegInArgs_s
394 {
397 
400 
402  uint16_t reg;
403 
405  uint16_t val;
407 
411 typedef struct CpswPhy_Version_s
412 {
414  uint32_t oui;
415 
417  uint32_t model;
418 
420  uint32_t revision;
422 
426 typedef struct CpswPhy_FsmTimeoutConfig_s
427 {
430 
433 
436 
439 
442 
445 
447  uint32_t mdixTicks;
449 
453 typedef struct CpswPhy_Config_s
454 {
456  uint32_t phyAddr;
457 
459  uint32_t nwayCaps;
460 
463 
468 
471 
474 
477 
480 
483 
485  uint8_t extendedConfig[CPSW_PHY_EXTENDED_CFG_SIZE_MAX];
486 
490 
496 typedef struct CpswPhy_Obj_s *CpswPhy_Handle;
497 
498 /* ========================================================================== */
499 /* Global Variables Declarations */
500 /* ========================================================================== */
501 
502 /* None */
503 
504 /* ========================================================================== */
505 /* Function Declarations */
506 /* ========================================================================== */
507 
508 /* None */
509 
510 /* ========================================================================== */
511 /* Deprecated Function Declarations */
512 /* ========================================================================== */
513 
514 /* None */
515 
516 #ifdef __cplusplus
517 }
518 #endif
519 
520 #endif /* #ifndef CPSW_PHY_H_ */
521 
This file contains the generic definitions and structure definitions of the CPSW driver.
uint32_t extendedConfigSize
Definition: cpsw_phy.h:488
Read PHY register using Clause-45 frame.
Definition: cpsw_phy.h:271
uint32_t linkWaitStateTicks
LINK_WAIT state timeout (in ticks)
Definition: cpsw_phy.h:444
Input args for CPSW_PHY_IOCTL_READ_CLAUSE45_REG command.
Definition: cpsw_phy.h:378
CpswMdio_Clause45Mmd mmd
Definition: cpsw_phy.h:384
uint32_t findingStateTicks
FINDING state timeout (in ticks)
Definition: cpsw_phy.h:429
uint32_t nwayCaps
Definition: cpsw_phy.h:459
Input args for CPSW_PHY_IOCTL_READ_REG_EXT command.
Definition: cpsw_phy.h:351
Get PHY identification.
Definition: cpsw_phy.h:142
uint32_t nwayWaitStateTicks
NWAY_WAIT state timeout (in ticks)
Definition: cpsw_phy.h:441
Generic input args.
Definition: cpsw_phy.h:295
uint32_t model
Definition: cpsw_phy.h:417
Check state-machine link state, that is, whether the state machine has reached the LINKED state...
Definition: cpsw_phy.h:161
bool loopbackEn
Definition: cpsw_phy.h:333
Get PHY identification.
Definition: cpsw_phy.h:133
Cpsw_MacPort portNum
Definition: cpsw_phy.h:354
Input args for CPSW_PHY_IOCTL_PHY_SET_MODE command.
Definition: cpsw_phy.h:324
bool enableLoopback
Definition: cpsw_phy.h:470
PHY State-Machine time-out values.
Definition: cpsw_phy.h:426
PHY version (ID)
Definition: cpsw_phy.h:411
Run compliance test.
Definition: cpsw_phy.h:208
Cpsw_Speed speed
Definition: cpsw_phy.h:310
bool masterMode
Definition: cpsw_phy.h:473
Cpsw_Duplexity
MAC interface duplexity.
Definition: cpsw_types.h:563
bool extClkSource
Definition: cpsw_phy.h:476
Input args for CPSW_PHY_IOCTL_WRITE_CLAUSE45_REG command.
Definition: cpsw_phy.h:393
uint32_t revision
Definition: cpsw_phy.h:420
PHY configuration parameters.
Definition: cpsw_phy.h:453
bool mdixEnable
Definition: cpsw_phy.h:462
Write PHY register using Clause-45 frame.
Definition: cpsw_phy.h:280
uint32_t mdixTicks
Timeout if MDIX is enabled (in ticks)
Definition: cpsw_phy.h:447
Print PHY registers.
Definition: cpsw_phy.h:289
struct CpswPhy_Obj_s * CpswPhy_Handle
PHY driver object handle.
Definition: cpsw_phy.h:496
Get the link speed and duplexity state after the state machine has reached the LINKED state...
Definition: cpsw_phy.h:181
bool loopback
Definition: cpsw_phy.h:316
CpswPhy_Ioctl_e
PHY IOCTL commands.
Definition: cpsw_phy.h:124
CpswPhy_FsmTimeoutConfig timeoutConfig
Definition: cpsw_phy.h:482
Read PHY register.
Definition: cpsw_phy.h:235
This file contains the structure definitions and function prototypes of the MDIO submodule.
Cpsw_Speed
MAC interface speed.
Definition: cpsw_types.h:539
#define CPSW_PHY_EXTENDED_CFG_SIZE_MAX
Max extended configuration size, arbitrarily chosen.
Definition: cpsw_phy.h:67
uint32_t phyAddr
Definition: cpsw_phy.h:456
Cpsw_MacPort portNum
Definition: cpsw_phy.h:327
Check PHY link status from PHY register.
Definition: cpsw_phy.h:226
Write PHY register.
Definition: cpsw_phy.h:244
Input args for CPSW_PHY_IOCTL_RUN_COMPLIANCE_TEST command.
Definition: cpsw_phy.h:339
Cpsw_Duplexity duplexity
Definition: cpsw_phy.h:313
uint16_t reg
Definition: cpsw_phy.h:402
Get PHY supported modes by local PHY device.
Definition: cpsw_phy.h:151
uint32_t mode
Definition: cpsw_phy.h:330
uint32_t nwayStartStateTicks
NWAY_START state timeout (in ticks)
Definition: cpsw_phy.h:438
bool isStrapped
Definition: cpsw_phy.h:467
Cpsw_MacPort portNum
Definition: cpsw_phy.h:366
This file contains the structure definitions and function prototypes of the MAC Port submodule...
CpswMdio_Clause45Mmd
Clause-45 MDIO Manageable Device (MMD) addresses.
Definition: cpsw_mdio.h:271
uint16_t reg
Definition: cpsw_phy.h:387
Output args for CPSW_PHY_IOCTL_PHY_GET_MODE command.
Definition: cpsw_phy.h:307
uint32_t testMode
Definition: cpsw_phy.h:345
Cpsw_MacPort portNum
Definition: cpsw_phy.h:396
uint16_t reg
Definition: cpsw_phy.h:357
uint32_t resetWaitStateResidenceTicks
RESET_WAIT state residence time (in ticks)
Definition: cpsw_phy.h:435
uint32_t resetWaitStateTicks
RESET_WAIT state timeout (in ticks)
Definition: cpsw_phy.h:432
This file contains the Register Desciptions for CSL types.
uint16_t val
Definition: cpsw_phy.h:405
Set PHY mode.
Definition: cpsw_phy.h:190
Reset PHY.
Definition: cpsw_phy.h:199
Cpsw_MacPort portNum
Definition: cpsw_phy.h:342
bool skipExtendedConfig
Definition: cpsw_phy.h:479
#define CPSW_PHY_PUBLIC_IOCTL(x)
Helper macro to create IOCTL commands for host port submodule.
Definition: cpsw_phy.h:115
uint32_t oui
Definition: cpsw_phy.h:414
CpswMdio_Clause45Mmd mmd
Definition: cpsw_phy.h:399
uint16_t reg
Definition: cpsw_phy.h:369
Read PHY extended register.
Definition: cpsw_phy.h:253
Input args for CPSW_PHY_IOCTL_WRITE_REG_EXT command.
Definition: cpsw_phy.h:363
Write PHY extended register.
Definition: cpsw_phy.h:262
Check PHY alive status.
Definition: cpsw_phy.h:217
uint16_t val
Definition: cpsw_phy.h:372
Check state-machine link state, that is, whether the state machine has reached the LINKED state...
Definition: cpsw_phy.h:171
Cpsw_MacPort
CPSW MAC port.
Definition: cpsw_types.h:477
Cpsw_MacPort portNum
Definition: cpsw_phy.h:381
Cpsw_MacPort portNum
Definition: cpsw_phy.h:298