44 #ifndef CPSW_DMA_PSI_H_ 45 #define CPSW_DMA_PSI_H_ 62 #define CPSWDMA_CPPI_TXINFO_WORD0_FLOWID_SHIFT (0U) 65 #define CPSWDMA_CPPI_TXINFO_WORD0_FLOWID_MASK (((uint32_t) 0xFFU) << CPSWDMA_CPPI_TXINFO_WORD0_FLOWID_SHIFT) 68 #define CPSWDMA_CPPI_TXINFO_WORD0_CRCTYPE_SHIFT (22U) 71 #define CPSWDMA_CPPI_TXINFO_WORD0_CRCTYPE_MASK (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXINFO_WORD0_CRCTYPE_SHIFT) 74 #define CPSWDMA_CPPI_TXINFO_WORD0_PASSCRC_SHIFT (23U) 77 #define CPSWDMA_CPPI_TXINFO_WORD0_PASSCRC_MASK (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXINFO_WORD0_PASSCRC_SHIFT) 80 #define CPSWDMA_CPPI_TXINFO_WORD0_PKTTYPE_SHIFT (27U) 83 #define CPSWDMA_CPPI_TXINFO_WORD0_PKTTYPE_MASK (((uint32_t) 0x1FU) << CPSWDMA_CPPI_TXINFO_WORD0_PKTTYPE_SHIFT) 89 #define CPSWDMA_CPPI_TXINFO_WORD1_PKTLEN_SHIFT (0U) 92 #define CPSWDMA_CPPI_TXINFO_WORD1_PKTLEN_MASK (((uint32_t) 0x3FFF) << CPSWDMA_CPPI_TXINFO_WORD1_PKTLEN_SHIFT) 98 #define CPSWDMA_CPPI_TXINFO_WORD3_SRCID_SHIFT (16U) 101 #define CPSWDMA_CPPI_TXINFO_WORD3_SRCID_MASK (((uint32_t) 0xFF) << CPSWDMA_CPPI_TXINFO_WORD3_SRCID_SHIFT) 107 #define CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ADD_SHIFT (0U) 110 #define CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ADD_MASK (((uint32_t) 0xFFFF) << CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ADD_SHIFT) 113 #define CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ERR_SHIFT (16U) 116 #define CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ERR_MASK (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ERR_SHIFT) 119 #define CPSWDMA_CPPI_TXSTATUS_WORD2_FRAGMENT_SHIFT (17U) 122 #define CPSWDMA_CPPI_TXSTATUS_WORD2_FRAGMENT_MASK (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_FRAGMENT_SHIFT) 125 #define CPSWDMA_CPPI_TXSTATUS_WORD2_TCP_UDP_N_SHIFT (18U) 128 #define CPSWDMA_CPPI_TXSTATUS_WORD2_TCP_UDP_N_MASK (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_TCP_UDP_N_SHIFT) 131 #define CPSWDMA_CPPI_TXSTATUS_WORD2_IPV6_VALID_SHIFT (19U) 134 #define CPSWDMA_CPPI_TXSTATUS_WORD2_IPV6_VALID_MASK (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_IPV6_VALID_SHIFT) 137 #define CPSWDMA_CPPI_TXSTATUS_WORD2_IPV4_VALID_SHIFT (20U) 140 #define CPSWDMA_CPPI_TXSTATUS_WORD2_IPV4_VALID_MASK (((uint32_t) 0x1U) << CPSWDMA_CPPI_TXSTATUS_WORD2_IPV4_VALID_SHIFT) 146 #define CPSWDMA_CPPI_RXINFO_WORD0_CRCTYPE_SHIFT (22U) 149 #define CPSWDMA_CPPI_RXINFO_WORD0_CRCTYPE_MASK (((uint32_t) 0x1U) << CPSWDMA_CPPI_RXINFO_WORD0_CRCTYPE_SHIFT) 152 #define CPSWDMA_CPPI_RXINFO_WORD0_PASSCRC_SHIFT (23U) 155 #define CPSWDMA_CPPI_RXINFO_WORD0_PASSCRC_MASK (((uint32_t) 0x1U) << CPSWDMA_CPPI_RXINFO_WORD0_PASSCRC_SHIFT) 161 #define CPSWDMA_CPPI_RXINFO_WORD2_TOPORT_SHIFT (16U) 164 #define CPSWDMA_CPPI_RXINFO_WORD2_TOPORT_MASK (((uint32_t) 0x1FU) << CPSWDMA_CPPI_RXINFO_WORD2_TOPORT_SHIFT) 170 #define CPSWDMA_CPPI_RXCTRL_WORD1_SEQID_SHIFT (0U) 173 #define CPSWDMA_CPPI_RXCTRL_WORD1_SEQID_MASK (((uint32_t) 0xFFFFU) << CPSWDMA_CPPI_RXCTRL_WORD1_SEQID_SHIFT) 176 #define CPSWDMA_CPPI_RXCTRL_WORD1_MSGTYPE_SHIFT (16U) 179 #define CPSWDMA_CPPI_RXCTRL_WORD1_MSGTYPE_MASK (((uint32_t) 0xFU) << CPSWDMA_CPPI_RXCTRL_WORD1_MSGTYPE_SHIFT) 182 #define CPSWDMA_CPPI_RXCTRL_WORD1_DOMAIN_SHIFT (20U) 185 #define CPSWDMA_CPPI_RXCTRL_WORD1_DOMAIN_MASK (((uint32_t) 0xFFU) << CPSWDMA_CPPI_RXCTRL_WORD1_DOMAIN_SHIFT) 188 #define CPSWDMA_CPPI_RXCTRL_WORD1_TSEN_SHIFT (31U) 191 #define CPSWDMA_CPPI_RXCTRL_WORD1_TSEN_MASK (((uint32_t) 0x1U) << CPSWDMA_CPPI_RXCTRL_WORD1_TSEN_SHIFT) 197 #define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_BYTECNT_SHIFT (0U) 200 #define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_BYTECNT_MASK (((uint32_t) 0x3FFFU) << CPSWDMA_CPPI_RXCTRL_WORD1_SEQID_SHIFT) 203 #define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_INV_SHIFT (15U) 206 #define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_INV_MASK (((uint32_t) 0x1U) << CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_INV_SHIFT) 209 #define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_STARTBYTE_SHIFT (16U) 212 #define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_STARTBYTE_MASK (((uint32_t) 0xFFU) << CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_STARTBYTE_SHIFT) 215 #define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_RESULT_SHIFT (24U) 218 #define CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_RESULT_MASK (((uint32_t) 0xFFU) << CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_RESULT_SHIFT) 224 #define CPSWDMA_CPPIPSI_GET_IPV4_FLAG(chkSumInfo) \ 225 CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_IPV4_VALID) 228 #define CPSWDMA_CPPIPSI_GET_IPV6_FLAG(chkSumInfo) \ 229 CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_IPV6_VALID) 232 #define CPSWDMA_CPPIPSI_GET_TCPUDP_N_FLAG(chkSumInfo) \ 233 CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_TCP_UDP_N) 236 #define CPSWDMA_CPPIPSI_GET_FRAGMENT_FLAG(chkSumInfo) \ 237 CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_FRAGMENT) 240 #define CPSWDMA_CPPIPSI_GET_CHKSUM_ERR_FLAG(chkSumInfo) \ 241 CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ERR) 244 #define CPSWDMA_CPPIPSI_GET_CHKSUM_RESULT(chkSumInfo) \ 245 CPSW_FEXT(chkSumInfo, CPSWDMA_CPPI_TXSTATUS_WORD2_CHKSUM_ADD) 251 #define CPSWDMA_CPPIPSI_SET_CHKSUM_RES(chkSumInfo, val) \ 252 CPSW_FINS(chkSumInfo, CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_RESULT, val) 255 #define CPSWDMA_CPPIPSI_SET_CHKSUM_STARTBYTE(chkSumInfo, val) \ 256 CPSW_FINS(chkSumInfo, CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_STARTBYTE, val) 259 #define CPSWDMA_CPPIPSI_SET_CHKSUM_INV_FLAG(chkSumInfo, val) \ 260 CPSW_FINS(chkSumInfo, CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_INV, val) 263 #define CPSWDMA_CPPIPSI_SET_CHKSUM_BYTECNT(chkSumInfo, val) \ 264 CPSW_FINS(chkSumInfo, CPSWDMA_CPPI_RXCTRL_WORD2_CHKSUM_BYTECNT, val) 267 #define CPSWDMA_CPPIPSI_SET_TSEN(tsInfo, val) \ 268 CPSW_FINS(tsInfo, CPSWDMA_CPPI_RXCTRL_WORD1_TSEN, val) 271 #define CPSWDMA_CPPIPSI_SET_DOMAIN(tsInfo, val) \ 272 CPSW_FINS(tsInfo, CPSWDMA_CPPI_RXCTRL_WORD1_DOMAIN, val) 275 #define CPSWDMA_CPPIPSI_SET_MSGTYPE(tsInfo, val) \ 276 CPSW_FINS(tsInfo, CPSWDMA_CPPI_RXCTRL_WORD1_MSGTYPE, val) 279 #define CPSWDMA_CPPIPSI_SET_SEQID(tsInfo, val) \ 280 CPSW_FINS(tsInfo, CPSWDMA_CPPI_RXCTRL_WORD1_SEQID, val) 292 typedef struct CpswDma_rxProtoInfo_s
319 typedef struct CpswDma_txProtoInfo_s
uint16_t chkSumResOffset
Definition: cpsw_dma_psi.h:324
bool fragment
Definition: cpsw_dma_psi.h:304
bool tcpudpIndicator
Definition: cpsw_dma_psi.h:301
uint16_t chkSum
Definition: cpsw_dma_psi.h:310
uint16_t chkSumByteCnt
Definition: cpsw_dma_psi.h:337
bool ipv6Valid
Definition: cpsw_dma_psi.h:295
bool chkSumInv
Definition: cpsw_dma_psi.h:332
uint16_t chkSumStartByte
Definition: cpsw_dma_psi.h:328
Tx protocol info structure.
Definition: cpsw_dma_psi.h:319
bool chkSumErr
Definition: cpsw_dma_psi.h:307
bool ipv4Valid
Definition: cpsw_dma_psi.h:298
Rx Protcol info structure.
Definition: cpsw_dma_psi.h:292