MCUSW
|
SPI Job configuration structure specific to McSPI peripheral.
uint16 Spi_McspiExternalDeviceConfigType::csEnable |
Chip select functionality on/off
Spi_CsModeType Spi_McspiExternalDeviceConfigType::csMode |
Select single or continuous mode Note: Applicable only for McSPI;
Spi_LevelType Spi_McspiExternalDeviceConfigType::csPolarity |
Chip select pin polarity high or low
Spi_DataDelayType Spi_McspiExternalDeviceConfigType::csIdleTime |
CS idle time (Timing between clock and chip select) if single mode is chosen. Values in case of McSPI McSPI 0x00 - 0.5 clock cycles 0x01 - 1.5 clock cycles 0x02 - 2.5 clock cycles 0x03 - 3.5 clock cycles
uint32 Spi_McspiExternalDeviceConfigType::clkDivider |
Clock divider. This is used to derive the required baudrate from the McSPI functional clock. This value should be 1 less than the actual divider value. So a value of 0 means the divider is 1.
Maximum allowed value of divider is 4095(12 bit register field)
Spi_ClkMode Spi_McspiExternalDeviceConfigType::clkMode |
Mode 0 = {0=CPOL,0=CPHA}; Mode 1={0,1}; Mode 2={1,0} Mode 3={1,1}
Spi_TxRxMode Spi_McspiExternalDeviceConfigType::txRxMode |
TX and RX mode
uint16 Spi_McspiExternalDeviceConfigType::startBitEnable |
Start bit D/CX added before SPI transfer. Polarity is defined by start bit level (below).
Spi_LevelType Spi_McspiExternalDeviceConfigType::startBitLevel |
Start-bit polarity used when startBitEnable is TRUE.
Spi_DataLineReceiveType Spi_McspiExternalDeviceConfigType::receptionLineEnable |
Defines the data lines selected for reception.
Spi_DataLineTransmitType Spi_McspiExternalDeviceConfigType::transmissionLineEnable |
Defines the data lines selected for transmission.