3.10. MCRC Safety Example

3.10.1. Introduction

This example demonstrates the usage of the MCRC module. The example shows how to setup and use the MCRC controller in the semi and full modes of operation. Show both generation of matching CRC as well as non-matching signature due to insertion of error in the block of information on which the CRC is being performed or in the signature provided to the PSA Signature Register (or both, depending on the mode).

The example demonstrates:

  • Configure MCRC controller for semi and full mode to calculate the CRC.

  • Configure of matching CRC and non-matching signature.

  • Generation of interrupt due to pattern compression.

3.10.2. Use Cases

Use Case

Description

UC-1

Full CPU-mode signature compute for MCU instance and comparison against known value.

UC-2

Full CPU-mode signature compute for Main domain instance and comparison against known value.

UC-3

Semi-cpu mode configuration with DMA channel for MCU instance and verify signature calculated as expected.

UC-4

Semi-cpu mode configuration with DMA channel for Main instance and show case with “non matching” signature.

UC-5

Semi-cpu mode configuration with DMA channel for MCU instance, calculate reference/expected value using full-CPU mode and verify signature calculated from semi-CPU mode is as expected.

3.10.3. Example Details

The example should be loaded to the hardware using the Secondary Boot Loader (SBL) from the SDK.

Example Name

Location

Build Command

mcrc_app

[sdl_install_dir]/examples/mcrc/

make mcrc_app PROFILE=release

3.10.4. Expected Output

MCRC Application

MCRC FULL CPU mode : starting
Full_CPU mode MCRC signature verification done successfully for the instance MCRC_MCU_NAVSS


MCRC FULL CPU mode : starting
Full_CPU mode MCRC signature verification done successfully for the instance NAVSS0_MCRC_0.



MCRC Semi_CPU mode : starting


Copied reference data into memory @803f4800.
Using Pre-Defined Reference MCRC signature Value.
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

MCRC signature verification done successfully.
Processed data of size 200000 Bytes 20 times in 1536 ms.
MCRC performance: 2 MB/s
udmaEventCb occured. eventype 2
.
Copied reference data into memory @803f4800.
Using Pre-Defined Reference MCRC signature Value.
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 1

Sector signature does not match.
Expected MCRC signature value : 0x1863376183a8c73aU
Calculated MCRC signature value : 0xc60b4fb8d98307f6U
MCRC signature verification done successfully.
Processed data of size 200000 Bytes 20 times in 4401 ms.
MCRC performance: 0 MB/s
udmaEventCb occured. eventype 2
.
Copied reference data into memory @803f4800.
Calculating Reference MCRC signature Value.
 MCRC signature value : 0xc60b4fb8d98307f6U
udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

udmaEventCb occured. eventype 1
.MCRC Semi CPU intrrupt status : 256

MCRC signature verification done successfully.
Processed data of size 200000 Bytes 20 times in 1537 ms.
MCRC performance: 2 MB/s
udmaEventCb occured. eventype 2
.Applications Name: MCRC_fullCPU_mode  PASSED
Applications Name: MCRC_semiCPU_mode  PASSED

 All applications have passed.
main.c:344:test_sdl_mcrc_baremetal_test_app:PASS

-----------------------
1 Tests 0 Failures 0 Ignored
OK

3.10.5. Reference

MCRC User Guide