IPC Low Level Driver J7 SOC specific file. More...
#include <ti/drv/ipc/include/ipc_config.h>Go to the source code of this file.
Macros | |
| #define | IPC_VRING_BUFFER_SIZE (0x1C00000U) |
| VRing Buffer Size required for all core combinations. More... | |
| #define | SUPPORT_C66X_BIT0 |
| #define | IPC_MPU1_0 (0U) |
| Core definitions. More... | |
| #define | IPC_MCU1_0 (1U) |
| #define | IPC_MCU1_1 (2U) |
| #define | IPC_MCU2_0 (3U) |
| #define | IPC_MCU2_1 (4U) |
| #define | IPC_MAILBOX_CLUSTER_CNT (12U) |
| #define | IPC_MAILBOX_USER_CNT (4U) |
| #define | MAIN_NAVSS_MAILBOX_INPUTINTR_MAX (440U) |
| #define | MAIN_NAVSS_MAILBOX_OUTPUTINTR_MAX (512U) |
| #define | IPC_MCU_NAVSS0_INTR0_CFG_BASE (CSL_NAVSS_MAIN_INTR_ROUTER_CFG_REGS_0_BASE) |
| #define | IPC_C66X_RAT_BASE (0x07ff0030U) |
| #define | IPC_C66X_INTR_VA_BASE (0x18000000U) |
| #define | IPC_C66X_1_INTR_PA_BASE (CSL_C66SS0_INTROUTER0_INTR_ROUTER_CFG_BASE) |
| #define | IPC_C66X_2_INTR_PA_BASE (CSL_C66SS1_INTROUTER0_INTR_ROUTER_CFG_BASE) |
| #define | C66X1_MBINTR_INPUT_BASE (74U) |
| #define | C66X1_MBINTR_OFFSET (84U) |
| #define | C66X1_MBINTR_OUTPUT_BASE (96U) |
| #define | C66X2_MBINTR_INPUT_BASE (74U) |
| #define | C66X2_MBINTR_OUTPUT_BASE (96U) |
| #define | C66X2_MBINTR_OFFSET (84U) |
| #define | C7X_CLEC_BASE_ADDR (CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE) |
| #define | C7X_CLEC_OFFSET (1024U - 32U) |
| #define | IPC_C7X_MBINTR_OFFSET (59U) |
Functions | |
| int32_t | Ipc_sciclientIrqRelease (uint16_t remoteId, uint32_t clusterId, uint32_t userId, uint32_t intNumber) |
| int32_t | Ipc_sciclientIrqSet (uint16_t remoteId, uint32_t clusterId, uint32_t userId, uint32_t intNumber) |
| int32_t | Ipc_getIntNumRange (uint32_t coreIndex, uint16_t *rangeStartP, uint16_t *rangeNumP) |
IPC Low Level Driver J7 SOC specific file.