PSDK QNX API Guide
CacheP.h
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32 
50 #ifndef ti_osal_CacheP__include
51 #define ti_osal_CacheP__include
52 
53 #ifdef __cplusplus
54 extern "C" {
55 #endif
56 
57 #include <stdint.h>
58 #include <stdbool.h>
59 #include <stddef.h>
60 
69 typedef uint32_t Osal_CacheP_isCoherent;
71 #define OSAL_CACHEP_COHERENT ((uint32_t) 0U)
73 #define OSAL_CACHEP_NOT_COHERENT ((uint32_t) 1U)
74 /* @} */
75 
85 typedef uint32_t CacheP_Mar;
87 #define CacheP_Mar_DISABLE ((uint32_t) 0U)
89 #define CacheP_Mar_ENABLE ((uint32_t) 1U)
90 /* @} */
91 
100 extern void CacheP_wb(const void * addr, uint32_t size);
101 
102 
111 extern void CacheP_Inv(const void * addr, uint32_t size);
112 
113 
122 extern void CacheP_wbInv(const void * addr, uint32_t size);
123 
136 void CacheP_setMar(void *baseAddr, uint32_t size, uint32_t value);
137 
148 uint32_t CacheP_getMar(uintptr_t baseAddr);
149 
150 #ifdef __cplusplus
151 }
152 #endif
153 
154 #endif /* ti_osal_CacheP__include */
155 /* @} */
void CacheP_wb(const void *addr, uint32_t size)
Function to write back cache lines.
uint32_t CacheP_Mar
This enumerator defines the MAR register setting types.
Definition: CacheP.h:85
void CacheP_wbInv(const void *addr, uint32_t size)
Function to write back and invalidate cache lines.
void CacheP_setMar(void *baseAddr, uint32_t size, uint32_t value)
Set MAR attribute for a memory range.
uint32_t CacheP_getMar(uintptr_t baseAddr)
Get MAR attribute for a region of 16MB.
uint32_t Osal_CacheP_isCoherent
This enumerator defines the cache coherent types.
Definition: CacheP.h:69
void CacheP_Inv(const void *addr, uint32_t size)
Function to invalidate cache lines.