Processor SDK QNX J784S4

Welcome

This documentation covers the Texas Instruments Processor SDK QNX for the J784S4 platform. The following table lists the product devices associated with this platform:

Platform	Device
J784S4	TDA4VH, TDA4AH

Please refer to the Getting Started page for an overview of dependencies and the different components available.

Important

This SDK depends on the companion Processor SDK RTOS for J784S4 which also needs to be downloaded separately.

Table of Contents

• 1. Overview
  • 1.1. PSDK QNX Package
  • 1.2. Licenses
  • 1.3. Technical Support
• 2. Getting Started
  • 2.1. Downloading and installing the PSDK QNX
  • 2.2. PSDK QNX Build Options
  • 2.3. Resource Managers
  • 2.4. PSDK QNX Boot Modes
• 3. Build Steps
  • 3.1. Build
  • 3.2. Run Instructions
• 4. Release Notes
  • 4.1. Release notes - 08_06_00
• 5. PSDK QNX Components
  • 5.1. QNX BSP release
  • 5.2. SCI Client Resource Manager
  • 5.3. IPC Resource Manager
  • 5.4. UDMA Resource Manager
  • 5.5. Shared Memory Allocator
  • 5.6. CPSW2G DEVNP driver
  • 5.7. CPSW9G DEVNP driver
  • 5.8. K3conf QNX utility
  • 5.9. VPU Video Codec
• 6. PSDK RTOS Components
  • 6.1. Vision Apps
  • 6.2. Platform Development Kit (PDK)
  • 6.3. Ethernet Switch Firmware (ETHFW)
  • 6.4. TI Deep learning library (TIDL)
  • 6.5. TI OpenVX (TIOVX)
  • 6.6. System firmware (SYSFW)
• 7. EVM Setup for J784S4
  • 7.1. EVM Setup to run SDK demos
  • 7.2. EVM and Daughter Card information
• 8. CCS Setup for J784S4
  • 8.1. CPU names used in PSDK RTOS vs CCS
  • 8.2. Step 1: Install CCS
  • 8.3. Step 2: Install CCS DPK and Emulation packs
  • 8.4. Debugging without HLOS running on A72 (RTOS-only / baremetal)
  • 8.5. Debugging with HLOS running on A72 (Linux / QNX)
• 9. Data Sheet
  • 9.1. Common parameters used for performance benchmarking
• 10. Developer Notes
  • 10.1. How To Use EMMC Based Filesystem
  • 10.2. How To Handle Exceptions At Current Exception Level
  • 10.3. Understanding bootloaders in Processor SDK J784S4 (RTOS/Linux/QNX)
  • 10.4. How To Take Care Of Remote Core Memory Map Updates
  • 10.5. Enabling TI’s inline ECC for DDR