PSDK QNX API Guide
IPC SoC Config

Files

file  ipc_soc.h
 IPC Low Level Driver J784S4/J742S2 SOC specific file.
 

Macros

#define IPC_VRING_BUFFER_SIZE   (0x3000000U)
 VRing Buffer Size required for all core combinations. More...
 
#define IPC_MPU1_0   (0U)
 Core definitions. More...
 
#define IPC_MCU1_0   (1U)
 
#define IPC_MCU1_1   (2U)
 
#define IPC_MCU2_0   (3U)
 
#define IPC_MCU2_1   (4U)
 
#define IPC_MCU3_0   (5U)
 
#define IPC_MCU3_1   (6U)
 
#define IPC_MCU4_0   (7U)
 
#define IPC_MCU4_1   (8U)
 
#define IPC_C7X_1   (9U)
 
#define IPC_C7X_2   (10U)
 
#define IPC_C7X_3   (11U)
 
#define IPC_MAILBOX_CLUSTER_CNT   (18U)
 
#define IPC_MAILBOX_USER_CNT   (4U)
 
#define MAIN_NAVSS_MAILBOX_INPUTINTR_MAX   (440U)
 
#define MAIN_NAVSS_MAILBOX_OUTPUTINTR_MAX   (512U)
 
#define IPC_MCU_NAVSS0_INTR0_CFG_BASE   (CSL_NAVSS0_INTR0_INTR_ROUTER_CFG_BASE)
 
#define C7X_CLEC_BASE_ADDR   (CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE)
 
#define C7X_CLEC_OFFSET   (1024U - 32U)
 
#define IPC_C7X_MBINTR_OFFSET   (59U)
 

Functions

int32_t Ipc_sciclientIrqRelease (uint16_t remoteId, uint32_t clusterId, uint32_t userId, uint32_t intNumber)
 
int32_t Ipc_sciclientIrqSet (uint16_t remoteId, uint32_t clusterId, uint32_t userId, uint32_t intNumber)
 
int32_t Ipc_getIntNumRange (uint32_t coreIndex, uint16_t *rangeStartP, uint16_t *rangeNumP)
 

Detailed Description

This is IPC documentation specific to J784S4/J742S2 SoC

Macro Definition Documentation

◆ IPC_VRING_BUFFER_SIZE

#define IPC_VRING_BUFFER_SIZE   (0x3000000U)

VRing Buffer Size required for all core combinations.

◆ IPC_MPU1_0

#define IPC_MPU1_0   (0U)

Core definitions.

ARM A72 - VM0

◆ IPC_MCU1_0

#define IPC_MCU1_0   (1U)

ARM MCU R5F - core0

◆ IPC_MCU1_1

#define IPC_MCU1_1   (2U)

ARM MCU R5F - core1

◆ IPC_MCU2_0

#define IPC_MCU2_0   (3U)

ARM Main R5F - core0

◆ IPC_MCU2_1

#define IPC_MCU2_1   (4U)

ARM Main R5F - core1

◆ IPC_MCU3_0

#define IPC_MCU3_0   (5U)

ARM Main R5F - core2

◆ IPC_MCU3_1

#define IPC_MCU3_1   (6U)

ARM Main R5F - core3

◆ IPC_MCU4_0

#define IPC_MCU4_0   (7U)

ARM Main R5F - core4

◆ IPC_MCU4_1

#define IPC_MCU4_1   (8U)

ARM Main R5F - core5

◆ IPC_C7X_1

#define IPC_C7X_1   (9U)

DSP C7x - core0

◆ IPC_C7X_2

#define IPC_C7X_2   (10U)

DSP C7x - core1

◆ IPC_C7X_3

#define IPC_C7X_3   (11U)

DSP C7x - core2

◆ IPC_MAILBOX_CLUSTER_CNT

#define IPC_MAILBOX_CLUSTER_CNT   (18U)

◆ IPC_MAILBOX_USER_CNT

#define IPC_MAILBOX_USER_CNT   (4U)

◆ MAIN_NAVSS_MAILBOX_INPUTINTR_MAX

#define MAIN_NAVSS_MAILBOX_INPUTINTR_MAX   (440U)

◆ MAIN_NAVSS_MAILBOX_OUTPUTINTR_MAX

#define MAIN_NAVSS_MAILBOX_OUTPUTINTR_MAX   (512U)

◆ IPC_MCU_NAVSS0_INTR0_CFG_BASE

#define IPC_MCU_NAVSS0_INTR0_CFG_BASE   (CSL_NAVSS0_INTR0_INTR_ROUTER_CFG_BASE)

◆ C7X_CLEC_BASE_ADDR

#define C7X_CLEC_BASE_ADDR   (CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE)

◆ C7X_CLEC_OFFSET

#define C7X_CLEC_OFFSET   (1024U - 32U)

◆ IPC_C7X_MBINTR_OFFSET

#define IPC_C7X_MBINTR_OFFSET   (59U)

Function Documentation

◆ Ipc_sciclientIrqRelease()

int32_t Ipc_sciclientIrqRelease ( uint16_t  remoteId,
uint32_t  clusterId,
uint32_t  userId,
uint32_t  intNumber 
)

◆ Ipc_sciclientIrqSet()

int32_t Ipc_sciclientIrqSet ( uint16_t  remoteId,
uint32_t  clusterId,
uint32_t  userId,
uint32_t  intNumber 
)

◆ Ipc_getIntNumRange()

int32_t Ipc_getIntNumRange ( uint32_t  coreIndex,
uint16_t *  rangeStartP,
uint16_t *  rangeNumP 
)