Processor SDK QNX J7200

Welcome

This documentation covers the Texas Instruments Processor SDK QNX for the J7200 platform. The following table lists the product devices associated with this platform:

Platform	Device
J7200	DRA821

Please refer to the Getting Started page for an overview of dependencies and the different components available.

Important

This SDK depends on the companion Processor SDK RTOS for J7200 which also needs to be downloaded separately.

Table of Contents

• 1. Overview
  • 1.1. PSDK QNX Package
  • 1.2. Licenses
  • 1.3. Technical Support
• 2. Getting Started
  • 2.1. Downloading and installing the PSDK QNX
  • 2.2. PSDK QNX Build Options
  • 2.3. Resource Managers
  • 2.4. PSDK QNX Boot Modes
• 3. Build Steps
  • 3.1. Build
  • 3.2. Run Instructions
• 4. Release Notes
  • 4.1. Release notes - 09_01_00
• 5. PSDK QNX Components
  • 5.1. QNX BSP release
  • 5.2. QNX 7.1 Dependency Packages
  • 5.3. SCI Client Resource Manager
  • 5.4. IPC Resource Manager
  • 5.5. UDMA Resource Manager
  • 5.6. Shared Memory Allocator
  • 5.7. CPSW2G DEVNP driver
  • 5.8. CPSW9G DEVNP driver
  • 5.9. K3conf QNX utility
• 6. PSDK RTOS Components
  • 6.1. Platform Development Kit (PDK)
  • 6.2. Ethernet Switch Firmware (ETHFW)
  • 6.3. System firmware (SYSFW)
• 7. EVM Setup for J7200
  • 7.1. EVM Setup to run SDK demos
  • 7.2. EVM and Daughter Card information
• 8. CCS Setup for J7200
  • 8.1. CPU names used in PSDK_RTOS/PSDK_QNX vs CCS
  • 8.2. Step 1: Install CCS
  • 8.3. Debugging without HLOS running on A72 (RTOS-only / baremetal)
  • 8.4. Debugging with HLOS running on A72 (Linux / QNX)
  • 8.5. Debugging with QNX on A72 using QNX Momentics IDE
• 9. PSDK QNX API Guide
• 10. Data Sheet
  • 10.1. Common parameters used for performance benchmarking
• 11. Developer Notes
  • 11.1. How To Use EMMC Based Filesystem
  • 11.2. How To Handle Exceptions At Current Exception Level
  • 11.3. Understanding bootloaders in Processor SDK J7200 (RTOS/Linux/QNX)
  • 11.4. How To Take Care Of Remote Core Memory Map Updates
  • 11.5. Enabling TI’s inline ECC for DDR