7. EVM Setup for J7200

This section is intended to give a quick reference of EVM related to SDK usage. Full EVM documentation can be referenced at DRA821 evaluation module.

Important

• The power supply current requires more than 1A @12V input

• The SOM board has to be tightly inserted into the connector sockets

The SOM module employs an PMIC, with watchdog functionality. Failure to service the PMIC watchdog would reset the SoC. One could disable PMIC watch dog from resetting SoC, Refer EVM User guide, section SOM Configuration DIP Switch LEOA_WDOG_DISABLE.

7.1. EVM Setup to run SDK demos

7.1.1. Daughter card requirements

Below table shows the daughter cards required for various features/demos

Feature	J7X Quad Port Eth card (QSGMII)	GESI Card
CPSW5G (ETHFW) demos	REQUIRED	na
CAN demos	na	REQUIRED

7.1.2. UART terminal setup

• Connect USB cable to Main UART port on common processor board (see Common Processor Board)

  • 4 UART ports would be visible at the PC side

  • Port 0 from this is used this for QNX, RTOS UART terminal from A72

• If you use the SBL bootflow, it would be helpful to connect to the MCU UART port on the common processor board as well. The second COM port from the MCU UART gives you logs from the MCU R5F from which the boot app will be run.

• Setup UART for 115200 baud rate, 8 data bits, no parity, 1 stop bit

7.1.3. Boot Modes

Bootmodes are selected using the SW8 and SW9 switches on the common processor board.

7.1.3.1. No Boot Mode

When you want the binaries to be loaded from a debugger (CCS), the common processor boards has to be set in the NO boot mode.

Following are the switch settings to do the same.:

SW8[1-8] = 1000 1000
SW9[1-8] = 0111 0000

Fig. 7.1 No Boot Mode

7.1.3.2. SD Boot Mode

Following are the switch settings to set the boot mode to SD for common processor board.:

SW8[1-8] = 1000 0010
SW9[1-8] = 0000 0000

Fig. 7.2 MMC/SD Boot Mode

7.1.3.3. UART Boot Mode

Following are the switch settings to set the boot mode to UART for common processor board.:

SW3[1-8] = 0xxx xxxx
SW8[1-8] = 0000 0000
SW9[1-8] = 0111 0000

Fig. 7.3 UART Boot Mode SW3

Fig. 7.4 UART Boot Mode SW8 and SW9

7.1.3.4. USB Boot Mode

Following are the switch settings to set the boot mode to USB for common processor board.:

SW8[1-8] = 1000 0010
SW9[1-8] = 0010 0000

Fig. 7.5 USB Boot Mode

7.1.3.5. xSPI Boot Mode (J7200 ES1.0 version)

Following are the switch settings to set the boot mode to xSPI for common processor board.:

SW3[1-8] = 0xxx xxxx
SW8[1-8] = 1000 0010
SW9[1-8] = 0011 0000

Fig. 7.6 xSPI Boot Mode SW3

Fig. 7.7 xSPI Boot Mode SW8 and SW9

7.1.3.6. xSPI Boot Mode (J7200 ES2.0 version)

Following are the switch settings to set the boot mode to XSPI for common processor board.:

SW3[1-8] = 0xxx xxxx
SW8[1-8] = 0000 1010
SW9[1-8] = 0110 0000

Fig. 7.8 xSPI Boot Mode SW3

Fig. 7.9 xSPI Boot Mode SW8 and SW9

7.1.3.7. Hyperflash Boot Mode

For Hyperflash Boot Mode, there are two different speed settings: 83 MHz and 166 MHz. The switch settings for each mode are indicated below:

Following are the switch settings to set the boot mode to Hyperflash (83MHz) for common processor board.:

SW8[1-8] = 0000 0000
SW9[1-8] = 0000 0000

Fig. 7.10 Hyperflash (83MHz) Boot Mode

Following are the switch settings to set the boot mode to Hyperflash (166MHz) for common processor board.:

SW8[1-8] = 0000 0010
SW9[1-8] = 0000 0000

Fig. 7.11 Hyperflash (166MHz) Boot Mode

7.2. EVM and Daughter Card information

7.2.1. J7200 SOM

The J7200 Evaluation Module consists of a SOM (System on Module), shown in the red box below, fitted to a common processor board or base EVM.

Fig. 7.12 J7200 SOM

Contents of the board

• J7200 SoC

• Power controller

• 4 GiB DDR RAM

• OSPI NOR flash

• Hyperflash

7.2.2. Common Processor Board

Common Processor Board is the main board which has peripherals to provide most common functionality. It has expander ports to connect to different adapter cards.

Important

This board is also used for other SOMs such as the J7200 SOM, so it has peripheral ports which may be not relevant to J7200

Fig. 7.13 J7200 Common Processor Board

Contents of the board

1. 4xUART to USB port for Main uarts

   • Port0 from this is used this for Linux, RTOS UART terminal from A72

2. 2xUART to USB port MCU domain uarts

   • Port0 from this is used for DMSC UART

   • Port1 from this is used for MCU R5F UART

3. 2x Display (eDP/DP) ports (Not applicable for J7200)

4. Ethernet (CPSW2G) port

5. SD card slot

6. XDS110 on board USB JTAG connector

7. USB ports

8. 12V Power input

9. Power switch

10. MIPI JTAG connector

7.2.3. Quad Port Ethernet daughter card

Quad Port Ethernet (QPENet) board is an adapter board which offers additional Ethernet port capabilities to the Jacinto7 EVM.

Fig. 7.14 QPENet daughter card

Contents of the board:

• Quad-SGMII PHY

• 4x Ethernet ports

• EEPROM with flashed MAC addresses

7.2.4. GESI daughter card

GESI(Gateway/Ethernet Switch/Industrial) daughter card is an adapter board which has additional peripherals for gateway and industrial use cases. This has support in J7200 for CAN ports.

Fig. 7.15 GESI daughter card

Contents of the board

• 5x Ethernet ports (NOT CONNECTED IN J7200, use QPENet daughter card for Ethernet)

• Profinet connector

• Motor control headers

• Additional CAN Transceivers/ headers